interlace_mode 393 drivers/gpu/drm/amd/display/dc/calcs/calcs_logger.h i, data->interlace_mode[i]); interlace_mode 239 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->interlace_mode[0] = data->interlace_mode[4]; interlace_mode 240 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->interlace_mode[1] = data->interlace_mode[4]; interlace_mode 242 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->interlace_mode[2] = data->interlace_mode[5]; interlace_mode 243 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->interlace_mode[3] = data->interlace_mode[5]; interlace_mode 365 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->interlace_mode[maximum_number_of_surfaces - 2] = data->interlace_mode[5]; interlace_mode 366 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->interlace_mode[maximum_number_of_surfaces - 1] = data->interlace_mode[5]; interlace_mode 420 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c if (bw_equ(data->h_scale_ratio[i], bw_int_to_fixed(1)) && bw_equ(data->v_scale_ratio[i], bw_int_to_fixed(1)) && surface_type[i] == bw_def_graphics && data->stereo_mode[i] == bw_def_mono && data->interlace_mode[i] == 0) { interlace_mode 471 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c if (data->interlace_mode[i]) { interlace_mode 790 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->v_filter_init[i] = bw_floor2(bw_div((bw_add(bw_add(bw_add(bw_int_to_fixed(1), data->v_taps[i]), data->vsr[i]), bw_mul(bw_mul(bw_int_to_fixed(data->interlace_mode[i]), bw_frc_to_fixed(5, 10)), data->vsr[i]))), bw_int_to_fixed(2)), bw_int_to_fixed(1)); interlace_mode 2845 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->interlace_mode[num_displays + 4] = false; interlace_mode 2973 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->interlace_mode[num_displays + 4] = false; interlace_mode 371 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h bool interlace_mode[maximum_number_of_surfaces]; interlace_mode 145 drivers/gpu/drm/meson/meson_overlay.c bool interlace_mode) interlace_mode 181 drivers/gpu/drm/meson/meson_overlay.c crtc_width, crtc_height, interlace_mode); interlace_mode 196 drivers/gpu/drm/meson/meson_overlay.c interlace_mode); interlace_mode 232 drivers/gpu/drm/meson/meson_overlay.c if (interlace_mode) { interlace_mode 345 drivers/gpu/drm/meson/meson_overlay.c bool interlace_mode; interlace_mode 349 drivers/gpu/drm/meson/meson_overlay.c interlace_mode = state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE; interlace_mode 360 drivers/gpu/drm/meson/meson_overlay.c meson_overlay_setup_scaler_params(priv, plane, interlace_mode); interlace_mode 363 drivers/gpu/drm/meson/meson_overlay.c priv->viu.vd1_if0_luma0_rpt_pat = interlace_mode ? 8 : 0; interlace_mode 364 drivers/gpu/drm/meson/meson_overlay.c priv->viu.vd1_if0_chroma0_rpt_pat = interlace_mode ? 8 : 0;