intel_state 321 drivers/gpu/drm/i915/display/intel_atomic.c struct intel_atomic_state *intel_state = to_intel_atomic_state(drm_state); intel_state 398 drivers/gpu/drm/i915/display/intel_atomic.c plane_state = intel_atomic_get_new_plane_state(intel_state, intel_state 84 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_plane_state *intel_state; intel_state 86 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_state = kmemdup(plane->state, sizeof(*intel_state), GFP_KERNEL); intel_state 88 drivers/gpu/drm/i915/display/intel_atomic_plane.c if (!intel_state) intel_state 91 drivers/gpu/drm/i915/display/intel_atomic_plane.c state = &intel_state->base; intel_state 95 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_state->vma = NULL; intel_state 96 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_state->flags = 0; intel_state 43 drivers/gpu/drm/i915/display/intel_atomic_plane.h struct intel_plane_state *intel_state); intel_state 3180 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane_state *intel_state = intel_state 3230 drivers/gpu/drm/i915/display/intel_display.c intel_state->base.rotation = plane_config->rotation; intel_state 3231 drivers/gpu/drm/i915/display/intel_display.c intel_fill_fb_ggtt_view(&intel_state->view, fb, intel_state 3232 drivers/gpu/drm/i915/display/intel_display.c intel_state->base.rotation); intel_state 3233 drivers/gpu/drm/i915/display/intel_display.c intel_state->color_plane[0].stride = intel_state 3234 drivers/gpu/drm/i915/display/intel_display.c intel_fb_pitch(fb, 0, intel_state->base.rotation); intel_state 3237 drivers/gpu/drm/i915/display/intel_display.c intel_state->vma = intel_state 3239 drivers/gpu/drm/i915/display/intel_display.c &intel_state->view, intel_state 3240 drivers/gpu/drm/i915/display/intel_display.c intel_plane_uses_fence(intel_state), intel_state 3241 drivers/gpu/drm/i915/display/intel_display.c &intel_state->flags); intel_state 3243 drivers/gpu/drm/i915/display/intel_display.c if (IS_ERR(intel_state->vma)) { intel_state 3245 drivers/gpu/drm/i915/display/intel_display.c intel_crtc->pipe, PTR_ERR(intel_state->vma)); intel_state 3247 drivers/gpu/drm/i915/display/intel_display.c intel_state->vma = NULL; intel_state 3264 drivers/gpu/drm/i915/display/intel_display.c intel_state->base.src = drm_plane_state_src(plane_state); intel_state 3265 drivers/gpu/drm/i915/display/intel_display.c intel_state->base.dst = drm_plane_state_dest(plane_state); intel_state 5952 drivers/gpu/drm/i915/display/intel_display.c struct intel_atomic_state *intel_state = intel_state 5960 drivers/gpu/drm/i915/display/intel_display.c intel_atomic_get_new_plane_state(intel_state, intel_state 6029 drivers/gpu/drm/i915/display/intel_display.c dev_priv->display.initial_watermarks(intel_state, intel_state 7335 drivers/gpu/drm/i915/display/intel_display.c struct intel_atomic_state *intel_state = intel_state 7356 drivers/gpu/drm/i915/display/intel_display.c crtc_state->pixel_rate > intel_state->cdclk.logical.cdclk * 95 / 100) intel_state 13880 drivers/gpu/drm/i915/display/intel_display.c static void intel_atomic_commit_fence_wait(struct intel_atomic_state *intel_state) intel_state 13883 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(intel_state->base.dev); intel_state 13888 drivers/gpu/drm/i915/display/intel_display.c prepare_to_wait(&intel_state->commit_ready.wait, intel_state 13895 drivers/gpu/drm/i915/display/intel_display.c if (i915_sw_fence_done(&intel_state->commit_ready) || intel_state 13901 drivers/gpu/drm/i915/display/intel_display.c finish_wait(&intel_state->commit_ready.wait, &wait_fence); intel_state 14368 drivers/gpu/drm/i915/display/intel_display.c struct intel_atomic_state *intel_state = intel_state 14378 drivers/gpu/drm/i915/display/intel_display.c intel_atomic_get_new_crtc_state(intel_state, intel_state 14393 drivers/gpu/drm/i915/display/intel_display.c ret = i915_sw_fence_await_reservation(&intel_state->commit_ready, intel_state 14403 drivers/gpu/drm/i915/display/intel_display.c ret = i915_sw_fence_await_dma_fence(&intel_state->commit_ready, intel_state 14437 drivers/gpu/drm/i915/display/intel_display.c ret = i915_sw_fence_await_reservation(&intel_state->commit_ready, intel_state 14461 drivers/gpu/drm/i915/display/intel_display.c if (!intel_state->rps_interactive) { intel_state 14463 drivers/gpu/drm/i915/display/intel_display.c intel_state->rps_interactive = true; intel_state 14482 drivers/gpu/drm/i915/display/intel_display.c struct intel_atomic_state *intel_state = intel_state 14486 drivers/gpu/drm/i915/display/intel_display.c if (intel_state->rps_interactive) { intel_state 14488 drivers/gpu/drm/i915/display/intel_display.c intel_state->rps_interactive = false; intel_state 15749 drivers/gpu/drm/i915/display/intel_display.c struct intel_atomic_state *intel_state = to_intel_atomic_state(state); intel_state 15753 drivers/gpu/drm/i915/display/intel_display.c i915_sw_fence_fini(&intel_state->commit_ready); intel_state 15985 drivers/gpu/drm/i915/display/intel_display.c struct intel_atomic_state *intel_state; intel_state 16014 drivers/gpu/drm/i915/display/intel_display.c intel_state = to_intel_atomic_state(state); intel_state 16022 drivers/gpu/drm/i915/display/intel_display.c intel_state->skip_intermediate_wm = true; intel_state 16042 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(intel_state, crtc, crtc_state, i) { intel_state 16044 drivers/gpu/drm/i915/display/intel_display.c dev_priv->display.optimize_watermarks(intel_state, crtc_state); intel_state 1426 drivers/gpu/drm/i915/intel_pm.c struct intel_atomic_state *intel_state = intel_state 1429 drivers/gpu/drm/i915/intel_pm.c intel_atomic_get_old_crtc_state(intel_state, crtc); intel_state 2059 drivers/gpu/drm/i915/intel_pm.c struct intel_atomic_state *intel_state = intel_state 2062 drivers/gpu/drm/i915/intel_pm.c intel_atomic_get_old_crtc_state(intel_state, crtc); intel_state 2799 drivers/gpu/drm/i915/intel_pm.c const struct intel_atomic_state *intel_state = intel_state 2809 drivers/gpu/drm/i915/intel_pm.c if (WARN_ON(intel_state->cdclk.logical.cdclk == 0)) intel_state 2818 drivers/gpu/drm/i915/intel_pm.c intel_state->cdclk.logical.cdclk); intel_state 3201 drivers/gpu/drm/i915/intel_pm.c struct intel_atomic_state *intel_state = intel_state 3204 drivers/gpu/drm/i915/intel_pm.c intel_atomic_get_old_crtc_state(intel_state, intel_crtc); intel_state 3215 drivers/gpu/drm/i915/intel_pm.c intel_state->skip_intermediate_wm) intel_state 3867 drivers/gpu/drm/i915/intel_pm.c struct intel_atomic_state *intel_state = to_intel_atomic_state(state); intel_state 3882 drivers/gpu/drm/i915/intel_pm.c if (intel_state->active_pipe_changes) intel_state 3883 drivers/gpu/drm/i915/intel_pm.c *num_active = hweight32(intel_state->active_crtcs); intel_state 3898 drivers/gpu/drm/i915/intel_pm.c if (!intel_state->active_pipe_changes && !intel_state->modeset) { intel_state 3912 drivers/gpu/drm/i915/intel_pm.c for_each_new_intel_crtc_in_state(intel_state, crtc, crtc_state, i) {