int_sel          4529 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	bool int_sel = flags & AMDGPU_FENCE_FLAG_INT;
int_sel          4533 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 		int_sel = false;
int_sel          4545 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 				 PACKET3_RELEASE_MEM_INT_SEL(int_sel ? 2 : 0)));
int_sel          1839 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	bool int_sel = flags & AMDGPU_FENCE_FLAG_INT;
int_sel          1858 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 				((int_sel ? 2 : 0) << CP_EOP_DONE_DATA_CNTL__INT_SEL__SHIFT));
int_sel          2186 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	bool int_sel = flags & AMDGPU_FENCE_FLAG_INT;
int_sel          2209 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 				DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0));
int_sel          2228 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	bool int_sel = flags & AMDGPU_FENCE_FLAG_INT;
int_sel          2236 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0));
int_sel          6185 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	bool int_sel = flags & AMDGPU_FENCE_FLAG_INT;
int_sel          6212 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 			  DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0));
int_sel          6378 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	bool int_sel = flags & AMDGPU_FENCE_FLAG_INT;
int_sel          6387 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0));
int_sel          5083 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	bool int_sel = flags & AMDGPU_FENCE_FLAG_INT;
int_sel          5096 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0));
int_sel           146 drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c 	rm_packet->bitfields3.int_sel =
int_sel           321 drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v10.c 	packet->bitfields3.int_sel =
int_sel           362 drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c 	packet->bitfields3.int_sel =
int_sel           349 drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_vi.c 	packet->bitfields3.int_sel =
int_sel           534 drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h 			enum mec_release_mem_int_sel_enum int_sel:3;
int_sel           148 drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_diq.h 			enum _RELEASE_MEM_int_sel_enum int_sel:3;
int_sel           474 drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_vi.h 			enum RELEASE_MEM_int_sel_enum int_sel:3;
int_sel           180 drivers/mfd/ezx-pcap.c 	u32 msr, isr, int_sel, service;
int_sel           189 drivers/mfd/ezx-pcap.c 			ezx_pcap_read(pcap, PCAP_REG_INT_SEL, &int_sel);
int_sel           190 drivers/mfd/ezx-pcap.c 			isr &= ~int_sel;