instrs 119 arch/powerpc/lib/feature-fixups.c unsigned int instrs[3], *dest; instrs 126 arch/powerpc/lib/feature-fixups.c instrs[0] = 0x60000000; /* nop */ instrs 127 arch/powerpc/lib/feature-fixups.c instrs[1] = 0x60000000; /* nop */ instrs 128 arch/powerpc/lib/feature-fixups.c instrs[2] = 0x60000000; /* nop */ instrs 132 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x7d4802a6; /* mflr r10 */ instrs 133 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x60000000; /* branch patched below */ instrs 134 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x7d4803a6; /* mtlr r10 */ instrs 136 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x7e0006ac; /* eieio + bit 6 hint */ instrs 138 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x7c0004ac; /* hwsync */ instrs 139 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0xe94d0000; /* ld r10,0(r13) */ instrs 140 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x63ff0000; /* ori 31,31,0 speculation barrier */ instrs 148 arch/powerpc/lib/feature-fixups.c patch_instruction(dest, instrs[0]); instrs 154 arch/powerpc/lib/feature-fixups.c patch_instruction(dest + 1, instrs[1]); instrs 156 arch/powerpc/lib/feature-fixups.c patch_instruction(dest + 2, instrs[2]); instrs 169 arch/powerpc/lib/feature-fixups.c unsigned int instrs[6], *dest; instrs 176 arch/powerpc/lib/feature-fixups.c instrs[0] = 0x60000000; /* nop */ instrs 177 arch/powerpc/lib/feature-fixups.c instrs[1] = 0x60000000; /* nop */ instrs 178 arch/powerpc/lib/feature-fixups.c instrs[2] = 0x60000000; /* nop */ instrs 179 arch/powerpc/lib/feature-fixups.c instrs[3] = 0x60000000; /* nop */ instrs 180 arch/powerpc/lib/feature-fixups.c instrs[4] = 0x60000000; /* nop */ instrs 181 arch/powerpc/lib/feature-fixups.c instrs[5] = 0x60000000; /* nop */ instrs 186 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x7db14ba6; /* mtspr 0x131, r13 (HSPRG1) */ instrs 187 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x7db04aa6; /* mfspr r13, 0x130 (HSPRG0) */ instrs 189 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x7db243a6; /* mtsprg 2,r13 */ instrs 190 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x7db142a6; /* mfsprg r13,1 */ instrs 192 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x7c0004ac; /* hwsync */ instrs 193 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0xe9ad0000; /* ld r13,0(r13) */ instrs 194 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x63ff0000; /* ori 31,31,0 speculation barrier */ instrs 196 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x7db14aa6; /* mfspr r13, 0x131 (HSPRG1) */ instrs 198 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x7db242a6; /* mfsprg r13,2 */ instrs 201 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x7e0006ac; /* eieio + bit 6 hint */ instrs 209 arch/powerpc/lib/feature-fixups.c patch_instruction(dest, instrs[0]); instrs 210 arch/powerpc/lib/feature-fixups.c patch_instruction(dest + 1, instrs[1]); instrs 211 arch/powerpc/lib/feature-fixups.c patch_instruction(dest + 2, instrs[2]); instrs 212 arch/powerpc/lib/feature-fixups.c patch_instruction(dest + 3, instrs[3]); instrs 213 arch/powerpc/lib/feature-fixups.c patch_instruction(dest + 4, instrs[4]); instrs 214 arch/powerpc/lib/feature-fixups.c patch_instruction(dest + 5, instrs[5]); instrs 233 arch/powerpc/lib/feature-fixups.c unsigned int instrs[3], *dest; instrs 240 arch/powerpc/lib/feature-fixups.c instrs[0] = 0x60000000; /* nop */ instrs 241 arch/powerpc/lib/feature-fixups.c instrs[1] = 0x60000000; /* nop */ instrs 242 arch/powerpc/lib/feature-fixups.c instrs[2] = 0x60000000; /* nop */ instrs 246 arch/powerpc/lib/feature-fixups.c instrs[0] = 0x48000010; instrs 250 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x63ff0000; /* ori 31,31,0 speculation barrier */ instrs 251 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x63de0000; /* ori 30,30,0 L1d flush*/ instrs 255 arch/powerpc/lib/feature-fixups.c instrs[i++] = 0x7c12dba6; /* mtspr TRIG2,r0 (SPR #882) */ instrs 262 arch/powerpc/lib/feature-fixups.c patch_instruction(dest, instrs[0]); instrs 263 arch/powerpc/lib/feature-fixups.c patch_instruction(dest + 1, instrs[1]); instrs 264 arch/powerpc/lib/feature-fixups.c patch_instruction(dest + 2, instrs[2]); instrs 171 drivers/mtd/nand/raw/ams-delta.c for (instr = op->instrs; instr < op->instrs + op->ninstrs; instr++) { instrs 1143 drivers/mtd/nand/raw/denali.c ret = denali_exec_instr(chip, &op->instrs[i]); instrs 614 drivers/mtd/nand/raw/fsmc_nand.c instr = &op->instrs[op_id]; instrs 2432 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c instr = &op->instrs[i]; instrs 2448 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c op->instrs[i + 1].type == NAND_OP_ADDR_INSTR) instrs 1653 drivers/mtd/nand/raw/marvell_nand.c instr = &subop->instrs[op_id]; instrs 1835 drivers/mtd/nand/raw/marvell_nand.c switch (subop->instrs[0].type) { instrs 1882 drivers/mtd/nand/raw/marvell_nand.c if (subop->instrs[0].type == NAND_OP_DATA_OUT_INSTR) { instrs 904 drivers/mtd/nand/raw/meson_nand.c instr = &op->instrs[op_id]; instrs 399 drivers/mtd/nand/raw/mxic_nand.c instr = &op->instrs[op_id]; instrs 1020 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1027 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1035 drivers/mtd/nand/raw/nand_base.c instrs[0].ctx.cmd.opcode = NAND_CMD_READOOB; instrs 1038 drivers/mtd/nand/raw/nand_base.c instrs[0].ctx.cmd.opcode = NAND_CMD_READ1; instrs 1049 drivers/mtd/nand/raw/nand_base.c instrs[1].ctx.addr.naddrs++; instrs 1062 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1070 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1086 drivers/mtd/nand/raw/nand_base.c instrs[1].ctx.addr.naddrs++; instrs 1158 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1165 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1214 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1221 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1232 drivers/mtd/nand/raw/nand_base.c instrs[3].ctx.data.force_8bit = force_8bit; instrs 1290 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1303 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1316 drivers/mtd/nand/raw/nand_base.c instrs[2].ctx.addr.naddrs = naddrs; instrs 1333 drivers/mtd/nand/raw/nand_base.c instrs[0].ctx.cmd.opcode = NAND_CMD_READOOB; instrs 1336 drivers/mtd/nand/raw/nand_base.c instrs[0].ctx.cmd.opcode = NAND_CMD_READ1; instrs 1342 drivers/mtd/nand/raw/nand_base.c op.instrs++; instrs 1412 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1417 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1520 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1525 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1532 drivers/mtd/nand/raw/nand_base.c instrs[2].ctx.data.force_8bit = force_8bit; instrs 1574 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1579 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1613 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1618 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1648 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1651 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1683 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1690 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1693 drivers/mtd/nand/raw/nand_base.c instrs[1].ctx.addr.naddrs++; instrs 1741 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1748 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1788 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1796 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1812 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1816 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1845 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1849 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1880 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1883 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1885 drivers/mtd/nand/raw/nand_base.c instrs[0].ctx.data.force_8bit = force_8bit; instrs 1924 drivers/mtd/nand/raw/nand_base.c struct nand_op_instr instrs[] = { instrs 1927 drivers/mtd/nand/raw/nand_base.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 1929 drivers/mtd/nand/raw/nand_base.c instrs[0].ctx.data.force_8bit = force_8bit; instrs 1958 drivers/mtd/nand/raw/nand_base.c const struct nand_op_instr *instrs; instrs 2035 drivers/mtd/nand/raw/nand_base.c const struct nand_op_instr *end = ctx->instrs + ctx->ninstrs; instrs 2036 drivers/mtd/nand/raw/nand_base.c const struct nand_op_instr *instr = ctx->subop.instrs; instrs 2113 drivers/mtd/nand/raw/nand_base.c instr = &ctx->instrs[i]; instrs 2115 drivers/mtd/nand/raw/nand_base.c if (instr == &ctx->subop.instrs[0]) instrs 2120 drivers/mtd/nand/raw/nand_base.c if (instr == &ctx->subop.instrs[ctx->subop.ninstrs - 1]) instrs 2174 drivers/mtd/nand/raw/nand_base.c .subop.instrs = op->instrs, instrs 2175 drivers/mtd/nand/raw/nand_base.c .instrs = op->instrs, instrs 2180 drivers/mtd/nand/raw/nand_base.c while (ctx.subop.instrs < op->instrs + op->ninstrs) { instrs 2219 drivers/mtd/nand/raw/nand_base.c ctx.subop.instrs = ctx.subop.instrs + ctx.subop.ninstrs; instrs 2221 drivers/mtd/nand/raw/nand_base.c ctx.subop.instrs -= 1; instrs 2266 drivers/mtd/nand/raw/nand_base.c subop->instrs[instr_idx].type != NAND_OP_ADDR_INSTR)) instrs 2290 drivers/mtd/nand/raw/nand_base.c subop->instrs[instr_idx].type != NAND_OP_ADDR_INSTR)) instrs 2299 drivers/mtd/nand/raw/nand_base.c end_off = subop->instrs[instr_idx].ctx.addr.naddrs; instrs 2320 drivers/mtd/nand/raw/nand_base.c !nand_instr_is_data(&subop->instrs[instr_idx]))) instrs 2344 drivers/mtd/nand/raw/nand_base.c !nand_instr_is_data(&subop->instrs[instr_idx]))) instrs 2353 drivers/mtd/nand/raw/nand_base.c end_off = subop->instrs[instr_idx].ctx.data.len; instrs 75 drivers/mtd/nand/raw/nand_hynix.c struct nand_op_instr instrs[] = { instrs 78 drivers/mtd/nand/raw/nand_hynix.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 93 drivers/mtd/nand/raw/nand_hynix.c struct nand_op_instr instrs[] = { instrs 97 drivers/mtd/nand/raw/nand_hynix.c struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); instrs 2150 drivers/mtd/nand/raw/nandsim.c instr = &op->instrs[op_id]; instrs 1376 drivers/mtd/nand/raw/stm32_fmc2_nand.c instr = &op->instrs[op_id]; instrs 1781 drivers/mtd/nand/raw/sunxi_nand.c const struct nand_op_instr *instr = &subop->instrs[i]; instrs 1871 drivers/mtd/nand/raw/sunxi_nand.c subop->instrs[0].ctx.waitrdy.timeout_ms); instrs 363 drivers/mtd/nand/raw/tegra_nand.c instr = &subop->instrs[op_id]; instrs 359 drivers/mtd/nand/raw/vf610_nfc.c return &subop->instrs[*op_id]; instrs 712 include/linux/mtd/rawnand.h const struct nand_op_instr *instrs; instrs 862 include/linux/mtd/rawnand.h const struct nand_op_instr *instrs; instrs 869 include/linux/mtd/rawnand.h .instrs = _instrs, \