input_idx 732 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c int i, input_idx, k; input_idx 865 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c for (i = 0, input_idx = 0; i < pool->pipe_count; i++) { input_idx 874 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->underscan_output[input_idx] = false; /* taken care of in recout already*/ input_idx 875 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->interlace_output[input_idx] = false; input_idx 877 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->htotal[input_idx] = pipe->stream->timing.h_total; input_idx 878 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->vtotal[input_idx] = pipe->stream->timing.v_total; input_idx 879 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->vactive[input_idx] = pipe->stream->timing.v_addressable + input_idx 881 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->v_sync_plus_back_porch[input_idx] = pipe->stream->timing.v_total input_idx 882 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c - v->vactive[input_idx] input_idx 884 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->pixel_clock[input_idx] = pipe->stream->timing.pix_clk_100hz/10000.0; input_idx 886 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->pixel_clock[input_idx] *= 2; input_idx 888 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcc_enable[input_idx] = dcn_bw_yes; input_idx 889 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->source_pixel_format[input_idx] = dcn_bw_rgb_sub_32; input_idx 890 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->source_surface_mode[input_idx] = dcn_bw_sw_4_kb_s; input_idx 891 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->lb_bit_per_pixel[input_idx] = 30; input_idx 892 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_width[input_idx] = pipe->stream->timing.h_addressable; input_idx 893 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_height[input_idx] = pipe->stream->timing.v_addressable; input_idx 901 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->viewport_width[input_idx] > 1920) input_idx 902 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_width[input_idx] = 1920; input_idx 903 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->viewport_height[input_idx] > 1080) input_idx 904 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_height[input_idx] = 1080; input_idx 905 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->scaler_rec_out_width[input_idx] = v->viewport_width[input_idx]; input_idx 906 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->scaler_recout_height[input_idx] = v->viewport_height[input_idx]; input_idx 907 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_hta_ps[input_idx] = 1; input_idx 908 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_vta_ps[input_idx] = 1; input_idx 909 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_hta_pschroma[input_idx] = 1; input_idx 910 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_vta_pschroma[input_idx] = 1; input_idx 911 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->source_scan[input_idx] = dcn_bw_hor; input_idx 914 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_height[input_idx] = pipe->plane_res.scl_data.viewport.height; input_idx 915 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_width[input_idx] = pipe->plane_res.scl_data.viewport.width; input_idx 916 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->scaler_rec_out_width[input_idx] = pipe->plane_res.scl_data.recout.width; input_idx 917 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->scaler_recout_height[input_idx] = pipe->plane_res.scl_data.recout.height; input_idx 926 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_width[input_idx] = viewport_end input_idx 929 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_width[input_idx] = viewport_b_end input_idx 938 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_height[input_idx] = viewport_end input_idx 941 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_height[input_idx] = viewport_b_end input_idx 944 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->scaler_rec_out_width[input_idx] = pipe->plane_res.scl_data.recout.width input_idx 950 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c || v->scaler_rec_out_width[input_idx] == v->viewport_width[input_idx]); input_idx 952 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c || v->scaler_recout_height[input_idx] == v->viewport_height[input_idx]); input_idx 955 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c || v->scaler_recout_height[input_idx] == v->viewport_width[input_idx]); input_idx 957 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c || v->scaler_rec_out_width[input_idx] == v->viewport_height[input_idx]); input_idx 965 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcc_enable[input_idx] = pipe->plane_state->dcc.enable ? dcn_bw_yes : dcn_bw_no; input_idx 975 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcc_enable[input_idx] = dc->res_pool->hubbub->funcs->dcc_support_pixel_format( input_idx 979 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->source_pixel_format[input_idx] = tl_pixel_format_to_bw_defs( input_idx 981 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->source_surface_mode[input_idx] = tl_sw_mode_to_bw_defs( input_idx 983 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->lb_bit_per_pixel[input_idx] = tl_lb_bpp_to_int(pipe->plane_res.scl_data.lb_params.depth); input_idx 984 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_hta_ps[input_idx] = pipe->plane_res.scl_data.taps.h_taps; input_idx 985 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_vta_ps[input_idx] = pipe->plane_res.scl_data.taps.v_taps; input_idx 986 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_hta_pschroma[input_idx] = pipe->plane_res.scl_data.taps.h_taps_c; input_idx 987 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_vta_pschroma[input_idx] = pipe->plane_res.scl_data.taps.v_taps_c; input_idx 993 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->override_hta_pschroma[input_idx] == 1) input_idx 994 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_hta_pschroma[input_idx] = 2; input_idx 995 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->override_vta_pschroma[input_idx] == 1) input_idx 996 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_vta_pschroma[input_idx] = 2; input_idx 997 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->source_scan[input_idx] = (pipe->plane_state->rotation % 2) ? dcn_bw_vert : dcn_bw_hor; input_idx 1000 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->lb_bit_per_pixel[input_idx] = v->line_buffer_fixed_bpp; input_idx 1001 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcc_rate[input_idx] = 1; /*TODO: Worst case? does this change?*/ input_idx 1002 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->output_format[input_idx] = pipe->stream->timing.pixel_encoding == input_idx 1004 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->output[input_idx] = pipe->stream->signal == input_idx 1006 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->output_deep_color[input_idx] = dcn_bw_encoder_8bpc; input_idx 1007 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->output[input_idx] == dcn_bw_hdmi) { input_idx 1010 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->output_deep_color[input_idx] = dcn_bw_encoder_10bpc; input_idx 1013 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->output_deep_color[input_idx] = dcn_bw_encoder_12bpc; input_idx 1016 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->output_deep_color[input_idx] = dcn_bw_encoder_16bpc; input_idx 1023 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input_idx++; input_idx 1025 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->number_of_active_planes = input_idx; input_idx 1171 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c for (i = 0, input_idx = 0; i < pool->pipe_count; i++) { input_idx 1181 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c pipe->pipe_dlg_param.vupdate_width = v->v_update_width_pix[input_idx]; input_idx 1182 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx]; input_idx 1183 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c pipe->pipe_dlg_param.vready_offset = v->v_ready_offset_pix[input_idx]; input_idx 1184 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c pipe->pipe_dlg_param.vstartup_start = v->v_startup[input_idx]; input_idx 1211 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->dpp_per_plane[input_idx] == 2 || input_idx 1222 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c hsplit_pipe->pipe_dlg_param.vupdate_width = v->v_update_width_pix[input_idx]; input_idx 1223 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c hsplit_pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx]; input_idx 1224 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c hsplit_pipe->pipe_dlg_param.vready_offset = v->v_ready_offset_pix[input_idx]; input_idx 1225 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c hsplit_pipe->pipe_dlg_param.vstartup_start = v->v_startup[input_idx]; input_idx 1238 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dcn_bw_calc_rq_dlg_ttu(dc, v, hsplit_pipe, input_idx); input_idx 1254 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dcn_bw_calc_rq_dlg_ttu(dc, v, pipe, input_idx); input_idx 1257 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input_idx++; input_idx 743 drivers/media/platform/davinci/vpif_capture.c ch->input_idx = index; input_idx 802 drivers/media/platform/davinci/vpif_capture.c input = chan_cfg->inputs[ch->input_idx].input; input_idx 832 drivers/media/platform/davinci/vpif_capture.c input = chan_cfg->inputs[ch->input_idx].input; input_idx 894 drivers/media/platform/davinci/vpif_capture.c *index = ch->input_idx; input_idx 1109 drivers/media/platform/davinci/vpif_capture.c input = chan_cfg->inputs[ch->input_idx].input; input_idx 1143 drivers/media/platform/davinci/vpif_capture.c input = chan_cfg->inputs[ch->input_idx].input; input_idx 1179 drivers/media/platform/davinci/vpif_capture.c input = chan_cfg->inputs[ch->input_idx].input; input_idx 1273 drivers/media/platform/davinci/vpif_capture.c input = chan_cfg->inputs[ch->input_idx].input; input_idx 88 drivers/media/platform/davinci/vpif_capture.h u32 input_idx; input_idx 3070 sound/pci/hda/hda_generic.c static int new_analog_input(struct hda_codec *codec, int input_idx, input_idx 3086 sound/pci/hda/hda_generic.c spec->loopback_paths[input_idx] = snd_hda_get_path_idx(codec, path);