input_clk        4857 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	uint32_t input_clk;
input_clk        4898 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		input_clk = input[i+1] * 100;
input_clk        4901 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		if (smu7_check_clk_voltage_valid(hwmgr, type, input_clk, input_vol)) {
input_clk        4902 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			podn_dpm_table_in_backend->entries[input_level].clock = input_clk;
input_clk        4903 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			podn_vdd_dep_in_backend->entries[input_level].clk = input_clk;
input_clk        5163 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	uint32_t input_clk;
input_clk        5206 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		input_clk = input[i+1] * 100;
input_clk        5209 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		if (vega10_check_clk_voltage_valid(hwmgr, type, input_clk, input_vol)) {
input_clk        5210 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			dpm_table->dpm_levels[input_level].value = input_clk;
input_clk        5211 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			podn_vdd_dep_table->entries[input_level].clk = input_clk;
input_clk        2915 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	int32_t input_index, input_clk, input_vol, i;
input_clk        2938 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 			input_clk = input[i + 1];
input_clk        2946 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 			if (input_clk < od8_settings[OD8_SETTING_GFXCLK_FMIN].min_value ||
input_clk        2947 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 			    input_clk > od8_settings[OD8_SETTING_GFXCLK_FMAX].max_value) {
input_clk        2949 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 					input_clk,
input_clk        2955 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 			if ((input_index == 0 && od_table->GfxclkFmin != input_clk) ||
input_clk        2956 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 			    (input_index == 1 && od_table->GfxclkFmax != input_clk))
input_clk        2960 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 				od_table->GfxclkFmin = input_clk;
input_clk        2962 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 				od_table->GfxclkFmax = input_clk;
input_clk        2981 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 			input_clk = input[i + 1];
input_clk        2989 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 			if (input_clk < od8_settings[OD8_SETTING_UCLK_FMAX].min_value ||
input_clk        2990 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 			    input_clk > od8_settings[OD8_SETTING_UCLK_FMAX].max_value) {
input_clk        2992 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 					input_clk,
input_clk        2998 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 			if (input_index == 1 && od_table->UclkFmax != input_clk)
input_clk        3001 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 			od_table->UclkFmax = input_clk;
input_clk        3025 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 			input_clk = input[i + 1];
input_clk        3036 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 			if (input_clk < od8_settings[od8_id].min_value ||
input_clk        3037 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 			    input_clk > od8_settings[od8_id].max_value) {
input_clk        3039 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 					input_clk,
input_clk        3057 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 				od_table->GfxclkFreq1 = input_clk;
input_clk        3061 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 				od_table->GfxclkFreq2 = input_clk;
input_clk        3065 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 				od_table->GfxclkFreq3 = input_clk;
input_clk        2625 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 	int32_t input_index, input_clk, input_vol, i;
input_clk        2651 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 			input_clk = input[i + 1];
input_clk        2659 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 			if (input_clk < od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMIN].min_value ||
input_clk        2660 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 			    input_clk > od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMAX].max_value) {
input_clk        2662 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 					input_clk,
input_clk        2668 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 			if (input_index == 0 && od_table->GfxclkFmin != input_clk) {
input_clk        2669 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 				od_table->GfxclkFmin = input_clk;
input_clk        2671 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 			} else if (input_index == 1 && od_table->GfxclkFmax != input_clk) {
input_clk        2672 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 				od_table->GfxclkFmax = input_clk;
input_clk        2700 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 			input_clk = input[i + 1];
input_clk        2708 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 			if (input_clk < clocks.data[0].clocks_in_khz / 1000 ||
input_clk        2709 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 			    input_clk > od8_settings->od8_settings_array[OD8_SETTING_UCLK_FMAX].max_value) {
input_clk        2711 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 					input_clk,
input_clk        2717 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 			if (input_index == 1 && od_table->UclkFmax != input_clk) {
input_clk        2719 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 				od_table->UclkFmax = input_clk;
input_clk        2744 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 			input_clk = input[i + 1];
input_clk        2755 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 			if (input_clk < od8_settings->od8_settings_array[od8_id].min_value ||
input_clk        2756 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 			    input_clk > od8_settings->od8_settings_array[od8_id].max_value) {
input_clk        2758 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 					input_clk,
input_clk        2776 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 				od_table->GfxclkFreq1 = input_clk;
input_clk        2780 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 				od_table->GfxclkFreq2 = input_clk;
input_clk        2784 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 				od_table->GfxclkFreq3 = input_clk;
input_clk          60 drivers/gpu/drm/nouveau/nouveau_led.c 	u32 input_clk = 27e6; /* PDISPLAY.SOR[1].PWM is connected to the crystal */
input_clk          64 drivers/gpu/drm/nouveau/nouveau_led.c 	div = input_clk / freq;
input_clk         155 drivers/i2c/busses/i2c-cadence.c 	unsigned long input_clk;
input_clk         673 drivers/i2c/busses/i2c-cadence.c static int cdns_i2c_calc_divs(unsigned long *f, unsigned long input_clk,
input_clk         681 drivers/i2c/busses/i2c-cadence.c 	temp = input_clk / (22 * fscl);
input_clk         692 drivers/i2c/busses/i2c-cadence.c 		div_b = DIV_ROUND_UP(input_clk, 22 * fscl * (div_a + 1));
input_clk         698 drivers/i2c/busses/i2c-cadence.c 		actual_fscl = input_clk / (22 * (div_a + 1) * (div_b + 1));
input_clk         785 drivers/i2c/busses/i2c-cadence.c 		unsigned long input_clk = ndata->new_rate;
input_clk         790 drivers/i2c/busses/i2c-cadence.c 		ret = cdns_i2c_calc_divs(&fscl, input_clk, &div_a, &div_b);
input_clk         804 drivers/i2c/busses/i2c-cadence.c 		id->input_clk = ndata->new_rate;
input_clk         939 drivers/i2c/busses/i2c-cadence.c 	id->input_clk = clk_get_rate(id->clk);
input_clk         949 drivers/i2c/busses/i2c-cadence.c 	ret = cdns_i2c_setclk(id->input_clk, id);
input_clk        2446 drivers/media/i2c/ov5670.c 	u32 input_clk = 0;
input_clk        2449 drivers/media/i2c/ov5670.c 	device_property_read_u32(&client->dev, "clock-frequency", &input_clk);
input_clk        2450 drivers/media/i2c/ov5670.c 	if (input_clk != 19200000)