inno 280 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c int (*init)(struct inno_hdmi_phy *inno); inno 281 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c int (*power_on)(struct inno_hdmi_phy *inno, inno 284 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c void (*power_off)(struct inno_hdmi_phy *inno); inno 382 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c static inline void inno_write(struct inno_hdmi_phy *inno, u32 reg, u8 val) inno 384 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c regmap_write(inno->regmap, reg * 4, val); inno 387 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c static inline u8 inno_read(struct inno_hdmi_phy *inno, u32 reg) inno 391 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c regmap_read(inno->regmap, reg * 4, &val); inno 396 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c static inline void inno_update_bits(struct inno_hdmi_phy *inno, u8 reg, inno 399 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c regmap_update_bits(inno->regmap, reg * 4, mask, val); inno 402 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define inno_poll(inno, reg, val, cond, sleep_us, timeout_us) \ inno 403 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c regmap_read_poll_timeout((inno)->regmap, (reg) * 4, val, cond, \ inno 406 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c static unsigned long inno_hdmi_phy_get_tmdsclk(struct inno_hdmi_phy *inno, inno 409 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c int bus_width = phy_get_bus_width(inno->phy); inno 426 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = dev_id; inno 429 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c intr_stat1 = inno_read(inno, 0x04); inno 430 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c intr_stat2 = inno_read(inno, 0x06); inno 431 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c intr_stat3 = inno_read(inno, 0x08); inno 434 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0x04, intr_stat1); inno 436 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0x06, intr_stat2); inno 438 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0x08, intr_stat3); inno 448 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = dev_id; inno 450 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0x02, RK3328_PDATA_EN, 0); inno 452 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0x02, RK3328_PDATA_EN, RK3328_PDATA_EN); inno 459 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = phy_get_drvdata(phy); inno 461 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c const struct phy_config *phy_cfg = inno->plat_data->phy_cfg_table; inno 462 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c unsigned long tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, inno 463 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->pixclock); inno 467 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_err(inno->dev, "TMDS clock is zero!\n"); inno 471 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (!inno->plat_data->ops->power_on) inno 476 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c cfg->version & inno->chip_version) inno 486 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_dbg(inno->dev, "Inno HDMI PHY Power On\n"); inno 488 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = clk_prepare_enable(inno->phyclk); inno 492 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = inno->plat_data->ops->power_on(inno, cfg, phy_cfg); inno 494 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c clk_disable_unprepare(inno->phyclk); inno 503 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = phy_get_drvdata(phy); inno 505 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (!inno->plat_data->ops->power_off) inno 508 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->plat_data->ops->power_off(inno); inno 510 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c clk_disable_unprepare(inno->phyclk); inno 512 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_dbg(inno->dev, "Inno HDMI PHY Power Off\n"); inno 524 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct pre_pll_config *inno_hdmi_phy_get_pre_pll_cfg(struct inno_hdmi_phy *inno, inno 528 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c unsigned long tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate); inno 542 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = to_inno_hdmi_phy(hw); inno 545 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c status = inno_read(inno, 0xe0) & RK3228_PRE_PLL_POWER_DOWN; inno 551 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = to_inno_hdmi_phy(hw); inno 553 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe0, RK3228_PRE_PLL_POWER_DOWN, 0); inno 559 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = to_inno_hdmi_phy(hw); inno 561 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe0, RK3228_PRE_PLL_POWER_DOWN, inno 569 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = to_inno_hdmi_phy(hw); inno 574 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c nd = inno_read(inno, 0xe2) & RK3228_PRE_PLL_PRE_DIV_MASK; inno 575 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c nf = (inno_read(inno, 0xe2) & RK3228_PRE_PLL_FB_DIV_8_MASK) << 1; inno 576 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c nf |= inno_read(inno, 0xe3); inno 579 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (inno_read(inno, 0xe2) & RK3228_PCLK_VCO_DIV_5_MASK) { inno 582 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c no_a = inno_read(inno, 0xe4) & RK3228_PRE_PLL_PCLK_DIV_A_MASK; inno 585 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c no_b = inno_read(inno, 0xe4) & RK3228_PRE_PLL_PCLK_DIV_B_MASK; inno 588 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c no_d = inno_read(inno, 0xe5) & RK3228_PRE_PLL_PCLK_DIV_D_MASK; inno 593 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->pixclock = vco; inno 595 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_dbg(inno->dev, "%s rate %lu\n", __func__, inno->pixclock); inno 622 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = to_inno_hdmi_phy(hw); inno 624 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c unsigned long tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate); inno 628 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_dbg(inno->dev, "%s rate %lu tmdsclk %lu\n", inno 631 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c cfg = inno_hdmi_phy_get_pre_pll_cfg(inno, rate); inno 636 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe0, RK3228_PRE_PLL_POWER_DOWN, inno 639 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe2, RK3228_PRE_PLL_FB_DIV_8_MASK | inno 645 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xe3, RK3228_PRE_PLL_FB_DIV_7_0(cfg->fbdiv)); inno 646 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe4, RK3228_PRE_PLL_PCLK_DIV_B_MASK | inno 650 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe5, RK3228_PRE_PLL_PCLK_DIV_C_MASK | inno 654 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe6, RK3228_PRE_PLL_TMDSCLK_DIV_C_MASK | inno 662 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe0, RK3228_PRE_PLL_POWER_DOWN, 0); inno 665 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = inno_poll(inno, 0xe8, v, v & RK3228_PRE_PLL_LOCK_STATUS, inno 668 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_err(inno->dev, "Pre-PLL locking failed\n"); inno 672 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->pixclock = rate; inno 688 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = to_inno_hdmi_phy(hw); inno 691 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c status = inno_read(inno, 0xa0) & RK3328_PRE_PLL_POWER_DOWN; inno 697 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = to_inno_hdmi_phy(hw); inno 699 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN, 0); inno 705 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = to_inno_hdmi_phy(hw); inno 707 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN, inno 715 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = to_inno_hdmi_phy(hw); inno 721 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c nd = inno_read(inno, 0xa1) & RK3328_PRE_PLL_PRE_DIV_MASK; inno 722 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c nf = ((inno_read(inno, 0xa2) & RK3328_PRE_PLL_FB_DIV_11_8_MASK) << 8); inno 723 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c nf |= inno_read(inno, 0xa3); inno 726 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (!(inno_read(inno, 0xa2) & RK3328_PRE_PLL_FRAC_DIV_DISABLE)) { inno 727 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c frac = inno_read(inno, 0xd3) | inno 728 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c (inno_read(inno, 0xd2) << 8) | inno 729 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c (inno_read(inno, 0xd1) << 16); inno 733 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (inno_read(inno, 0xa0) & RK3328_PCLK_VCO_DIV_5_MASK) { inno 736 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c no_a = inno_read(inno, 0xa5) & RK3328_PRE_PLL_PCLK_DIV_A_MASK; inno 737 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c no_b = inno_read(inno, 0xa5) & RK3328_PRE_PLL_PCLK_DIV_B_MASK; inno 740 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c no_c = inno_read(inno, 0xa6) & RK3328_PRE_PLL_PCLK_DIV_C_MASK; inno 743 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c no_d = inno_read(inno, 0xa6) & RK3328_PRE_PLL_PCLK_DIV_D_MASK; inno 748 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->pixclock = vco; inno 749 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_dbg(inno->dev, "%s rate %lu\n", __func__, inno->pixclock); inno 776 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = to_inno_hdmi_phy(hw); inno 778 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c unsigned long tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate); inno 782 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_dbg(inno->dev, "%s rate %lu tmdsclk %lu\n", inno 785 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c cfg = inno_hdmi_phy_get_pre_pll_cfg(inno, rate); inno 789 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN, inno 793 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xa0, RK3228_PCLK_VCO_DIV_5_MASK, inno 795 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xa1, RK3328_PRE_PLL_PRE_DIV(cfg->prediv)); inno 800 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xa2, RK3328_PRE_PLL_FB_DIV_11_8(cfg->fbdiv) | val); inno 801 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xa3, RK3328_PRE_PLL_FB_DIV_7_0(cfg->fbdiv)); inno 802 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xa5, RK3328_PRE_PLL_PCLK_DIV_A(cfg->pclk_div_a) | inno 804 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xa6, RK3328_PRE_PLL_PCLK_DIV_C(cfg->pclk_div_c) | inno 806 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xa4, RK3328_PRE_PLL_TMDSCLK_DIV_C(cfg->tmds_div_c) | inno 809 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xd3, RK3328_PRE_PLL_FRAC_DIV_7_0(cfg->fracdiv)); inno 810 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xd2, RK3328_PRE_PLL_FRAC_DIV_15_8(cfg->fracdiv)); inno 811 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xd1, RK3328_PRE_PLL_FRAC_DIV_23_16(cfg->fracdiv)); inno 813 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN, 0); inno 816 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = inno_poll(inno, 0xa9, val, val & RK3328_PRE_PLL_LOCK_STATUS, inno 819 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_err(inno->dev, "Pre-PLL locking failed\n"); inno 823 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->pixclock = rate; inno 837 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c static int inno_hdmi_phy_clk_register(struct inno_hdmi_phy *inno) inno 839 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct device *dev = inno->dev; inno 845 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c parent_name = __clk_get_name(inno->refoclk); inno 851 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c init.ops = inno->plat_data->clk_ops; inno 856 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->hw.init = &init; inno 858 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->phyclk = devm_clk_register(dev, &inno->hw); inno 859 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (IS_ERR(inno->phyclk)) { inno 860 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = PTR_ERR(inno->phyclk); inno 865 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = of_clk_add_provider(np, of_clk_src_simple_get, inno->phyclk); inno 874 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c static int inno_hdmi_phy_rk3228_init(struct inno_hdmi_phy *inno) inno 880 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0x01, RK3228_BYPASS_RXSENSE_EN | inno 883 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0x02, RK3228_BYPASS_PDATA_EN, inno 887 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xaa, RK3228_POST_PLL_CTRL_MANUAL, inno 890 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->chip_version = 1; inno 896 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_hdmi_phy_rk3228_power_on(struct inno_hdmi_phy *inno, inno 903 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0x02, RK3228_PDATAEN_DISABLE, inno 905 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe0, RK3228_PRE_PLL_POWER_DOWN | inno 911 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe9, RK3228_POST_PLL_PRE_DIV_MASK, inno 913 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xeb, RK3228_POST_PLL_FB_DIV_8_MASK, inno 915 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xea, RK3228_POST_PLL_FB_DIV_7_0(cfg->fbdiv)); inno 918 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe9, RK3228_POST_PLL_POST_DIV_ENABLE, inno 923 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe9, RK3228_POST_PLL_POST_DIV_ENABLE, inno 925 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xeb, RK3228_POST_PLL_POST_DIV_MASK, inno 930 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xef + v, phy_cfg->regs[v]); inno 932 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe0, RK3228_PRE_PLL_POWER_DOWN | inno 934 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe1, RK3228_BANDGAP_ENABLE, inno 936 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe1, RK3228_TMDS_DRIVER_ENABLE, inno 940 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = inno_poll(inno, 0xeb, v, v & RK3228_POST_PLL_LOCK_STATUS, inno 943 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_err(inno->dev, "Post-PLL locking failed\n"); inno 950 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0x02, RK3228_PDATAEN_DISABLE, 0); inno 954 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c static void inno_hdmi_phy_rk3228_power_off(struct inno_hdmi_phy *inno) inno 956 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe1, RK3228_TMDS_DRIVER_ENABLE, 0); inno 957 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe1, RK3228_BANDGAP_ENABLE, 0); inno 958 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xe0, RK3228_POST_PLL_POWER_DOWN, inno 968 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c static int inno_hdmi_phy_rk3328_init(struct inno_hdmi_phy *inno) inno 978 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0x01, RK3328_BYPASS_RXSENSE_EN | inno 981 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0x02, RK3328_INT_POL_HIGH | RK3328_BYPASS_PDATA_EN | inno 985 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0x05, 0); inno 986 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0x07, 0); inno 989 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->chip_version = 1; inno 990 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c cell = nvmem_cell_get(inno->dev, "cpu-version"); inno 1004 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->chip_version = efuse_buf[0] + 1; inno 1011 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_hdmi_phy_rk3328_power_on(struct inno_hdmi_phy *inno, inno 1018 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0x02, RK3328_PDATA_EN, 0); inno 1019 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xaa, RK3328_POST_PLL_POWER_DOWN, inno 1022 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xac, RK3328_POST_PLL_FB_DIV_7_0(cfg->fbdiv)); inno 1024 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xaa, RK3328_POST_PLL_REFCLK_SEL_TMDS); inno 1025 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xab, RK3328_POST_PLL_FB_DIV_8(cfg->fbdiv) | inno 1030 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xad, v); inno 1031 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xab, RK3328_POST_PLL_FB_DIV_8(cfg->fbdiv) | inno 1033 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xaa, RK3328_POST_PLL_POST_DIV_ENABLE | inno 1038 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xb5 + v, phy_cfg->regs[v]); inno 1042 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xc8 + v, RK3328_ESD_DETECT_MASK, inno 1047 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c v = clk_get_rate(inno->sysclk) / 100000; inno 1048 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xc5, RK3328_TERM_RESISTOR_CALIB_SPEED_14_8(v) inno 1050 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xc6, RK3328_TERM_RESISTOR_CALIB_SPEED_7_0(v)); inno 1051 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xc7, RK3328_TERM_RESISTOR_100); inno 1052 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xc5, inno 1055 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xc5, RK3328_BYPASS_TERM_RESISTOR_CALIB); inno 1059 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xc8, inno 1066 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xc9 + v, inno 1071 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xaa, RK3328_POST_PLL_POWER_DOWN, 0); inno 1072 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xb0, RK3328_BANDGAP_ENABLE, inno 1074 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xb2, RK3328_TMDS_DRIVER_ENABLE, inno 1078 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = inno_poll(inno, 0xaf, v, v & RK3328_POST_PLL_LOCK_STATUS, inno 1081 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_err(inno->dev, "Post-PLL locking failed\n"); inno 1088 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0x02, RK3328_PDATA_EN, RK3328_PDATA_EN); inno 1091 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0x05, RK3328_INT_TMDS_CLK(RK3328_INT_VSS_AGND_ESD_DET) inno 1093 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0x07, RK3328_INT_TMDS_D1(RK3328_INT_VSS_AGND_ESD_DET) inno 1098 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c static void inno_hdmi_phy_rk3328_power_off(struct inno_hdmi_phy *inno) inno 1100 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xb2, RK3328_TMDS_DRIVER_ENABLE, 0); inno 1101 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xb0, RK3328_BANDGAP_ENABLE, 0); inno 1102 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xaa, RK3328_POST_PLL_POWER_DOWN, inno 1106 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0x05, 0); inno 1107 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0x07, 0); inno 1137 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno = data; inno 1139 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c clk_disable_unprepare(inno->refpclk); inno 1140 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c clk_disable_unprepare(inno->sysclk); inno 1145 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c struct inno_hdmi_phy *inno; inno 1151 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno = devm_kzalloc(&pdev->dev, sizeof(*inno), GFP_KERNEL); inno 1152 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (!inno) inno 1155 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->dev = &pdev->dev; inno 1157 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->plat_data = of_device_get_match_data(inno->dev); inno 1158 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (!inno->plat_data || !inno->plat_data->ops) inno 1162 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c regs = devm_ioremap_resource(inno->dev, res); inno 1166 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->sysclk = devm_clk_get(inno->dev, "sysclk"); inno 1167 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (IS_ERR(inno->sysclk)) { inno 1168 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = PTR_ERR(inno->sysclk); inno 1169 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_err(inno->dev, "failed to get sysclk: %d\n", ret); inno 1173 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->refpclk = devm_clk_get(inno->dev, "refpclk"); inno 1174 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (IS_ERR(inno->refpclk)) { inno 1175 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = PTR_ERR(inno->refpclk); inno 1176 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_err(inno->dev, "failed to get ref clock: %d\n", ret); inno 1180 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->refoclk = devm_clk_get(inno->dev, "refoclk"); inno 1181 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (IS_ERR(inno->refoclk)) { inno 1182 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = PTR_ERR(inno->refoclk); inno 1183 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_err(inno->dev, "failed to get oscillator-ref clock: %d\n", inno 1188 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = clk_prepare_enable(inno->sysclk); inno 1190 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_err(inno->dev, "Cannot enable inno phy sysclk: %d\n", ret); inno 1198 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = clk_prepare_enable(inno->refpclk); inno 1200 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_err(inno->dev, "failed to enable refpclk\n"); inno 1201 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c clk_disable_unprepare(inno->sysclk); inno 1205 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = devm_add_action_or_reset(inno->dev, inno_hdmi_phy_action, inno 1206 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno); inno 1210 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->regmap = devm_regmap_init_mmio(inno->dev, regs, inno 1212 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (IS_ERR(inno->regmap)) inno 1213 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c return PTR_ERR(inno->regmap); inno 1216 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->irq = platform_get_irq(pdev, 0); inno 1217 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (inno->irq > 0) { inno 1218 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = devm_request_threaded_irq(inno->dev, inno->irq, inno 1222 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_name(inno->dev), inno); inno 1227 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno->phy = devm_phy_create(inno->dev, NULL, &inno_hdmi_phy_ops); inno 1228 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (IS_ERR(inno->phy)) { inno 1229 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c dev_err(inno->dev, "failed to create HDMI PHY\n"); inno 1230 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c return PTR_ERR(inno->phy); inno 1233 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c phy_set_drvdata(inno->phy, inno); inno 1234 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c phy_set_bus_width(inno->phy, 8); inno 1236 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c if (inno->plat_data->ops->init) { inno 1237 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = inno->plat_data->ops->init(inno); inno 1242 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = inno_hdmi_phy_clk_register(inno); inno 1246 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c phy_provider = devm_of_phy_provider_register(inno->dev,