init_r            195 drivers/clk/analogbits/wrpll-cln28hpc.c 	c->init_r = DIV_ROUND_UP_ULL(parent_rate, MAX_POST_DIVR_FREQ);
init_r            272 drivers/clk/analogbits/wrpll-cln28hpc.c 	for (r = c->init_r; r <= c->max_r; ++r) {
init_r             68 include/linux/clk/analogbits-wrpll-cln28hpc.h 	u8 init_r;