init_frac 582 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c uint32_t init_frac = 0; init_frac 600 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c init_frac = dc_fixpt_u0d19(data->inits.h) << 5; init_frac 603 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c SCL_H_INIT_FRAC, init_frac, init_frac 606 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c init_frac = dc_fixpt_u0d19(data->inits.h_c) << 5; init_frac 609 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c SCL_H_INIT_FRAC_C, init_frac, init_frac 612 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c init_frac = dc_fixpt_u0d19(data->inits.v) << 5; init_frac 615 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c SCL_V_INIT_FRAC, init_frac, init_frac 619 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c init_frac = dc_fixpt_u0d19(data->inits.v_bot) << 5; init_frac 622 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c SCL_V_INIT_FRAC_BOT, init_frac, init_frac 626 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c init_frac = dc_fixpt_u0d19(data->inits.v_c) << 5; init_frac 629 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c SCL_V_INIT_FRAC_C, init_frac, init_frac 633 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c init_frac = dc_fixpt_u0d19(data->inits.v_c_bot) << 5; init_frac 636 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c SCL_V_INIT_FRAC_BOT_C, init_frac, init_frac 1867 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c int init_frac[GPC_MAX], init_err[GPC_MAX], run_err[GPC_MAX], i, j; init_frac 1920 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c init_frac[i] = gr->tpc_nr[gpc_map[i]] * gr->gpc_nr * mul_factor; init_frac 1922 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c run_err[i] = init_frac[i] + init_err[i]; init_frac 1929 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c run_err[j] += init_frac[j] - comm_denom; init_frac 1931 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c run_err[j] += init_frac[j];