info_packet 2118 drivers/gpu/drm/amd/display/dc/core/dc_resource.c struct dc_info_packet *info_packet, info_packet 2366 drivers/gpu/drm/amd/display/dc/core/dc_resource.c info_packet->hb0 = hdmi_info.packet_raw_data.hb0; info_packet 2367 drivers/gpu/drm/amd/display/dc/core/dc_resource.c info_packet->hb1 = hdmi_info.packet_raw_data.hb1; info_packet 2368 drivers/gpu/drm/amd/display/dc/core/dc_resource.c info_packet->hb2 = hdmi_info.packet_raw_data.hb2; info_packet 2371 drivers/gpu/drm/amd/display/dc/core/dc_resource.c info_packet->sb[byte_index] = hdmi_info.packet_raw_data.sb[byte_index]; info_packet 2373 drivers/gpu/drm/amd/display/dc/core/dc_resource.c info_packet->valid = true; info_packet 2377 drivers/gpu/drm/amd/display/dc/core/dc_resource.c struct dc_info_packet *info_packet, info_packet 2388 drivers/gpu/drm/amd/display/dc/core/dc_resource.c *info_packet = stream->vsp_infopacket; info_packet 2392 drivers/gpu/drm/amd/display/dc/core/dc_resource.c struct dc_info_packet *info_packet, info_packet 2403 drivers/gpu/drm/amd/display/dc/core/dc_resource.c *info_packet = stream->vrr_infopacket; info_packet 2407 drivers/gpu/drm/amd/display/dc/core/dc_resource.c struct dc_info_packet *info_packet, info_packet 2416 drivers/gpu/drm/amd/display/dc/core/dc_resource.c *info_packet = stream->hdr_static_metadata; info_packet 2420 drivers/gpu/drm/amd/display/dc/core/dc_resource.c struct dc_info_packet *info_packet, info_packet 2426 drivers/gpu/drm/amd/display/dc/core/dc_resource.c *info_packet = stream->vsc_infopacket; info_packet 68 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c const struct dc_info_packet *info_packet) info_packet 111 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c AFMT_GENERIC_HB0, info_packet->hb0, info_packet 112 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c AFMT_GENERIC_HB1, info_packet->hb1, info_packet 113 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c AFMT_GENERIC_HB2, info_packet->hb2, info_packet 114 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c AFMT_GENERIC_HB3, info_packet->hb3); info_packet 122 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c (const uint32_t *) &info_packet->sb[0]; info_packet 185 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c const struct dc_info_packet *info_packet) info_packet 189 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c if (info_packet->valid) { info_packet 193 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c info_packet); info_packet 59 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c const struct dc_info_packet *info_packet) info_packet 98 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c AFMT_GENERIC_HB0, info_packet->hb0, info_packet 99 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c AFMT_GENERIC_HB1, info_packet->hb1, info_packet 100 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c AFMT_GENERIC_HB2, info_packet->hb2, info_packet 101 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c AFMT_GENERIC_HB3, info_packet->hb3); info_packet 109 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c (const uint32_t *) &info_packet->sb[0]; info_packet 162 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c const struct dc_info_packet *info_packet) info_packet 166 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c if (info_packet->valid) { info_packet 170 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c info_packet); info_packet 523 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h const struct dc_info_packet *info_packet); info_packet 52 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c const struct dc_info_packet *info_packet) info_packet 56 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c if (info_packet->valid) { info_packet 60 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c info_packet); info_packet 213 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c const struct dc_info_packet_128 *info_packet) info_packet 221 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c const uint32_t *content = (const uint32_t *) &info_packet->sb[0]; info_packet 223 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c ASSERT(info_packet->hb1 == DC_DP_INFOFRAME_TYPE_PPS); info_packet 246 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c AFMT_GENERIC_HB0, info_packet->hb0, info_packet 247 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c AFMT_GENERIC_HB1, info_packet->hb1, info_packet 248 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c AFMT_GENERIC_HB2, info_packet->hb2, info_packet 249 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c AFMT_GENERIC_HB3, info_packet->hb3); info_packet 36 drivers/gpu/drm/amd/display/modules/inc/mod_info_packet.h struct dc_info_packet *info_packet); info_packet 118 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c struct dc_info_packet *info_packet) info_packet 148 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->hb0 = 0x00; info_packet 152 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->hb1 = 0x07; info_packet 156 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->hb2 = 0x02; info_packet 160 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->hb3 = 0x08; info_packet 163 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->sb[i] = 0; info_packet 165 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->valid = true; info_packet 170 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->hb0 = 0x00; // Secondary-data Packet ID = 0 info_packet 171 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->hb1 = 0x07; // 07h = Packet Type Value indicating Video Stream Configuration packet info_packet 172 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->hb2 = 0x01; // 01h = Revision number. VSC SDP supporting 3D stereo only info_packet 173 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->hb3 = 0x01; // 01h = VSC SDP supporting 3D stereo only (HB2 = 01h). info_packet 175 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->valid = true; info_packet 211 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->sb[0] = 0x02; // Stacked Frame, Left view is on top and right view on bottom. info_packet 215 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->sb[0] = 0x01; // Frame/Field Sequential, L + R view indication based on MISC1 bit 2:1 info_packet 219 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->sb[0] = 0x04; // Side-by-side info_packet 222 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->sb[0] = 0x00; // No Stereo Video, Shall be cleared to 0x0. info_packet 241 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->hb0 = 0x00; info_packet 243 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->hb1 = 0x07; info_packet 245 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->hb2 = 0x05; info_packet 247 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->hb3 = 0x13; info_packet 249 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->valid = true; info_packet 351 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->sb[16] = (pixelEncoding << 4) | colorimetryFormat; info_packet 359 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->sb[17] = 0; info_packet 362 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->sb[17] = 1; info_packet 365 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->sb[17] = 2; info_packet 368 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->sb[17] = 3; info_packet 372 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->sb[17] = 4; info_packet 375 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->sb[17] = 0; info_packet 383 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->sb[17] |= 0x80; /* DB17 bit 7 set to 1 for CEA timing. */ info_packet 393 drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c info_packet->sb[18] = 0; info_packet 1404 drivers/tty/ipwireless/hardware.c struct ipw_setup_info_packet *info_packet; info_packet 1473 drivers/tty/ipwireless/hardware.c info_packet = alloc_ctrl_packet(sizeof(struct ipw_setup_info_packet), info_packet 1477 drivers/tty/ipwireless/hardware.c if (!info_packet) info_packet 1479 drivers/tty/ipwireless/hardware.c info_packet->header.length = sizeof(struct tl_setup_info_msg); info_packet 1480 drivers/tty/ipwireless/hardware.c info_packet->body.driver_type = NDISWAN_DRIVER; info_packet 1481 drivers/tty/ipwireless/hardware.c info_packet->body.major_version = NDISWAN_DRIVER_MAJOR_VERSION; info_packet 1482 drivers/tty/ipwireless/hardware.c info_packet->body.minor_version = NDISWAN_DRIVER_MINOR_VERSION; info_packet 1483 drivers/tty/ipwireless/hardware.c send_packet(hw, PRIO_SETUP, &info_packet->header);