indirect_ctx      129 drivers/gpu/drm/i915/gt/intel_engine_types.h 	} indirect_ctx, per_ctx;
indirect_ctx     2252 drivers/gpu/drm/i915/gt/intel_lrc.c 	struct i915_wa_ctx_bb *wa_bb[2] = { &wa_ctx->indirect_ctx,
indirect_ctx     3235 drivers/gpu/drm/i915/gt/intel_lrc.c 		if (wa_ctx->indirect_ctx.size) {
indirect_ctx     3239 drivers/gpu/drm/i915/gt/intel_lrc.c 				(ggtt_offset + wa_ctx->indirect_ctx.offset) |
indirect_ctx     3240 drivers/gpu/drm/i915/gt/intel_lrc.c 				(wa_ctx->indirect_ctx.size / CACHELINE_BYTES);
indirect_ctx     2817 drivers/gpu/drm/i915/gvt/cmd_parser.c 	if (WARN_ON(!IS_ALIGNED(wa_ctx->indirect_ctx.guest_gma,
indirect_ctx     2821 drivers/gpu/drm/i915/gvt/cmd_parser.c 	ring_tail = wa_ctx->indirect_ctx.size + 3 * sizeof(u32);
indirect_ctx     2822 drivers/gpu/drm/i915/gvt/cmd_parser.c 	ring_size = round_up(wa_ctx->indirect_ctx.size + CACHELINE_BYTES,
indirect_ctx     2824 drivers/gpu/drm/i915/gvt/cmd_parser.c 	gma_head = wa_ctx->indirect_ctx.guest_gma;
indirect_ctx     2825 drivers/gpu/drm/i915/gvt/cmd_parser.c 	gma_tail = wa_ctx->indirect_ctx.guest_gma + ring_tail;
indirect_ctx     2826 drivers/gpu/drm/i915/gvt/cmd_parser.c 	gma_bottom = wa_ctx->indirect_ctx.guest_gma + ring_size;
indirect_ctx     2832 drivers/gpu/drm/i915/gvt/cmd_parser.c 	s.ring_start = wa_ctx->indirect_ctx.guest_gma;
indirect_ctx     2836 drivers/gpu/drm/i915/gvt/cmd_parser.c 	s.rb_va = wa_ctx->indirect_ctx.shadow_va;
indirect_ctx     2845 drivers/gpu/drm/i915/gvt/cmd_parser.c 		wa_ctx->indirect_ctx.guest_gma, ring_size);
indirect_ctx     2931 drivers/gpu/drm/i915/gvt/cmd_parser.c 	int ctx_size = wa_ctx->indirect_ctx.size;
indirect_ctx     2932 drivers/gpu/drm/i915/gvt/cmd_parser.c 	unsigned long guest_gma = wa_ctx->indirect_ctx.guest_gma;
indirect_ctx     2972 drivers/gpu/drm/i915/gvt/cmd_parser.c 	wa_ctx->indirect_ctx.obj = obj;
indirect_ctx     2973 drivers/gpu/drm/i915/gvt/cmd_parser.c 	wa_ctx->indirect_ctx.shadow_va = map;
indirect_ctx     2994 drivers/gpu/drm/i915/gvt/cmd_parser.c 	bb_start_sva = (unsigned char *)wa_ctx->indirect_ctx.shadow_va +
indirect_ctx     2995 drivers/gpu/drm/i915/gvt/cmd_parser.c 				wa_ctx->indirect_ctx.size;
indirect_ctx     3010 drivers/gpu/drm/i915/gvt/cmd_parser.c 	if (wa_ctx->indirect_ctx.size == 0)
indirect_ctx      354 drivers/gpu/drm/i915/gvt/scheduler.c 	if (!wa_ctx->indirect_ctx.obj)
indirect_ctx      357 drivers/gpu/drm/i915/gvt/scheduler.c 	i915_gem_object_unpin_map(wa_ctx->indirect_ctx.obj);
indirect_ctx      358 drivers/gpu/drm/i915/gvt/scheduler.c 	i915_gem_object_put(wa_ctx->indirect_ctx.obj);
indirect_ctx      360 drivers/gpu/drm/i915/gvt/scheduler.c 	wa_ctx->indirect_ctx.obj = NULL;
indirect_ctx      361 drivers/gpu/drm/i915/gvt/scheduler.c 	wa_ctx->indirect_ctx.shadow_va = NULL;
indirect_ctx      438 drivers/gpu/drm/i915/gvt/scheduler.c 	if (workload->ring_id == RCS0 && workload->wa_ctx.indirect_ctx.size) {
indirect_ctx      543 drivers/gpu/drm/i915/gvt/scheduler.c 		(~INDIRECT_CTX_ADDR_MASK)) | wa_ctx->indirect_ctx.shadow_gma;
indirect_ctx      550 drivers/gpu/drm/i915/gvt/scheduler.c 		(unsigned char *)wa_ctx->indirect_ctx.shadow_va +
indirect_ctx      551 drivers/gpu/drm/i915/gvt/scheduler.c 		wa_ctx->indirect_ctx.size;
indirect_ctx      553 drivers/gpu/drm/i915/gvt/scheduler.c 	if (wa_ctx->indirect_ctx.size == 0)
indirect_ctx      556 drivers/gpu/drm/i915/gvt/scheduler.c 	vma = i915_gem_object_ggtt_pin(wa_ctx->indirect_ctx.obj, NULL,
indirect_ctx      566 drivers/gpu/drm/i915/gvt/scheduler.c 	wa_ctx->indirect_ctx.shadow_gma = i915_ggtt_offset(vma);
indirect_ctx     1485 drivers/gpu/drm/i915/gvt/scheduler.c 	u32 head, tail, start, ctl, ctx_ctl, per_ctx, indirect_ctx;
indirect_ctx     1556 drivers/gpu/drm/i915/gvt/scheduler.c 			RING_CTX_OFF(rcs_indirect_ctx.val), &indirect_ctx, 4);
indirect_ctx     1558 drivers/gpu/drm/i915/gvt/scheduler.c 		workload->wa_ctx.indirect_ctx.guest_gma =
indirect_ctx     1559 drivers/gpu/drm/i915/gvt/scheduler.c 			indirect_ctx & INDIRECT_CTX_ADDR_MASK;
indirect_ctx     1560 drivers/gpu/drm/i915/gvt/scheduler.c 		workload->wa_ctx.indirect_ctx.size =
indirect_ctx     1561 drivers/gpu/drm/i915/gvt/scheduler.c 			(indirect_ctx & INDIRECT_CTX_SIZE_MASK) *
indirect_ctx     1564 drivers/gpu/drm/i915/gvt/scheduler.c 		if (workload->wa_ctx.indirect_ctx.size != 0) {
indirect_ctx     1566 drivers/gpu/drm/i915/gvt/scheduler.c 				workload->wa_ctx.indirect_ctx.guest_gma,
indirect_ctx     1567 drivers/gpu/drm/i915/gvt/scheduler.c 				workload->wa_ctx.indirect_ctx.size)) {
indirect_ctx     1569 drivers/gpu/drm/i915/gvt/scheduler.c 				    workload->wa_ctx.indirect_ctx.guest_gma);
indirect_ctx       75 drivers/gpu/drm/i915/gvt/scheduler.h 	struct shadow_indirect_ctx indirect_ctx;