BL1_PWM_TARGET_ABM_LEVEL  275 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c 	REG_UPDATE(BL1_PWM_TARGET_ABM_LEVEL,
BL1_PWM_TARGET_ABM_LEVEL  276 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c 			BL1_PWM_TARGET_ABM_LEVEL, backlight);
BL1_PWM_TARGET_ABM_LEVEL  305 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c 	unsigned int backlight = REG_READ(BL1_PWM_TARGET_ABM_LEVEL);
BL1_PWM_TARGET_ABM_LEVEL   50 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SR(BL1_PWM_TARGET_ABM_LEVEL), \
BL1_PWM_TARGET_ABM_LEVEL   64 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SRI(BL1_PWM_TARGET_ABM_LEVEL, ABM, id), \
BL1_PWM_TARGET_ABM_LEVEL   79 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SR(BL1_PWM_TARGET_ABM_LEVEL), \
BL1_PWM_TARGET_ABM_LEVEL  120 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	ABM_SF(BL1_PWM_TARGET_ABM_LEVEL, \
BL1_PWM_TARGET_ABM_LEVEL  121 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 			BL1_PWM_TARGET_ABM_LEVEL, mask_sh), \
BL1_PWM_TARGET_ABM_LEVEL  152 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 			BL1_PWM_TARGET_ABM_LEVEL, mask_sh), \
BL1_PWM_TARGET_ABM_LEVEL  178 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	type BL1_PWM_TARGET_ABM_LEVEL; \
BL1_PWM_TARGET_ABM_LEVEL  218 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	uint32_t BL1_PWM_TARGET_ABM_LEVEL;