imm12             299 arch/arm/net/bpf_jit_32.c static u32 arm_bpf_ldst_imm12(u32 op, u8 rt, u8 rn, s16 imm12)
imm12             302 arch/arm/net/bpf_jit_32.c 	if (imm12 >= 0)
imm12             305 arch/arm/net/bpf_jit_32.c 		imm12 = -imm12;
imm12             306 arch/arm/net/bpf_jit_32.c 	return op | (imm12 & ARM_INST_LDST__IMM12);
imm12             427 arch/arm/net/bpf_jit_32.c 	int imm12 = imm8m(val);
imm12             429 arch/arm/net/bpf_jit_32.c 	if (imm12 >= 0)
imm12             430 arch/arm/net/bpf_jit_32.c 		emit(ARM_MOV_I(rd, imm12), ctx);
imm12              97 arch/arm64/net/bpf_jit.h #define A64_ADDSUB_IMM(sf, Rd, Rn, imm12, type) \
imm12              98 arch/arm64/net/bpf_jit.h 	aarch64_insn_gen_add_sub_imm(Rd, Rn, imm12, \
imm12             101 arch/arm64/net/bpf_jit.h #define A64_ADD_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, ADD)
imm12             102 arch/arm64/net/bpf_jit.h #define A64_SUB_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, SUB)
imm12              37 arch/riscv/kernel/module.c 	u32 imm12 = (offset & 0x1000) << (31 - 12);
imm12              42 arch/riscv/kernel/module.c 	*location = (*location & 0x1fff07f) | imm12 | imm11 | imm10_5 | imm4_1;
imm12             189 arch/riscv/net/bpf_jit_comp.c 	u8 imm12 = ((imm12_1 & 0x800) >> 5) | ((imm12_1 & 0x3f0) >> 4);
imm12             192 arch/riscv/net/bpf_jit_comp.c 	return (imm12 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) |