imem 145 drivers/gpu/drm/nouveau/include/nvkm/core/device.h struct nvkm_instmem *imem; imem 218 drivers/gpu/drm/nouveau/include/nvkm/core/device.h int (*imem )(struct nvkm_device *, int idx, struct nvkm_instmem **); imem 141 drivers/gpu/drm/nouveau/nvkm/core/memory.c struct nvkm_instmem *imem = device->imem; imem 145 drivers/gpu/drm/nouveau/nvkm/core/memory.c if (unlikely(target != NVKM_MEM_TARGET_INST || !imem)) imem 148 drivers/gpu/drm/nouveau/nvkm/core/memory.c ret = nvkm_instobj_new(imem, size, align, zero, &memory); imem 86 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 107 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 129 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 149 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 171 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 193 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 215 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 237 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 259 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 281 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 303 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 325 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 347 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 369 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 391 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 414 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 437 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 459 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv04_instmem_new, imem 482 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 508 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 534 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 560 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 586 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 612 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 638 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 664 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 690 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 716 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 742 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 768 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 794 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 822 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 849 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 875 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 901 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv40_instmem_new, imem 929 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 961 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 993 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1025 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1057 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1089 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1121 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1153 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1187 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1220 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1253 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1285 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1317 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1352 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1389 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1425 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1461 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1498 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1535 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1572 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1608 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1643 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1679 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1718 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1757 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1791 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = gk20a_instmem_new, imem 1821 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1859 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1897 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1935 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 1973 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2007 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2040 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2075 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2110 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2141 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = gk20a_instmem_new, imem 2170 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2206 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2242 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2278 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2314 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2350 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2382 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = gk20a_instmem_new, imem 2411 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2452 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2487 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2522 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2557 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2592 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c .imem = nv50_instmem_new, imem 2654 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c _(INSTMEM , device->imem , &device->imem->subdev); imem 3160 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c _(NVKM_SUBDEV_INSTMEM , imem); imem 108 drivers/gpu/drm/nouveau/nvkm/engine/device/user.c struct nvkm_instmem *imem = device->imem; imem 190 drivers/gpu/drm/nouveau/nvkm/engine/device/user.c if (imem && args->v0.ram_size > 0) imem 191 drivers/gpu/drm/nouveau/nvkm/engine/device/user.c args->v0.ram_user = args->v0.ram_user - imem->reserved; imem 78 drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c struct nvkm_instmem *instmem = device->imem; imem 39 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c struct nvkm_instmem *imem = chan->fifo->base.engine.subdev.device->imem; imem 42 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_ramht_remove(imem->ramht, cookie); imem 51 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c struct nvkm_instmem *imem = chan->fifo->base.engine.subdev.device->imem; imem 67 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4, imem 79 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c struct nvkm_memory *fctx = device->imem->ramfc; imem 144 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c struct nvkm_instmem *imem = fifo->base.engine.subdev.device->imem; imem 147 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_kmap(imem->ramfc); imem 149 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_wo32(imem->ramfc, chan->ramfc + c->ctxp, 0x00000000); imem 151 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_done(imem->ramfc); imem 175 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c struct nvkm_instmem *imem = device->imem; imem 205 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_kmap(imem->ramfc); imem 206 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x00, args->v0.offset); imem 207 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x04, args->v0.offset); imem 208 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x08, chan->base.push->addr >> 4); imem 209 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x10, imem 216 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c nvkm_done(imem->ramfc); imem 46 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c struct nvkm_instmem *imem = device->imem; imem 76 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c nvkm_kmap(imem->ramfc); imem 77 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x00, args->v0.offset); imem 78 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x04, args->v0.offset); imem 79 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x0c, chan->base.push->addr >> 4); imem 80 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x14, imem 87 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c nvkm_done(imem->ramfc); imem 46 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c struct nvkm_instmem *imem = device->imem; imem 77 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c nvkm_kmap(imem->ramfc); imem 78 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x00, args->v0.offset); imem 79 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x04, args->v0.offset); imem 80 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x0c, chan->base.push->addr >> 4); imem 81 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x14, imem 88 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c nvkm_done(imem->ramfc); imem 65 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c struct nvkm_instmem *imem = device->imem; imem 79 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_kmap(imem->ramfc); imem 80 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_wo32(imem->ramfc, chan->ramfc + ctx, 0x00000000); imem 81 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_done(imem->ramfc); imem 95 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c struct nvkm_instmem *imem = device->imem; imem 110 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_kmap(imem->ramfc); imem 111 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_wo32(imem->ramfc, chan->ramfc + ctx, inst); imem 112 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_done(imem->ramfc); imem 147 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c struct nvkm_instmem *imem = chan->fifo->base.engine.subdev.device->imem; imem 163 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4, imem 193 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c struct nvkm_instmem *imem = device->imem; imem 224 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_kmap(imem->ramfc); imem 225 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x00, args->v0.offset); imem 226 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x04, args->v0.offset); imem 227 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x0c, chan->base.push->addr >> 4); imem 228 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x18, 0x30000000 | imem 235 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_wo32(imem->ramfc, chan->ramfc + 0x3c, 0x0001ffff); imem 236 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c nvkm_done(imem->ramfc); imem 303 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c struct nvkm_instmem *imem = device->imem; imem 304 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c struct nvkm_ramht *ramht = imem->ramht; imem 305 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c struct nvkm_memory *ramro = imem->ramro; imem 306 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c struct nvkm_memory *ramfc = imem->ramfc; imem 55 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c struct nvkm_instmem *imem = device->imem; imem 56 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c struct nvkm_ramht *ramht = imem->ramht; imem 57 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c struct nvkm_memory *ramro = imem->ramro; imem 58 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c struct nvkm_memory *ramfc = imem->ramfc; imem 65 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c struct nvkm_instmem *imem = device->imem; imem 66 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c struct nvkm_ramht *ramht = imem->ramht; imem 67 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c struct nvkm_memory *ramro = imem->ramro; imem 68 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c struct nvkm_memory *ramfc = imem->ramfc; imem 33 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv40.c struct nvkm_instmem *imem = device->imem; imem 37 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv40.c u32 dma0 = nvkm_instmem_rd32(imem, inst + 0); imem 38 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv40.c u32 dma1 = nvkm_instmem_rd32(imem, inst + 4); imem 39 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv40.c u32 dma2 = nvkm_instmem_rd32(imem, inst + 8); imem 74 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c nvkm_instobj_dtor(struct nvkm_instmem *imem, struct nvkm_instobj *iobj) imem 76 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c spin_lock(&imem->lock); imem 78 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c spin_unlock(&imem->lock); imem 83 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c struct nvkm_instmem *imem, struct nvkm_instobj *iobj) imem 87 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c spin_lock(&imem->lock); imem 88 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c list_add_tail(&iobj->head, &imem->list); imem 89 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c spin_unlock(&imem->lock); imem 93 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c nvkm_instobj_new(struct nvkm_instmem *imem, u32 size, u32 align, bool zero, imem 96 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c struct nvkm_subdev *subdev = &imem->subdev; imem 101 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c ret = imem->func->memory_new(imem, size, align, zero, &memory); imem 110 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c if (!imem->func->zero && zero) { imem 133 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c nvkm_instmem_rd32(struct nvkm_instmem *imem, u32 addr) imem 135 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c return imem->func->rd32(imem, addr); imem 139 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c nvkm_instmem_wr32(struct nvkm_instmem *imem, u32 addr, u32 data) imem 141 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c return imem->func->wr32(imem, addr, data); imem 145 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c nvkm_instmem_boot(struct nvkm_instmem *imem) imem 152 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c spin_lock(&imem->lock); imem 153 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c list_for_each_entry_safe(iobj, itmp, &imem->list, head) { imem 154 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c list_move_tail(&iobj->head, &imem->boot); imem 156 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c spin_unlock(&imem->lock); imem 162 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c struct nvkm_instmem *imem = nvkm_instmem(subdev); imem 166 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c list_for_each_entry(iobj, &imem->list, head) { imem 174 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c list_for_each_entry(iobj, &imem->boot, head) { imem 181 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c if (imem->func->fini) imem 182 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c imem->func->fini(imem); imem 190 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c struct nvkm_instmem *imem = nvkm_instmem(subdev); imem 193 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c list_for_each_entry(iobj, &imem->boot, head) { imem 200 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c list_for_each_entry(iobj, &imem->list, head) { imem 211 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c struct nvkm_instmem *imem = nvkm_instmem(subdev); imem 212 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c if (imem->func->oneinit) imem 213 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c return imem->func->oneinit(imem); imem 220 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c struct nvkm_instmem *imem = nvkm_instmem(subdev); imem 221 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c if (imem->func->dtor) imem 222 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c return imem->func->dtor(imem); imem 223 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c return imem; imem 237 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c struct nvkm_instmem *imem) imem 239 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c nvkm_subdev_ctor(&nvkm_instmem, device, index, &imem->subdev); imem 240 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c imem->func = func; imem 241 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c spin_lock_init(&imem->lock); imem 242 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c INIT_LIST_HEAD(&imem->list); imem 243 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c INIT_LIST_HEAD(&imem->boot); imem 54 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct gk20a_instmem *imem; imem 145 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct gk20a_instmem *imem = obj->base.imem; imem 151 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c imem->vaddr_use -= nvkm_memory_size(&obj->base.memory); imem 152 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c nvkm_debug(&imem->base.subdev, "vaddr used: %x/%x\n", imem->vaddr_use, imem 153 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c imem->vaddr_max); imem 160 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c gk20a_instmem_vaddr_gc(struct gk20a_instmem *imem, const u64 size) imem 162 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c while (imem->vaddr_use + size > imem->vaddr_max) { imem 164 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c if (list_empty(&imem->vaddr_lru)) imem 168 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c list_first_entry(&imem->vaddr_lru, imem 177 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct gk20a_instmem *imem = node->imem; imem 178 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct nvkm_ltc *ltc = imem->base.subdev.device->ltc; imem 189 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct gk20a_instmem *imem = node->base.imem; imem 190 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct nvkm_ltc *ltc = imem->base.subdev.device->ltc; imem 195 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c mutex_lock(&imem->lock); imem 206 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c gk20a_instmem_vaddr_gc(imem, size); imem 212 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c nvkm_error(&imem->base.subdev, "cannot map instobj - " imem 217 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c imem->vaddr_use += size; imem 218 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c nvkm_debug(&imem->base.subdev, "vaddr used: %x/%x\n", imem 219 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c imem->vaddr_use, imem->vaddr_max); imem 223 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c mutex_unlock(&imem->lock); imem 232 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct gk20a_instmem *imem = node->imem; imem 233 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct nvkm_ltc *ltc = imem->base.subdev.device->ltc; imem 244 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct gk20a_instmem *imem = node->base.imem; imem 245 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct nvkm_ltc *ltc = imem->base.subdev.device->ltc; imem 247 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c mutex_lock(&imem->lock); imem 255 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c list_add_tail(&node->vaddr_node, &imem->vaddr_lru); imem 258 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c mutex_unlock(&imem->lock); imem 298 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct gk20a_instmem *imem = node->base.imem; imem 299 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct device *dev = imem->base.subdev.device->dev; imem 305 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c node->base.vaddr, node->handle, imem->attrs); imem 315 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct gk20a_instmem *imem = node->base.imem; imem 316 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct device *dev = imem->base.subdev.device->dev; imem 323 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c mutex_lock(&imem->lock); imem 329 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c mutex_unlock(&imem->lock); imem 332 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c r->offset &= ~BIT(imem->iommu_bit - imem->iommu_pgshift); imem 336 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c iommu_unmap(imem->domain, imem 337 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c (r->offset + i) << imem->iommu_pgshift, PAGE_SIZE); imem 344 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c mutex_lock(imem->mm_mutex); imem 345 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c nvkm_mm_free(imem->mm, &r); imem 346 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c mutex_unlock(imem->mm_mutex); imem 383 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c gk20a_instobj_ctor_dma(struct gk20a_instmem *imem, u32 npages, u32 align, imem 387 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct nvkm_subdev *subdev = &imem->base.subdev; imem 399 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c imem->attrs); imem 421 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c gk20a_instobj_ctor_iommu(struct gk20a_instmem *imem, u32 npages, u32 align, imem 425 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct nvkm_subdev *subdev = &imem->base.subdev; imem 463 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c mutex_lock(imem->mm_mutex); imem 465 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c ret = nvkm_mm_head(imem->mm, 0, 1, npages, npages, imem 466 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c align >> imem->iommu_pgshift, &r); imem 467 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c mutex_unlock(imem->mm_mutex); imem 475 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c u32 offset = (r->offset + i) << imem->iommu_pgshift; imem 477 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c ret = iommu_map(imem->domain, offset, node->dma_addrs[i], imem 484 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c iommu_unmap(imem->domain, offset, PAGE_SIZE); imem 491 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c r->offset |= BIT(imem->iommu_bit - imem->iommu_pgshift); imem 497 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c mutex_lock(imem->mm_mutex); imem 498 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c nvkm_mm_free(imem->mm, &r); imem 499 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c mutex_unlock(imem->mm_mutex); imem 517 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct gk20a_instmem *imem = gk20a_instmem(base); imem 518 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct nvkm_subdev *subdev = &imem->base.subdev; imem 523 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c imem->domain ? "IOMMU" : "DMA", size, align); imem 529 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c if (imem->domain) imem 530 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c ret = gk20a_instobj_ctor_iommu(imem, size >> PAGE_SHIFT, imem 533 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c ret = gk20a_instobj_ctor_dma(imem, size >> PAGE_SHIFT, imem 539 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c node->imem = imem; imem 550 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct gk20a_instmem *imem = gk20a_instmem(base); imem 553 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c if (!list_empty(&imem->vaddr_lru)) imem 556 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c if (imem->vaddr_use != 0) imem 558 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c "0x%x bytes still mapped\n", imem->vaddr_use); imem 560 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c return imem; imem 575 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c struct gk20a_instmem *imem; imem 577 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c if (!(imem = kzalloc(sizeof(*imem), GFP_KERNEL))) imem 579 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c nvkm_instmem_ctor(&gk20a_instmem, device, index, &imem->base); imem 580 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c mutex_init(&imem->lock); imem 581 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c *pimem = &imem->base; imem 584 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c imem->vaddr_use = 0; imem 585 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c imem->vaddr_max = 0x100000; imem 586 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c INIT_LIST_HEAD(&imem->vaddr_lru); imem 589 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c imem->mm_mutex = &tdev->iommu.mutex; imem 590 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c imem->mm = &tdev->iommu.mm; imem 591 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c imem->domain = tdev->iommu.domain; imem 592 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c imem->iommu_pgshift = tdev->iommu.pgshift; imem 593 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c imem->iommu_bit = tdev->func->iommu_bit; imem 595 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c nvkm_info(&imem->base.subdev, "using IOMMU\n"); imem 597 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c imem->attrs = DMA_ATTR_NON_CONSISTENT | imem 601 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c nvkm_info(&imem->base.subdev, "using DMA API\n"); imem 41 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c struct nv04_instmem *imem; imem 49 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c struct nvkm_device *device = iobj->imem->base.subdev.device; imem 57 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c struct nvkm_device *device = iobj->imem->base.subdev.device; imem 76 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c struct nvkm_device *device = iobj->imem->base.subdev.device; imem 102 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c mutex_lock(&iobj->imem->base.subdev.mutex); imem 103 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c nvkm_mm_free(&iobj->imem->heap, &iobj->node); imem 104 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c mutex_unlock(&iobj->imem->base.subdev.mutex); imem 105 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c nvkm_instobj_dtor(&iobj->imem->base, &iobj->base); imem 123 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c struct nv04_instmem *imem = nv04_instmem(base); imem 131 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c nvkm_instobj_ctor(&nv04_instobj_func, &imem->base, &iobj->base); imem 133 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c iobj->imem = imem; imem 135 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c mutex_lock(&imem->base.subdev.mutex); imem 136 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c ret = nvkm_mm_head(&imem->heap, 0, 1, size, size, imem 138 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c mutex_unlock(&imem->base.subdev.mutex); imem 147 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c nv04_instmem_rd32(struct nvkm_instmem *imem, u32 addr) imem 149 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c return nvkm_rd32(imem->subdev.device, 0x700000 + addr); imem 153 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c nv04_instmem_wr32(struct nvkm_instmem *imem, u32 addr, u32 data) imem 155 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c nvkm_wr32(imem->subdev.device, 0x700000 + addr, data); imem 161 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c struct nv04_instmem *imem = nv04_instmem(base); imem 162 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c struct nvkm_device *device = imem->base.subdev.device; imem 166 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c imem->base.reserved = 512 * 1024; imem 168 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c ret = nvkm_mm_init(&imem->heap, 0, 0, imem->base.reserved, 1); imem 174 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c &imem->base.vbios); imem 179 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c ret = nvkm_ramht_new(device, 0x08000, 0, NULL, &imem->base.ramht); imem 185 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c &imem->base.ramfc); imem 191 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c &imem->base.ramro); imem 201 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c struct nv04_instmem *imem = nv04_instmem(base); imem 202 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c nvkm_memory_unref(&imem->base.ramfc); imem 203 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c nvkm_memory_unref(&imem->base.ramro); imem 204 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c nvkm_ramht_del(&imem->base.ramht); imem 205 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c nvkm_memory_unref(&imem->base.vbios); imem 206 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c nvkm_mm_fini(&imem->heap); imem 207 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c return imem; imem 224 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c struct nv04_instmem *imem; imem 226 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c if (!(imem = kzalloc(sizeof(*imem), GFP_KERNEL))) imem 228 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c nvkm_instmem_ctor(&nv04_instmem, device, index, &imem->base); imem 229 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c *pimem = &imem->base; imem 43 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c struct nv40_instmem *imem; imem 51 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c iowrite32_native(data, iobj->imem->iomem + iobj->node->offset + offset); imem 58 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c return ioread32_native(iobj->imem->iomem + iobj->node->offset + offset); imem 77 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c return iobj->imem->iomem + iobj->node->offset; imem 102 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c mutex_lock(&iobj->imem->base.subdev.mutex); imem 103 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c nvkm_mm_free(&iobj->imem->heap, &iobj->node); imem 104 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c mutex_unlock(&iobj->imem->base.subdev.mutex); imem 105 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c nvkm_instobj_dtor(&iobj->imem->base, &iobj->base); imem 123 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c struct nv40_instmem *imem = nv40_instmem(base); imem 131 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c nvkm_instobj_ctor(&nv40_instobj_func, &imem->base, &iobj->base); imem 133 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c iobj->imem = imem; imem 135 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c mutex_lock(&imem->base.subdev.mutex); imem 136 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c ret = nvkm_mm_head(&imem->heap, 0, 1, size, size, imem 138 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c mutex_unlock(&imem->base.subdev.mutex); imem 161 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c struct nv40_instmem *imem = nv40_instmem(base); imem 162 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c struct nvkm_device *device = imem->base.subdev.device; imem 170 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c if (device->chipset == 0x40) imem->base.reserved = 0x6aa0 * vs; imem 171 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c else if (device->chipset < 0x43) imem->base.reserved = 0x4f00 * vs; imem 172 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c else if (nv44_gr_class(device)) imem->base.reserved = 0x4980 * vs; imem 173 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c else imem->base.reserved = 0x4a40 * vs; imem 174 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c imem->base.reserved += 16 * 1024; imem 175 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c imem->base.reserved *= 32; /* per-channel */ imem 176 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c imem->base.reserved += 512 * 1024; /* pci(e)gart table */ imem 177 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c imem->base.reserved += 512 * 1024; /* object storage */ imem 178 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c imem->base.reserved = round_up(imem->base.reserved, 4096); imem 180 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c ret = nvkm_mm_init(&imem->heap, 0, 0, imem->base.reserved, 1); imem 186 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c &imem->base.vbios); imem 191 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c ret = nvkm_ramht_new(device, 0x08000, 0, NULL, &imem->base.ramht); imem 199 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c &imem->base.ramro); imem 207 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c &imem->base.ramfc); imem 217 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c struct nv40_instmem *imem = nv40_instmem(base); imem 218 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c nvkm_memory_unref(&imem->base.ramfc); imem 219 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c nvkm_memory_unref(&imem->base.ramro); imem 220 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c nvkm_ramht_del(&imem->base.ramht); imem 221 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c nvkm_memory_unref(&imem->base.vbios); imem 222 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c nvkm_mm_fini(&imem->heap); imem 223 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c if (imem->iomem) imem 224 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c iounmap(imem->iomem); imem 225 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c return imem; imem 242 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c struct nv40_instmem *imem; imem 245 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c if (!(imem = kzalloc(sizeof(*imem), GFP_KERNEL))) imem 247 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c nvkm_instmem_ctor(&nv40_instmem, device, index, &imem->base); imem 248 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c *pimem = &imem->base; imem 256 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c imem->iomem = ioremap_wc(device->func->resource_addr(device, bar), imem 258 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c if (!imem->iomem) { imem 259 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c nvkm_error(&imem->base.subdev, "unable to map PRAMIN BAR\n"); imem 47 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nv50_instmem *imem; imem 59 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nv50_instmem *imem = iobj->imem; imem 60 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nvkm_device *device = imem->base.subdev.device; imem 65 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c spin_lock_irqsave(&imem->base.lock, flags); imem 66 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c if (unlikely(imem->addr != base)) { imem 68 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c imem->addr = base; imem 71 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c spin_unlock_irqrestore(&imem->base.lock, flags); imem 78 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nv50_instmem *imem = iobj->imem; imem 79 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nvkm_device *device = imem->base.subdev.device; imem 85 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c spin_lock_irqsave(&imem->base.lock, flags); imem 86 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c if (unlikely(imem->addr != base)) { imem 88 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c imem->addr = base; imem 91 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c spin_unlock_irqrestore(&imem->base.lock, flags); imem 122 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nv50_instmem *imem = iobj->imem; imem 125 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nvkm_subdev *subdev = &imem->base.subdev; imem 142 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c eobj = list_first_entry_or_null(&imem->lru, typeof(*eobj), lru); imem 194 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nv50_instmem *imem = iobj->imem; imem 195 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nvkm_subdev *subdev = &imem->base.subdev; imem 206 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c list_add_tail(&iobj->lru, &imem->lru); imem 219 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nvkm_instmem *imem = &iobj->imem->base; imem 230 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c mutex_lock(&imem->subdev.mutex); imem 232 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c mutex_unlock(&imem->subdev.mutex); imem 237 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c if ((vmm = nvkm_bar_bar2_vmm(imem->subdev.device))) { imem 255 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c mutex_unlock(&imem->subdev.mutex); imem 263 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nvkm_instmem *imem = &iobj->imem->base; imem 268 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c mutex_lock(&imem->subdev.mutex); imem 275 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c nvkm_instmem_boot(imem); imem 276 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c mutex_unlock(&imem->subdev.mutex); imem 314 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nvkm_instmem *imem = &iobj->imem->base; imem 318 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c mutex_lock(&imem->subdev.mutex); imem 323 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c mutex_unlock(&imem->subdev.mutex); imem 326 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nvkm_vmm *vmm = nvkm_bar_bar2_vmm(imem->subdev.device); imem 333 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c nvkm_instobj_dtor(imem, &iobj->base); imem 354 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nv50_instmem *imem = nv50_instmem(base); imem 356 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nvkm_device *device = imem->base.subdev.device; imem 363 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c nvkm_instobj_ctor(&nv50_instobj_func, &imem->base, &iobj->base); imem 364 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c iobj->imem = imem; imem 392 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c struct nv50_instmem *imem; imem 394 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c if (!(imem = kzalloc(sizeof(*imem), GFP_KERNEL))) imem 396 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c nvkm_instmem_ctor(&nv50_instmem, device, index, &imem->base); imem 397 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c INIT_LIST_HEAD(&imem->lru); imem 398 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c *pimem = &imem->base; imem 186 drivers/memory/brcmstb_dpfe.c void __iomem *imem; imem 526 drivers/memory/brcmstb_dpfe.c u32 __iomem *imem = priv->imem; imem 545 drivers/memory/brcmstb_dpfe.c sum += readl_relaxed(imem + i); imem 583 drivers/memory/brcmstb_dpfe.c const u32 *dmem, *imem; imem 629 drivers/memory/brcmstb_dpfe.c imem = fw_blob; imem 636 drivers/memory/brcmstb_dpfe.c ret = __write_firmware(priv->imem, imem, imem_size, is_big_endian); imem 838 drivers/memory/brcmstb_dpfe.c priv->imem = devm_ioremap_resource(dev, res); imem 839 drivers/memory/brcmstb_dpfe.c if (IS_ERR(priv->imem)) { imem 976 drivers/misc/fastrpc.c struct fastrpc_buf *imem = NULL; imem 1020 drivers/misc/fastrpc.c &imem); imem 1024 drivers/misc/fastrpc.c fl->init_mem = imem; imem 1037 drivers/misc/fastrpc.c pages[0].addr = imem->phys; imem 1038 drivers/misc/fastrpc.c pages[0].size = imem->size; imem 1067 drivers/misc/fastrpc.c fastrpc_buf_free(imem);