ilk               860 drivers/crypto/cavium/nitrox/nitrox_csr.h 		u64 ilk	: 1;
ilk               878 drivers/crypto/cavium/nitrox/nitrox_csr.h 		u64 ilk	: 1;
ilk               697 drivers/gpu/drm/i915/display/intel_display_types.h 		} ilk;
ilk              1013 drivers/gpu/drm/i915/display/intel_display_types.h 			struct intel_pipe_wm ilk;
ilk              3128 drivers/gpu/drm/i915/intel_pm.c 	pipe_wm = &crtc_state->wm.ilk.optimal;
ilk              3200 drivers/gpu/drm/i915/intel_pm.c 	struct intel_pipe_wm *a = &newstate->wm.ilk.intermediate;
ilk              3205 drivers/gpu/drm/i915/intel_pm.c 	const struct intel_pipe_wm *b = &oldstate->wm.ilk.optimal;
ilk              3213 drivers/gpu/drm/i915/intel_pm.c 	*a = newstate->wm.ilk.optimal;
ilk              3246 drivers/gpu/drm/i915/intel_pm.c 	if (memcmp(a, &newstate->wm.ilk.optimal, sizeof(*a)) != 0)
ilk              3264 drivers/gpu/drm/i915/intel_pm.c 		const struct intel_pipe_wm *active = &intel_crtc->wm.active.ilk;
ilk              3412 drivers/gpu/drm/i915/intel_pm.c 			&intel_crtc->wm.active.ilk.wm[0];
ilk              3417 drivers/gpu/drm/i915/intel_pm.c 		results->wm_linetime[pipe] = intel_crtc->wm.active.ilk.linetime;
ilk              5688 drivers/gpu/drm/i915/intel_pm.c 		const struct intel_pipe_wm *wm = &crtc->wm.active.ilk;
ilk              5738 drivers/gpu/drm/i915/intel_pm.c 	crtc->wm.active.ilk = crtc_state->wm.ilk.intermediate;
ilk              5753 drivers/gpu/drm/i915/intel_pm.c 	crtc->wm.active.ilk = crtc_state->wm.ilk.optimal;
ilk              5834 drivers/gpu/drm/i915/intel_pm.c 	struct intel_pipe_wm *active = &crtc_state->wm.ilk.optimal;
ilk              5876 drivers/gpu/drm/i915/intel_pm.c 	crtc->wm.active.ilk = *active;