iflr 40 arch/microblaze/include/asm/cacheflush.h void (*iflr)(unsigned long a, unsigned long b); iflr 60 arch/microblaze/include/asm/cacheflush.h #define flush_icache_range(start, end) mbc->iflr(start, end); iflr 516 arch/microblaze/kernel/cpu/cache.c .iflr = __flush_icache_range_noirq, iflr 532 arch/microblaze/kernel/cpu/cache.c .iflr = __flush_icache_range_noirq, iflr 548 arch/microblaze/kernel/cpu/cache.c .iflr = __flush_icache_range_msr_irq, iflr 563 arch/microblaze/kernel/cpu/cache.c .iflr = __flush_icache_range_nomsr_irq, iflr 579 arch/microblaze/kernel/cpu/cache.c .iflr = __flush_icache_range_noirq, iflr 594 arch/microblaze/kernel/cpu/cache.c .iflr = __flush_icache_range_noirq,