if_phy             34 drivers/phy/ti/phy-gmii-sel.c 	struct phy	*if_phy;
if_phy             56 drivers/phy/ti/phy-gmii-sel.c 	struct phy_gmii_sel_phy_priv *if_phy = phy_get_drvdata(phy);
if_phy             57 drivers/phy/ti/phy-gmii-sel.c 	const struct phy_gmii_sel_soc_data *soc_data = if_phy->priv->soc_data;
if_phy             58 drivers/phy/ti/phy-gmii-sel.c 	struct device *dev = if_phy->priv->dev;
if_phy             89 drivers/phy/ti/phy-gmii-sel.c 			 if_phy->id, phy_modes(submode));
if_phy             93 drivers/phy/ti/phy-gmii-sel.c 	if_phy->phy_if_mode = submode;
if_phy             96 drivers/phy/ti/phy-gmii-sel.c 		__func__, if_phy->id, submode, rgmii_id,
if_phy             97 drivers/phy/ti/phy-gmii-sel.c 		if_phy->rmii_clock_external);
if_phy             99 drivers/phy/ti/phy-gmii-sel.c 	regfield = if_phy->fields[PHY_GMII_SEL_PORT_MODE];
if_phy            102 drivers/phy/ti/phy-gmii-sel.c 		dev_err(dev, "port%u: set mode fail %d", if_phy->id, ret);
if_phy            107 drivers/phy/ti/phy-gmii-sel.c 	    if_phy->fields[PHY_GMII_SEL_RGMII_ID_MODE]) {
if_phy            108 drivers/phy/ti/phy-gmii-sel.c 		regfield = if_phy->fields[PHY_GMII_SEL_RGMII_ID_MODE];
if_phy            115 drivers/phy/ti/phy-gmii-sel.c 	    if_phy->fields[PHY_GMII_SEL_RMII_IO_CLK_EN]) {
if_phy            116 drivers/phy/ti/phy-gmii-sel.c 		regfield = if_phy->fields[PHY_GMII_SEL_RMII_IO_CLK_EN];
if_phy            118 drivers/phy/ti/phy-gmii-sel.c 					 if_phy->rmii_clock_external);
if_phy            223 drivers/phy/ti/phy-gmii-sel.c 	return priv->if_phys[phy_id].if_phy;
if_phy            279 drivers/phy/ti/phy-gmii-sel.c 		if_phys[i].if_phy = devm_phy_create(dev,
if_phy            282 drivers/phy/ti/phy-gmii-sel.c 		if (IS_ERR(if_phys[i].if_phy)) {
if_phy            283 drivers/phy/ti/phy-gmii-sel.c 			ret = PTR_ERR(if_phys[i].if_phy);
if_phy            287 drivers/phy/ti/phy-gmii-sel.c 		phy_set_drvdata(if_phys[i].if_phy, &if_phys[i]);