ienb               45 arch/arc/kernel/intc-compact.c 		unsigned int ienb;
ienb               47 arch/arc/kernel/intc-compact.c 		ienb = read_aux_reg(AUX_IENABLE);
ienb               48 arch/arc/kernel/intc-compact.c 		ienb &= ~(1 << i);
ienb               49 arch/arc/kernel/intc-compact.c 		write_aux_reg(AUX_IENABLE, ienb);
ienb               66 arch/arc/kernel/intc-compact.c 	unsigned int ienb;
ienb               68 arch/arc/kernel/intc-compact.c 	ienb = read_aux_reg(AUX_IENABLE);
ienb               69 arch/arc/kernel/intc-compact.c 	ienb &= ~(1 << data->hwirq);
ienb               70 arch/arc/kernel/intc-compact.c 	write_aux_reg(AUX_IENABLE, ienb);
ienb               75 arch/arc/kernel/intc-compact.c 	unsigned int ienb;
ienb               77 arch/arc/kernel/intc-compact.c 	ienb = read_aux_reg(AUX_IENABLE);
ienb               78 arch/arc/kernel/intc-compact.c 	ienb |= (1 << data->hwirq);
ienb               79 arch/arc/kernel/intc-compact.c 	write_aux_reg(AUX_IENABLE, ienb);
ienb              424 drivers/gpu/drm/pl111/pl111_display.c 	writel(CLCD_IRQ_NEXTBASE_UPDATE, priv->regs + priv->ienb);
ienb              435 drivers/gpu/drm/pl111/pl111_display.c 	writel(0, priv->regs + priv->ienb);
ienb               69 drivers/gpu/drm/pl111/pl111_drm.h 	u32 ienb;
ienb              287 drivers/gpu/drm/pl111/pl111_drv.c 		priv->ienb = CLCD_PL110_IENB;
ienb              290 drivers/gpu/drm/pl111/pl111_drv.c 		priv->ienb = CLCD_PL111_IENB;
ienb              309 drivers/gpu/drm/pl111/pl111_drv.c 	writel(0, priv->regs + priv->ienb);
ienb              381 drivers/gpu/drm/pl111/pl111_versatile.c 		priv->ienb = CLCD_PL111_IENB;
ienb               58 drivers/irqchip/irq-eznps.c 	unsigned int ienb;
ienb               61 drivers/irqchip/irq-eznps.c 	ienb = read_aux_reg(AUX_IENABLE);
ienb               62 drivers/irqchip/irq-eznps.c 	ienb &= ~(1 << irq);
ienb               63 drivers/irqchip/irq-eznps.c 	write_aux_reg(AUX_IENABLE, ienb);
ienb               68 drivers/irqchip/irq-eznps.c 	unsigned int ienb;
ienb               71 drivers/irqchip/irq-eznps.c 	ienb = read_aux_reg(AUX_IENABLE);
ienb               72 drivers/irqchip/irq-eznps.c 	ienb |= (1 << irq);
ienb               73 drivers/irqchip/irq-eznps.c 	write_aux_reg(AUX_IENABLE, ienb);