idr1              122 sound/mips/hal2.c 	hal2_write(0, &regs->idr1);
idr1              134 sound/mips/hal2.c 	hal2_write(val >> 16, &regs->idr1);
idr1              148 sound/mips/hal2.c 	hal2_write(0, &regs->idr1);
idr1              162 sound/mips/hal2.c 	hal2_write(0, &regs->idr1);
idr1              198 sound/mips/hal2.h 	u32 idr1;		/* 0x50 Indirect Data Register 1 */