idle_mask         876 arch/s390/include/asm/kvm_host.h 	DECLARE_BITMAP(idle_mask, KVM_MAX_VCPUS);
idle_mask         411 arch/s390/kvm/interrupt.c 	set_bit(vcpu->vcpu_id, vcpu->kvm->arch.idle_mask);
idle_mask         417 arch/s390/kvm/interrupt.c 	clear_bit(vcpu->vcpu_id, vcpu->kvm->arch.idle_mask);
idle_mask        1819 arch/s390/kvm/interrupt.c 	sigcpu = find_first_bit(kvm->arch.idle_mask, online_vcpus);
idle_mask        2991 arch/s390/kvm/interrupt.c 	for_each_set_bit(vcpu_id, kvm->arch.idle_mask, online_vcpus) {
idle_mask          70 arch/s390/kvm/kvm-s390.h 	return test_bit(vcpu->vcpu_id, vcpu->kvm->arch.idle_mask);
idle_mask         381 drivers/gpu/drm/etnaviv/etnaviv_gpu.c 	gpu->idle_mask = ~VIVS_HI_IDLE_STATE_AXI_LP;
idle_mask         430 drivers/gpu/drm/etnaviv/etnaviv_gpu.c 		gpu->idle_mask = VIVS_HI_IDLE_STATE_TX |
idle_mask         908 drivers/gpu/drm/etnaviv/etnaviv_gpu.c 	idle |= ~gpu->idle_mask & ~VIVS_HI_IDLE_STATE_AXI_LP;
idle_mask        1508 drivers/gpu/drm/etnaviv/etnaviv_gpu.c 		if ((idle & gpu->idle_mask) == gpu->idle_mask)
idle_mask        1808 drivers/gpu/drm/etnaviv/etnaviv_gpu.c 	mask = gpu->idle_mask & ~VIVS_HI_IDLE_STATE_FE;
idle_mask         115 drivers/gpu/drm/etnaviv/etnaviv_gpu.h 	u32 idle_mask;
idle_mask        1431 drivers/infiniband/hw/hfi1/sdma.c 		sde->idle_mask = (u64)1 << (2 * TXE_NUM_SDMA_ENGINES +
idle_mask        1435 drivers/infiniband/hw/hfi1/sdma.c 			     sde->idle_mask;
idle_mask        1870 drivers/infiniband/hw/hfi1/sdma.c 	if ((status & sde->idle_mask) && !idle_check_done) {
idle_mask        1900 drivers/infiniband/hw/hfi1/sdma.c 	if (status & sde->idle_mask)
idle_mask         318 drivers/infiniband/hw/hfi1/sdma.h 	u64 idle_mask;
idle_mask         109 drivers/net/ethernet/ti/cpsw_sl.c 	u32 idle_mask;
idle_mask         117 drivers/net/ethernet/ti/cpsw_sl.c 	const u32 idle_mask;
idle_mask         128 drivers/net/ethernet/ti/cpsw_sl.c 		.idle_mask = CPSW_SL_STATUS_IDLE_MASK_BASE,
idle_mask         135 drivers/net/ethernet/ti/cpsw_sl.c 		.idle_mask = CPSW_SL_STATUS_IDLE_MASK_BASE,
idle_mask         145 drivers/net/ethernet/ti/cpsw_sl.c 		.idle_mask = CPSW_SL_STATUS_IDLE_MASK_BASE,
idle_mask         158 drivers/net/ethernet/ti/cpsw_sl.c 		.idle_mask = CPSW_SL_STATUS_IDLE_MASK_BASE,
idle_mask         184 drivers/net/ethernet/ti/cpsw_sl.c 		.idle_mask = CPSW_SL_STATUS_IDLE_MASK_K3,
idle_mask         250 drivers/net/ethernet/ti/cpsw_sl.c 	sl->idle_mask = sl_dev_id->idle_mask;
idle_mask         320 drivers/net/ethernet/ti/cpsw_sl.c 		  sl->idle_mask) && time_after(timeout, jiffies));
idle_mask         322 drivers/net/ethernet/ti/cpsw_sl.c 	if (!(cpsw_sl_reg_read(sl, CPSW_SL_MACSTATUS) & sl->idle_mask)) {
idle_mask          35 drivers/soc/rockchip/pm_domains.c 	int idle_mask;
idle_mask          93 drivers/soc/rockchip/pm_domains.c 	.idle_mask = (idle),				\
idle_mask         105 drivers/soc/rockchip/pm_domains.c 	.idle_mask = (idle),				\
idle_mask         115 drivers/soc/rockchip/pm_domains.c 	.idle_mask = (idle),				\
idle_mask         141 drivers/soc/rockchip/pm_domains.c 	return (val & pd_info->idle_mask) == pd_info->idle_mask;