idiv             1003 arch/x86/kvm/emulate.c FASTOP1SRC2EX(idiv, idiv_ex);
idiv               29 drivers/clk/axs10x/i2s_pll_clock.c 	unsigned int idiv;
idiv              105 drivers/clk/axs10x/i2s_pll_clock.c 	unsigned int idiv, fbdiv, odiv;
idiv              107 drivers/clk/axs10x/i2s_pll_clock.c 	idiv = i2s_pll_get_value(i2s_pll_read(clk, PLL_IDIV_REG));
idiv              111 drivers/clk/axs10x/i2s_pll_clock.c 	return ((parent_rate / idiv) * fbdiv) / odiv;
idiv              147 drivers/clk/axs10x/i2s_pll_clock.c 			i2s_pll_write(clk, PLL_IDIV_REG, pll_cfg[i].idiv);
idiv               72 drivers/clk/axs10x/pll_clock.c 	u32 idiv;
idiv              143 drivers/clk/axs10x/pll_clock.c 	u32 idiv, fbdiv, odiv;
idiv              146 drivers/clk/axs10x/pll_clock.c 	idiv = axs10x_div_get_value(axs10x_pll_read(clk, PLL_REG_IDIV));
idiv              151 drivers/clk/axs10x/pll_clock.c 	do_div(rate, idiv * odiv);
idiv              187 drivers/clk/axs10x/pll_clock.c 					 axs10x_encode_div(pll_cfg[i].idiv, 0));
idiv               52 drivers/clk/clk-hsdk-pll.c 	u32 idiv;
idiv              138 drivers/clk/clk-hsdk-pll.c 	val |= cfg->idiv << CGU_PLL_CTRL_IDIV_SHIFT;
idiv              168 drivers/clk/clk-hsdk-pll.c 	u32 idiv, fbdiv, odiv;
idiv              184 drivers/clk/clk-hsdk-pll.c 	idiv = 1 + ((val & CGU_PLL_CTRL_IDIV_MASK) >> CGU_PLL_CTRL_IDIV_SHIFT);
idiv              191 drivers/clk/clk-hsdk-pll.c 	do_div(rate, idiv * odiv);
idiv              271 drivers/clk/clk-si5351.c 	unsigned char idiv;
idiv              275 drivers/clk/clk-si5351.c 		idiv = SI5351_CLKIN_DIV_8;
idiv              278 drivers/clk/clk-si5351.c 		idiv = SI5351_CLKIN_DIV_4;
idiv              281 drivers/clk/clk-si5351.c 		idiv = SI5351_CLKIN_DIV_2;
idiv              284 drivers/clk/clk-si5351.c 		idiv = SI5351_CLKIN_DIV_1;
idiv              288 drivers/clk/clk-si5351.c 			SI5351_CLKIN_DIV_MASK, idiv);
idiv              291 drivers/clk/clk-si5351.c 		__func__, (1 << (idiv >> 6)), rate);
idiv              343 drivers/clk/clk-versaclock5.c 	unsigned long idiv;
idiv              353 drivers/clk/clk-versaclock5.c 	idiv = DIV_ROUND_UP(*parent_rate, rate);
idiv              354 drivers/clk/clk-versaclock5.c 	if (idiv > 127)
idiv              357 drivers/clk/clk-versaclock5.c 	return *parent_rate / idiv;
idiv              365 drivers/clk/clk-versaclock5.c 	unsigned long idiv;
idiv              377 drivers/clk/clk-versaclock5.c 	idiv = DIV_ROUND_UP(parent_rate, rate);
idiv              380 drivers/clk/clk-versaclock5.c 	if (idiv == 2)
idiv              383 drivers/clk/clk-versaclock5.c 		div = VC5_REF_DIVIDER_REF_DIV(idiv);
idiv              583 drivers/clk/microchip/clk-core.c 	u32 idiv; /* PLL iclk divider, treated fixed */
idiv              606 drivers/clk/microchip/clk-core.c 	parent_rate /= pll->idiv;
idiv              658 drivers/clk/microchip/clk-core.c 	pll_in_rate = parent_rate / pll->idiv;
idiv              747 drivers/clk/microchip/clk-core.c 	spll->idiv = (readl(spll->ctrl_reg) >> PLL_IDIV_SHIFT) & PLL_IDIV_MASK;
idiv              748 drivers/clk/microchip/clk-core.c 	spll->idiv += 1;
idiv               40 drivers/net/dsa/sja1105/sja1105_clocking.c 	u64 idiv;
idiv               90 drivers/net/dsa/sja1105/sja1105_clocking.c static void sja1105_cgu_idiv_packing(void *buf, struct sja1105_cgu_idiv *idiv,
idiv               95 drivers/net/dsa/sja1105/sja1105_clocking.c 	sja1105_packing(buf, &idiv->clksrc,    28, 24, size, op);
idiv               96 drivers/net/dsa/sja1105/sja1105_clocking.c 	sja1105_packing(buf, &idiv->autoblock, 11, 11, size, op);
idiv               97 drivers/net/dsa/sja1105/sja1105_clocking.c 	sja1105_packing(buf, &idiv->idiv,       5,  2, size, op);
idiv               98 drivers/net/dsa/sja1105/sja1105_clocking.c 	sja1105_packing(buf, &idiv->pd,         0,  0, size, op);
idiv              106 drivers/net/dsa/sja1105/sja1105_clocking.c 	struct sja1105_cgu_idiv idiv;
idiv              115 drivers/net/dsa/sja1105/sja1105_clocking.c 	idiv.clksrc    = 0x0A;            /* 25MHz */
idiv              116 drivers/net/dsa/sja1105/sja1105_clocking.c 	idiv.autoblock = 1;               /* Block clk automatically */
idiv              117 drivers/net/dsa/sja1105/sja1105_clocking.c 	idiv.idiv      = factor - 1;      /* Divide by 1 or 10 */
idiv              118 drivers/net/dsa/sja1105/sja1105_clocking.c 	idiv.pd        = enabled ? 0 : 1; /* Power down? */
idiv              119 drivers/net/dsa/sja1105/sja1105_clocking.c 	sja1105_cgu_idiv_packing(packed_buf, &idiv, PACK);
idiv             5526 drivers/scsi/ncr53c8xx.c 	u_char idiv;
idiv             5541 drivers/scsi/ncr53c8xx.c 	idiv = ((scntl3 >> 4) & 0x7);
idiv             5542 drivers/scsi/ncr53c8xx.c 	if ((sxfer & 0x1f) && idiv)
idiv             5543 drivers/scsi/ncr53c8xx.c 		tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz;