ibase             202 arch/ia64/hp/common/sba_iommu.c 	unsigned long	ibase;		/* pdir IOV Space base */
ibase             427 arch/ia64/hp/common/sba_iommu.c #define SBA_IOVA(ioc,iovp,offset) ((ioc->ibase) | (iovp) | (offset))
ibase             428 arch/ia64/hp/common/sba_iommu.c #define SBA_IOVP(ioc,iova) ((iova) & ~(ioc->ibase))
ibase             491 arch/ia64/hp/common/sba_iommu.c 	BUG_ON(ioc->ibase & ~iovp_mask);
ibase             492 arch/ia64/hp/common/sba_iommu.c 	shift = ioc->ibase >> iovp_shift;
ibase             898 arch/ia64/hp/common/sba_iommu.c 	WRITE_REG(iovp | ioc->ibase, ioc->ioc_hpa+IOC_PCOM);
ibase            1047 arch/ia64/hp/common/sba_iommu.c 	if (likely((iova & ioc->imask) != ioc->ibase)) {
ibase            1231 arch/ia64/hp/common/sba_iommu.c 			dma_sg->dma_address = pide | ioc->ibase;
ibase            1589 arch/ia64/hp/common/sba_iommu.c 	ioc->ibase = READ_REG(ioc->ioc_hpa + IOC_IBASE) & ~0x1UL;
ibase            1595 arch/ia64/hp/common/sba_iommu.c 		__func__, ioc->ioc_hpa, ioc->ibase, ioc->imask,
ibase            1637 arch/ia64/hp/common/sba_iommu.c 		      ioc->iov_size/2 >> 20, ioc->ibase + ioc->iov_size/2);
ibase            1671 arch/ia64/hp/common/sba_iommu.c 	WRITE_REG(ioc->ibase | (get_iovp_order(ioc->iov_size) + iovp_shift), ioc->ioc_hpa + IOC_PCOM);
ibase            1675 arch/ia64/hp/common/sba_iommu.c 	WRITE_REG(ioc->ibase | 1, ioc->ioc_hpa + IOC_IBASE);
ibase            1826 arch/ia64/hp/common/sba_iommu.c 		hpa, ioc->iov_size >> 20, ioc->ibase);
ibase             215 arch/mips/include/asm/octeon/cvmx-mixx-defs.h 		uint64_t ibase:37;
ibase             219 arch/mips/include/asm/octeon/cvmx-mixx-defs.h 		uint64_t ibase:37;
ibase             229 arch/mips/include/asm/octeon/cvmx-mixx-defs.h 		uint64_t ibase:33;
ibase             233 arch/mips/include/asm/octeon/cvmx-mixx-defs.h 		uint64_t ibase:33;
ibase              33 arch/parisc/include/asm/ropes.h 	unsigned long	ibase;		/* pdir IOV Space base - shared w/lba_pci */
ibase             652 arch/powerpc/include/asm/cpm2.h 	ushort ibase;		/* IDMA buffer descriptor table base address */
ibase             382 arch/powerpc/lib/code-patching.c 	unsigned int *ibase = &interrupt_base_book3e;
ibase             390 arch/powerpc/lib/code-patching.c 	patch_branch(ibase + (exc / 4) + 1, addr, 0);
ibase            1051 drivers/net/ethernet/cavium/octeon/octeon_mgmt.c 	iring1.s.ibase = p->rx_ring_handle >> 3;
ibase              57 drivers/parisc/iommu-helpers.h 			sg_dma_address(dma_sg) = pide | ioc->ibase;
ibase            1694 drivers/parisc/lba_pci.c void lba_set_iregs(struct parisc_device *lba, u32 ibase, u32 imask)
ibase            1701 drivers/parisc/lba_pci.c 	WARN_ON((ibase & 0x001fffff) != 0);
ibase            1704 drivers/parisc/lba_pci.c 	DBG("%s() ibase 0x%x imask 0x%x\n", __func__, ibase, imask);
ibase            1706 drivers/parisc/lba_pci.c 	WRITE_REG32( ibase, base_addr + LBA_IBASE);
ibase             305 drivers/parisc/sba_iommu.c #define SBA_IOVA(ioc,iovp,offset,hint_reg) ((ioc->ibase) | (iovp) | (offset))
ibase             349 drivers/parisc/sba_iommu.c 	BUG_ON(ioc->ibase & ~IOVP_MASK);
ibase             350 drivers/parisc/sba_iommu.c 	shift = ioc->ibase >> IOVP_SHIFT;
ibase             689 drivers/parisc/sba_iommu.c 	return((int)(mask >= (ioc->ibase - 1 +
ibase            1229 drivers/parisc/sba_iommu.c 		lba_set_iregs(lba, ibd->ioc->ibase, ibd->ioc->imask);
ibase            1273 drivers/parisc/sba_iommu.c 	ioc->ibase = READ_REG(ioc->ioc_hpa + IOC_IBASE);
ibase            1276 drivers/parisc/sba_iommu.c 	if ((ioc->ibase < 0xfed00000UL) && ((ioc->ibase + iova_space_size) > 0xfee00000UL)) {
ibase            1351 drivers/parisc/sba_iommu.c 	WRITE_REG(ioc->ibase | 1, ioc->ioc_hpa + IOC_IBASE);
ibase            1357 drivers/parisc/sba_iommu.c 	WRITE_REG(ioc->ibase | 31, ioc->ioc_hpa + IOC_PCOM);
ibase            1453 drivers/parisc/sba_iommu.c 	ioc->ibase = 0;
ibase            1460 drivers/parisc/sba_iommu.c 		__func__, ioc->ibase, ioc->imask);
ibase            1473 drivers/parisc/sba_iommu.c 	WRITE_REG(ioc->ibase | 1, ioc->ioc_hpa+IOC_IBASE);
ibase            1496 drivers/parisc/sba_iommu.c 	ioc->ibase = 0; /* used by SBA_IOVA and related macros */	
ibase              98 drivers/usb/mtu3/mtu3_core.c 	void __iomem *ibase = mtu->ippc_base;
ibase             101 drivers/usb/mtu3/mtu3_core.c 	mtu3_clrbits(ibase, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
ibase             105 drivers/usb/mtu3/mtu3_core.c 		mtu3_clrbits(ibase, SSUSB_U3_CTRL(0),
ibase             109 drivers/usb/mtu3/mtu3_core.c 	mtu3_clrbits(ibase, SSUSB_U2_CTRL(0),
ibase             114 drivers/usb/mtu3/mtu3_core.c 		mtu3_setbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
ibase             116 drivers/usb/mtu3/mtu3_core.c 			mtu3_setbits(ibase, SSUSB_U3_CTRL(0),
ibase             125 drivers/usb/mtu3/mtu3_core.c 	void __iomem *ibase = mtu->ippc_base;
ibase             128 drivers/usb/mtu3/mtu3_core.c 		mtu3_setbits(ibase, SSUSB_U3_CTRL(0),
ibase             131 drivers/usb/mtu3/mtu3_core.c 	mtu3_setbits(ibase, SSUSB_U2_CTRL(0),
ibase             135 drivers/usb/mtu3/mtu3_core.c 		mtu3_clrbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
ibase             137 drivers/usb/mtu3/mtu3_core.c 	mtu3_setbits(ibase, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
ibase             143 drivers/usb/mtu3/mtu3_core.c 	void __iomem *ibase = mtu->ippc_base;
ibase             145 drivers/usb/mtu3/mtu3_core.c 	mtu3_setbits(ibase, U3D_SSUSB_DEV_RST_CTRL, SSUSB_DEV_SW_RST);
ibase             147 drivers/usb/mtu3/mtu3_core.c 	mtu3_clrbits(ibase, U3D_SSUSB_DEV_RST_CTRL, SSUSB_DEV_SW_RST);
ibase              54 drivers/usb/mtu3/mtu3_dr.c 	void __iomem *ibase = ssusb->ippc_base;
ibase              62 drivers/usb/mtu3/mtu3_dr.c 		value = mtu3_readl(ibase, SSUSB_U2_CTRL(0));
ibase              64 drivers/usb/mtu3/mtu3_dr.c 		mtu3_writel(ibase, SSUSB_U2_CTRL(0), value);
ibase              67 drivers/usb/mtu3/mtu3_dr.c 		value = mtu3_readl(ibase, SSUSB_U2_CTRL(0));
ibase              71 drivers/usb/mtu3/mtu3_dr.c 		mtu3_writel(ibase, SSUSB_U2_CTRL(0), value);
ibase              74 drivers/usb/mtu3/mtu3_dr.c 		value = mtu3_readl(ibase, SSUSB_U3_CTRL(0));
ibase              76 drivers/usb/mtu3/mtu3_dr.c 		mtu3_writel(ibase, SSUSB_U3_CTRL(0), value);
ibase              79 drivers/usb/mtu3/mtu3_dr.c 		value = mtu3_readl(ibase, SSUSB_U3_CTRL(0));
ibase              83 drivers/usb/mtu3/mtu3_dr.c 		mtu3_writel(ibase, SSUSB_U3_CTRL(0), value);
ibase             109 drivers/usb/mtu3/mtu3_host.c 	void __iomem *ibase = ssusb->ippc_base;
ibase             118 drivers/usb/mtu3/mtu3_host.c 	mtu3_clrbits(ibase, U3D_SSUSB_IP_PW_CTRL1, SSUSB_IP_HOST_PDN);
ibase             128 drivers/usb/mtu3/mtu3_host.c 		value = mtu3_readl(ibase, SSUSB_U3_CTRL(i));
ibase             131 drivers/usb/mtu3/mtu3_host.c 		mtu3_writel(ibase, SSUSB_U3_CTRL(i), value);
ibase             136 drivers/usb/mtu3/mtu3_host.c 		value = mtu3_readl(ibase, SSUSB_U2_CTRL(i));
ibase             139 drivers/usb/mtu3/mtu3_host.c 		mtu3_writel(ibase, SSUSB_U2_CTRL(i), value);
ibase             151 drivers/usb/mtu3/mtu3_host.c 	void __iomem *ibase = ssusb->ippc_base;
ibase             163 drivers/usb/mtu3/mtu3_host.c 		value = mtu3_readl(ibase, SSUSB_U3_CTRL(i));
ibase             166 drivers/usb/mtu3/mtu3_host.c 		mtu3_writel(ibase, SSUSB_U3_CTRL(i), value);
ibase             171 drivers/usb/mtu3/mtu3_host.c 		value = mtu3_readl(ibase, SSUSB_U2_CTRL(i));
ibase             174 drivers/usb/mtu3/mtu3_host.c 		mtu3_writel(ibase, SSUSB_U2_CTRL(i), value);
ibase             178 drivers/usb/mtu3/mtu3_host.c 	mtu3_setbits(ibase, U3D_SSUSB_IP_PW_CTRL1, SSUSB_IP_HOST_PDN);
ibase             184 drivers/usb/mtu3/mtu3_host.c 	ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
ibase              24 drivers/usb/mtu3/mtu3_plat.c 	void __iomem *ibase = ssusb->ippc_base;
ibase              31 drivers/usb/mtu3/mtu3_plat.c 	ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
ibase              38 drivers/usb/mtu3/mtu3_plat.c 	ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value,
ibase             205 fs/efs/inode.c 	int ibase, ioffset, dirext, direxts, indext, indexts;
ibase             255 fs/efs/inode.c 		ibase = 0;
ibase             256 fs/efs/inode.c 		for(dirext = 0; cur < ibase && dirext < direxts; dirext++) {
ibase             257 fs/efs/inode.c 			ibase += in->extents[dirext].cooked.ex_length *
ibase             271 fs/efs/inode.c 			(cur - ibase) /
ibase             273 fs/efs/inode.c 		ioffset = (cur - ibase) %
ibase             146 fs/erofs/zmap.c 	const erofs_off_t ibase = iloc(EROFS_I_SB(inode), vi->nid);
ibase             148 fs/erofs/zmap.c 		Z_EROFS_VLE_LEGACY_INDEX_ALIGN(ibase + vi->inode_isize +