ib_put            435 drivers/gpu/drm/nouveau/nouveau_chan.c 		chan->dma.ib_put  = 0;
ib_put            436 drivers/gpu/drm/nouveau/nouveau_chan.c 		chan->dma.ib_free = chan->dma.ib_max - chan->dma.ib_put;
ib_put             39 drivers/gpu/drm/nouveau/nouveau_chan.h 		int ib_put;
ib_put             89 drivers/gpu/drm/nouveau/nouveau_dma.c 	int ip = (chan->dma.ib_put * 2) + chan->dma.ib_base;
ib_put             96 drivers/gpu/drm/nouveau/nouveau_dma.c 	chan->dma.ib_put = (chan->dma.ib_put + 1) & chan->dma.ib_max;
ib_put            102 drivers/gpu/drm/nouveau/nouveau_dma.c 	nvif_wr32(&chan->user, 0x8c, chan->dma.ib_put);
ib_put            126 drivers/gpu/drm/nouveau/nouveau_dma.c 		chan->dma.ib_free = get - chan->dma.ib_put;
ib_put            206 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 		u32 ib_put = nvkm_rd32(device, 0x003330);
ib_put            212 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 			   ib_get, ib_put, state, nv_dma_state_err(state),
ib_put            221 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 		if (ib_get != ib_put)
ib_put            222 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 			nvkm_wr32(device, 0x003334, ib_put);