i915 1244 drivers/gpu/drm/i915/display/intel_bios.c static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin) i915 1250 drivers/gpu/drm/i915/display/intel_bios.c info = &i915->vbt.ddi_port_info[port]; i915 1295 drivers/gpu/drm/i915/display/intel_bios.c static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch) i915 1301 drivers/gpu/drm/i915/display/intel_bios.c info = &i915->vbt.ddi_port_info[port]; i915 2198 drivers/gpu/drm/i915/display/intel_bios.c intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915, i915 2202 drivers/gpu/drm/i915/display/intel_bios.c i915->vbt.ddi_port_info[port].child; i915 2204 drivers/gpu/drm/i915/display/intel_bios.c if (WARN_ON_ONCE(!IS_GEN9_LP(i915))) i915 2218 drivers/gpu/drm/i915/display/intel_bios.c intel_bios_is_lspcon_present(const struct drm_i915_private *i915, i915 2222 drivers/gpu/drm/i915/display/intel_bios.c i915->vbt.ddi_port_info[port].child; i915 2224 drivers/gpu/drm/i915/display/intel_bios.c return HAS_LSPCON(i915) && child && child->lspcon; i915 239 drivers/gpu/drm/i915/display/intel_bios.h bool intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915, i915 241 drivers/gpu/drm/i915/display/intel_bios.h bool intel_bios_is_lspcon_present(const struct drm_i915_private *i915, i915 2020 drivers/gpu/drm/i915/display/intel_cdclk.c void intel_cdclk_init(struct drm_i915_private *i915) i915 2022 drivers/gpu/drm/i915/display/intel_cdclk.c if (INTEL_GEN(i915) >= 11) i915 2023 drivers/gpu/drm/i915/display/intel_cdclk.c icl_init_cdclk(i915); i915 2024 drivers/gpu/drm/i915/display/intel_cdclk.c else if (IS_CANNONLAKE(i915)) i915 2025 drivers/gpu/drm/i915/display/intel_cdclk.c cnl_init_cdclk(i915); i915 2026 drivers/gpu/drm/i915/display/intel_cdclk.c else if (IS_GEN9_BC(i915)) i915 2027 drivers/gpu/drm/i915/display/intel_cdclk.c skl_init_cdclk(i915); i915 2028 drivers/gpu/drm/i915/display/intel_cdclk.c else if (IS_GEN9_LP(i915)) i915 2029 drivers/gpu/drm/i915/display/intel_cdclk.c bxt_init_cdclk(i915); i915 2039 drivers/gpu/drm/i915/display/intel_cdclk.c void intel_cdclk_uninit(struct drm_i915_private *i915) i915 2041 drivers/gpu/drm/i915/display/intel_cdclk.c if (INTEL_GEN(i915) >= 11) i915 2042 drivers/gpu/drm/i915/display/intel_cdclk.c icl_uninit_cdclk(i915); i915 2043 drivers/gpu/drm/i915/display/intel_cdclk.c else if (IS_CANNONLAKE(i915)) i915 2044 drivers/gpu/drm/i915/display/intel_cdclk.c cnl_uninit_cdclk(i915); i915 2045 drivers/gpu/drm/i915/display/intel_cdclk.c else if (IS_GEN9_BC(i915)) i915 2046 drivers/gpu/drm/i915/display/intel_cdclk.c skl_uninit_cdclk(i915); i915 2047 drivers/gpu/drm/i915/display/intel_cdclk.c else if (IS_GEN9_LP(i915)) i915 2048 drivers/gpu/drm/i915/display/intel_cdclk.c bxt_uninit_cdclk(i915); i915 19 drivers/gpu/drm/i915/display/intel_cdclk.h void intel_cdclk_init(struct drm_i915_private *i915); i915 20 drivers/gpu/drm/i915/display/intel_cdclk.h void intel_cdclk_uninit(struct drm_i915_private *i915); i915 266 drivers/gpu/drm/i915/display/intel_combo_phy.c static u32 ehl_combo_phy_a_mux(struct drm_i915_private *i915, u32 val) i915 268 drivers/gpu/drm/i915/display/intel_combo_phy.c bool ddi_a_present = i915->vbt.ddi_port_info[PORT_A].child != NULL; i915 269 drivers/gpu/drm/i915/display/intel_combo_phy.c bool ddi_d_present = i915->vbt.ddi_port_info[PORT_D].child != NULL; i915 270 drivers/gpu/drm/i915/display/intel_combo_phy.c bool dsi_present = intel_bios_is_dsi_present(i915, NULL); i915 377 drivers/gpu/drm/i915/display/intel_combo_phy.c void intel_combo_phy_init(struct drm_i915_private *i915) i915 379 drivers/gpu/drm/i915/display/intel_combo_phy.c if (INTEL_GEN(i915) >= 11) i915 380 drivers/gpu/drm/i915/display/intel_combo_phy.c icl_combo_phys_init(i915); i915 381 drivers/gpu/drm/i915/display/intel_combo_phy.c else if (IS_CANNONLAKE(i915)) i915 382 drivers/gpu/drm/i915/display/intel_combo_phy.c cnl_combo_phys_init(i915); i915 385 drivers/gpu/drm/i915/display/intel_combo_phy.c void intel_combo_phy_uninit(struct drm_i915_private *i915) i915 387 drivers/gpu/drm/i915/display/intel_combo_phy.c if (INTEL_GEN(i915) >= 11) i915 388 drivers/gpu/drm/i915/display/intel_combo_phy.c icl_combo_phys_uninit(i915); i915 389 drivers/gpu/drm/i915/display/intel_combo_phy.c else if (IS_CANNONLAKE(i915)) i915 390 drivers/gpu/drm/i915/display/intel_combo_phy.c cnl_combo_phys_uninit(i915); i915 2164 drivers/gpu/drm/i915/display/intel_display.c lockdep_assert_held(&vma->vm->i915->drm.struct_mutex); i915 6706 drivers/gpu/drm/i915/display/intel_display.c enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port) i915 6708 drivers/gpu/drm/i915/display/intel_display.c if (IS_ELKHARTLAKE(i915) && port == PORT_D) i915 13911 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *i915 = to_i915(state->dev); i915 13913 drivers/gpu/drm/i915/display/intel_display.c drm_atomic_helper_cleanup_planes(&i915->drm, state); i915 13917 drivers/gpu/drm/i915/display/intel_display.c intel_atomic_helper_free_state(i915); i915 17300 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = m->i915; i915 423 drivers/gpu/drm/i915/display/intel_display.h enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port); i915 27 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_domain_str(struct drm_i915_private *i915, i915 30 drivers/gpu/drm/i915/display/intel_display_power.c bool ddi_tc_ports = IS_GEN(i915, 12); i915 1721 drivers/gpu/drm/i915/display/intel_display_power.c struct drm_i915_private *i915 = i915 1729 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_domain_str(i915, domain), i915 2037 drivers/gpu/drm/i915/display/intel_display_power.c void __intel_display_power_put_async(struct drm_i915_private *i915, i915 2041 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_domains *power_domains = &i915->power_domains; i915 2042 drivers/gpu/drm/i915/display/intel_display_power.c struct intel_runtime_pm *rpm = &i915->runtime_pm; i915 2048 drivers/gpu/drm/i915/display/intel_display_power.c __intel_display_power_put_domain(i915, domain); i915 2087 drivers/gpu/drm/i915/display/intel_display_power.c void intel_display_power_flush_work(struct drm_i915_private *i915) i915 2089 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_domains *power_domains = &i915->power_domains; i915 2108 drivers/gpu/drm/i915/display/intel_display_power.c intel_runtime_pm_put_raw(&i915->runtime_pm, work_wakeref); i915 2119 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_flush_work_sync(struct drm_i915_private *i915) i915 2121 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_domains *power_domains = &i915->power_domains; i915 2123 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_flush_work(i915); i915 4899 drivers/gpu/drm/i915/display/intel_display_power.c void intel_power_domains_init_hw(struct drm_i915_private *i915, bool resume) i915 4901 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_domains *power_domains = &i915->power_domains; i915 4906 drivers/gpu/drm/i915/display/intel_display_power.c intel_update_rawclk(i915); i915 4908 drivers/gpu/drm/i915/display/intel_display_power.c if (INTEL_GEN(i915) >= 11) { i915 4909 drivers/gpu/drm/i915/display/intel_display_power.c icl_display_core_init(i915, resume); i915 4910 drivers/gpu/drm/i915/display/intel_display_power.c } else if (IS_CANNONLAKE(i915)) { i915 4911 drivers/gpu/drm/i915/display/intel_display_power.c cnl_display_core_init(i915, resume); i915 4912 drivers/gpu/drm/i915/display/intel_display_power.c } else if (IS_GEN9_BC(i915)) { i915 4913 drivers/gpu/drm/i915/display/intel_display_power.c skl_display_core_init(i915, resume); i915 4914 drivers/gpu/drm/i915/display/intel_display_power.c } else if (IS_GEN9_LP(i915)) { i915 4915 drivers/gpu/drm/i915/display/intel_display_power.c bxt_display_core_init(i915, resume); i915 4916 drivers/gpu/drm/i915/display/intel_display_power.c } else if (IS_CHERRYVIEW(i915)) { i915 4918 drivers/gpu/drm/i915/display/intel_display_power.c chv_phy_control_init(i915); i915 4920 drivers/gpu/drm/i915/display/intel_display_power.c assert_isp_power_gated(i915); i915 4921 drivers/gpu/drm/i915/display/intel_display_power.c } else if (IS_VALLEYVIEW(i915)) { i915 4923 drivers/gpu/drm/i915/display/intel_display_power.c vlv_cmnlane_wa(i915); i915 4925 drivers/gpu/drm/i915/display/intel_display_power.c assert_ved_power_gated(i915); i915 4926 drivers/gpu/drm/i915/display/intel_display_power.c assert_isp_power_gated(i915); i915 4927 drivers/gpu/drm/i915/display/intel_display_power.c } else if (IS_BROADWELL(i915) || IS_HASWELL(i915)) { i915 4928 drivers/gpu/drm/i915/display/intel_display_power.c hsw_assert_cdclk(i915); i915 4929 drivers/gpu/drm/i915/display/intel_display_power.c intel_pch_reset_handshake(i915, !HAS_PCH_NOP(i915)); i915 4930 drivers/gpu/drm/i915/display/intel_display_power.c } else if (IS_IVYBRIDGE(i915)) { i915 4931 drivers/gpu/drm/i915/display/intel_display_power.c intel_pch_reset_handshake(i915, !HAS_PCH_NOP(i915)); i915 4941 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_get(i915, POWER_DOMAIN_INIT); i915 4945 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_get(i915, POWER_DOMAIN_INIT); i915 4946 drivers/gpu/drm/i915/display/intel_display_power.c intel_power_domains_sync_hw(i915); i915 4962 drivers/gpu/drm/i915/display/intel_display_power.c void intel_power_domains_driver_remove(struct drm_i915_private *i915) i915 4965 drivers/gpu/drm/i915/display/intel_display_power.c fetch_and_zero(&i915->power_domains.wakeref); i915 4969 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_put_unchecked(i915, POWER_DOMAIN_INIT); i915 4971 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_flush_work_sync(i915); i915 4973 drivers/gpu/drm/i915/display/intel_display_power.c intel_power_domains_verify_state(i915); i915 4976 drivers/gpu/drm/i915/display/intel_display_power.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 4991 drivers/gpu/drm/i915/display/intel_display_power.c void intel_power_domains_enable(struct drm_i915_private *i915) i915 4994 drivers/gpu/drm/i915/display/intel_display_power.c fetch_and_zero(&i915->power_domains.wakeref); i915 4996 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_put(i915, POWER_DOMAIN_INIT, wakeref); i915 4997 drivers/gpu/drm/i915/display/intel_display_power.c intel_power_domains_verify_state(i915); i915 5007 drivers/gpu/drm/i915/display/intel_display_power.c void intel_power_domains_disable(struct drm_i915_private *i915) i915 5009 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_domains *power_domains = &i915->power_domains; i915 5013 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_get(i915, POWER_DOMAIN_INIT); i915 5015 drivers/gpu/drm/i915/display/intel_display_power.c intel_power_domains_verify_state(i915); i915 5029 drivers/gpu/drm/i915/display/intel_display_power.c void intel_power_domains_suspend(struct drm_i915_private *i915, i915 5032 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_domains *power_domains = &i915->power_domains; i915 5036 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_put(i915, POWER_DOMAIN_INIT, wakeref); i915 5045 drivers/gpu/drm/i915/display/intel_display_power.c if (!(i915->csr.allowed_dc_mask & DC_STATE_EN_DC9) && i915 5047 drivers/gpu/drm/i915/display/intel_display_power.c i915->csr.dmc_payload) { i915 5048 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_flush_work(i915); i915 5049 drivers/gpu/drm/i915/display/intel_display_power.c intel_power_domains_verify_state(i915); i915 5058 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_put_unchecked(i915, POWER_DOMAIN_INIT); i915 5060 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_flush_work(i915); i915 5061 drivers/gpu/drm/i915/display/intel_display_power.c intel_power_domains_verify_state(i915); i915 5063 drivers/gpu/drm/i915/display/intel_display_power.c if (INTEL_GEN(i915) >= 11) i915 5064 drivers/gpu/drm/i915/display/intel_display_power.c icl_display_core_uninit(i915); i915 5065 drivers/gpu/drm/i915/display/intel_display_power.c else if (IS_CANNONLAKE(i915)) i915 5066 drivers/gpu/drm/i915/display/intel_display_power.c cnl_display_core_uninit(i915); i915 5067 drivers/gpu/drm/i915/display/intel_display_power.c else if (IS_GEN9_BC(i915)) i915 5068 drivers/gpu/drm/i915/display/intel_display_power.c skl_display_core_uninit(i915); i915 5069 drivers/gpu/drm/i915/display/intel_display_power.c else if (IS_GEN9_LP(i915)) i915 5070 drivers/gpu/drm/i915/display/intel_display_power.c bxt_display_core_uninit(i915); i915 5085 drivers/gpu/drm/i915/display/intel_display_power.c void intel_power_domains_resume(struct drm_i915_private *i915) i915 5087 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_domains *power_domains = &i915->power_domains; i915 5090 drivers/gpu/drm/i915/display/intel_display_power.c intel_power_domains_init_hw(i915, true); i915 5095 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_get(i915, POWER_DOMAIN_INIT); i915 5098 drivers/gpu/drm/i915/display/intel_display_power.c intel_power_domains_verify_state(i915); i915 5103 drivers/gpu/drm/i915/display/intel_display_power.c static void intel_power_domains_dump_info(struct drm_i915_private *i915) i915 5105 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_domains *power_domains = &i915->power_domains; i915 5108 drivers/gpu/drm/i915/display/intel_display_power.c for_each_power_well(i915, power_well) { i915 5116 drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_domain_str(i915, i915 5132 drivers/gpu/drm/i915/display/intel_display_power.c static void intel_power_domains_verify_state(struct drm_i915_private *i915) i915 5134 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_domains *power_domains = &i915->power_domains; i915 5143 drivers/gpu/drm/i915/display/intel_display_power.c for_each_power_well(i915, power_well) { i915 5148 drivers/gpu/drm/i915/display/intel_display_power.c enabled = power_well->desc->ops->is_enabled(i915, power_well); i915 5172 drivers/gpu/drm/i915/display/intel_display_power.c intel_power_domains_dump_info(i915); i915 5182 drivers/gpu/drm/i915/display/intel_display_power.c static void intel_power_domains_verify_state(struct drm_i915_private *i915) i915 5188 drivers/gpu/drm/i915/display/intel_display_power.c void intel_display_power_suspend_late(struct drm_i915_private *i915) i915 5190 drivers/gpu/drm/i915/display/intel_display_power.c if (INTEL_GEN(i915) >= 11 || IS_GEN9_LP(i915)) i915 5191 drivers/gpu/drm/i915/display/intel_display_power.c bxt_enable_dc9(i915); i915 5192 drivers/gpu/drm/i915/display/intel_display_power.c else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) i915 5193 drivers/gpu/drm/i915/display/intel_display_power.c hsw_enable_pc8(i915); i915 5196 drivers/gpu/drm/i915/display/intel_display_power.c void intel_display_power_resume_early(struct drm_i915_private *i915) i915 5198 drivers/gpu/drm/i915/display/intel_display_power.c if (INTEL_GEN(i915) >= 11 || IS_GEN9_LP(i915)) { i915 5199 drivers/gpu/drm/i915/display/intel_display_power.c gen9_sanitize_dc_state(i915); i915 5200 drivers/gpu/drm/i915/display/intel_display_power.c bxt_disable_dc9(i915); i915 5201 drivers/gpu/drm/i915/display/intel_display_power.c } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { i915 5202 drivers/gpu/drm/i915/display/intel_display_power.c hsw_disable_pc8(i915); i915 5206 drivers/gpu/drm/i915/display/intel_display_power.c void intel_display_power_suspend(struct drm_i915_private *i915) i915 5208 drivers/gpu/drm/i915/display/intel_display_power.c if (INTEL_GEN(i915) >= 11) { i915 5209 drivers/gpu/drm/i915/display/intel_display_power.c icl_display_core_uninit(i915); i915 5210 drivers/gpu/drm/i915/display/intel_display_power.c bxt_enable_dc9(i915); i915 5211 drivers/gpu/drm/i915/display/intel_display_power.c } else if (IS_GEN9_LP(i915)) { i915 5212 drivers/gpu/drm/i915/display/intel_display_power.c bxt_display_core_uninit(i915); i915 5213 drivers/gpu/drm/i915/display/intel_display_power.c bxt_enable_dc9(i915); i915 5214 drivers/gpu/drm/i915/display/intel_display_power.c } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { i915 5215 drivers/gpu/drm/i915/display/intel_display_power.c hsw_enable_pc8(i915); i915 5219 drivers/gpu/drm/i915/display/intel_display_power.c void intel_display_power_resume(struct drm_i915_private *i915) i915 5221 drivers/gpu/drm/i915/display/intel_display_power.c if (INTEL_GEN(i915) >= 11) { i915 5222 drivers/gpu/drm/i915/display/intel_display_power.c bxt_disable_dc9(i915); i915 5223 drivers/gpu/drm/i915/display/intel_display_power.c icl_display_core_init(i915, true); i915 5224 drivers/gpu/drm/i915/display/intel_display_power.c if (i915->csr.dmc_payload) { i915 5225 drivers/gpu/drm/i915/display/intel_display_power.c if (i915->csr.allowed_dc_mask & i915 5227 drivers/gpu/drm/i915/display/intel_display_power.c skl_enable_dc6(i915); i915 5228 drivers/gpu/drm/i915/display/intel_display_power.c else if (i915->csr.allowed_dc_mask & i915 5230 drivers/gpu/drm/i915/display/intel_display_power.c gen9_enable_dc5(i915); i915 5232 drivers/gpu/drm/i915/display/intel_display_power.c } else if (IS_GEN9_LP(i915)) { i915 5233 drivers/gpu/drm/i915/display/intel_display_power.c bxt_disable_dc9(i915); i915 5234 drivers/gpu/drm/i915/display/intel_display_power.c bxt_display_core_init(i915, true); i915 5235 drivers/gpu/drm/i915/display/intel_display_power.c if (i915->csr.dmc_payload && i915 5236 drivers/gpu/drm/i915/display/intel_display_power.c (i915->csr.allowed_dc_mask & DC_STATE_EN_UPTO_DC5)) i915 5237 drivers/gpu/drm/i915/display/intel_display_power.c gen9_enable_dc5(i915); i915 5238 drivers/gpu/drm/i915/display/intel_display_power.c } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { i915 5239 drivers/gpu/drm/i915/display/intel_display_power.c hsw_disable_pc8(i915); i915 266 drivers/gpu/drm/i915/display/intel_display_power.h void intel_display_power_suspend_late(struct drm_i915_private *i915); i915 267 drivers/gpu/drm/i915/display/intel_display_power.h void intel_display_power_resume_early(struct drm_i915_private *i915); i915 268 drivers/gpu/drm/i915/display/intel_display_power.h void intel_display_power_suspend(struct drm_i915_private *i915); i915 269 drivers/gpu/drm/i915/display/intel_display_power.h void intel_display_power_resume(struct drm_i915_private *i915); i915 272 drivers/gpu/drm/i915/display/intel_display_power.h intel_display_power_domain_str(struct drm_i915_private *i915, i915 286 drivers/gpu/drm/i915/display/intel_display_power.h void __intel_display_power_put_async(struct drm_i915_private *i915, i915 289 drivers/gpu/drm/i915/display/intel_display_power.h void intel_display_power_flush_work(struct drm_i915_private *i915); i915 295 drivers/gpu/drm/i915/display/intel_display_power.h intel_display_power_put_async(struct drm_i915_private *i915, i915 299 drivers/gpu/drm/i915/display/intel_display_power.h __intel_display_power_put_async(i915, domain, wakeref); i915 303 drivers/gpu/drm/i915/display/intel_display_power.h intel_display_power_put(struct drm_i915_private *i915, i915 307 drivers/gpu/drm/i915/display/intel_display_power.h intel_display_power_put_unchecked(i915, domain); i915 311 drivers/gpu/drm/i915/display/intel_display_power.h intel_display_power_put_async(struct drm_i915_private *i915, i915 315 drivers/gpu/drm/i915/display/intel_display_power.h __intel_display_power_put_async(i915, domain, -1); i915 319 drivers/gpu/drm/i915/display/intel_display_power.h #define with_intel_display_power(i915, domain, wf) \ i915 320 drivers/gpu/drm/i915/display/intel_display_power.h for ((wf) = intel_display_power_get((i915), (domain)); (wf); \ i915 321 drivers/gpu/drm/i915/display/intel_display_power.h intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0) i915 1145 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *i915 = dp_to_i915(intel_dp); i915 1150 drivers/gpu/drm/i915/display/intel_dp.c #define C (((status = intel_uncore_read_notrace(&i915->uncore, ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0) i915 1151 drivers/gpu/drm/i915/display/intel_dp.c done = wait_event_timeout(i915->gmbus_wait_queue, C, i915 1259 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *i915 = i915 1261 drivers/gpu/drm/i915/display/intel_dp.c enum phy phy = intel_port_to_phy(i915, intel_dig_port->base.port); i915 1274 drivers/gpu/drm/i915/display/intel_dp.c if (intel_phy_is_tc(i915, phy) && i915 1288 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *i915 = i915 1290 drivers/gpu/drm/i915/display/intel_dp.c struct intel_uncore *uncore = &i915->uncore; i915 1291 drivers/gpu/drm/i915/display/intel_dp.c enum phy phy = intel_port_to_phy(i915, intel_dig_port->base.port); i915 1292 drivers/gpu/drm/i915/display/intel_dp.c bool is_tc_port = intel_phy_is_tc(i915, phy); i915 1311 drivers/gpu/drm/i915/display/intel_dp.c aux_wakeref = intel_display_power_get(i915, aux_domain); i915 1326 drivers/gpu/drm/i915/display/intel_dp.c pm_qos_update_request(&i915->pm_qos, 0); i915 1455 drivers/gpu/drm/i915/display/intel_dp.c pm_qos_update_request(&i915->pm_qos, PM_QOS_DEFAULT_VALUE); i915 1461 drivers/gpu/drm/i915/display/intel_dp.c intel_display_power_put_async(i915, aux_domain, aux_wakeref); i915 656 drivers/gpu/drm/i915/display/intel_dp_mst.c struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev); i915 661 drivers/gpu/drm/i915/display/intel_dp_mst.c if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp)) i915 664 drivers/gpu/drm/i915/display/intel_dp_mst.c if (INTEL_GEN(i915) < 12 && port == PORT_A) i915 667 drivers/gpu/drm/i915/display/intel_dp_mst.c if (INTEL_GEN(i915) < 11 && port == PORT_E) i915 674 drivers/gpu/drm/i915/display/intel_dp_mst.c ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm, i915 78 drivers/gpu/drm/i915/display/intel_frontbuffer.c static void frontbuffer_flush(struct drm_i915_private *i915, i915 83 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_lock(&i915->fb_tracking.lock); i915 84 drivers/gpu/drm/i915/display/intel_frontbuffer.c frontbuffer_bits &= ~i915->fb_tracking.busy_bits; i915 85 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_unlock(&i915->fb_tracking.lock); i915 91 drivers/gpu/drm/i915/display/intel_frontbuffer.c intel_edp_drrs_flush(i915, frontbuffer_bits); i915 92 drivers/gpu/drm/i915/display/intel_frontbuffer.c intel_psr_flush(i915, frontbuffer_bits, origin); i915 93 drivers/gpu/drm/i915/display/intel_frontbuffer.c intel_fbc_flush(i915, frontbuffer_bits, origin); i915 108 drivers/gpu/drm/i915/display/intel_frontbuffer.c void intel_frontbuffer_flip_prepare(struct drm_i915_private *i915, i915 111 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_lock(&i915->fb_tracking.lock); i915 112 drivers/gpu/drm/i915/display/intel_frontbuffer.c i915->fb_tracking.flip_bits |= frontbuffer_bits; i915 114 drivers/gpu/drm/i915/display/intel_frontbuffer.c i915->fb_tracking.busy_bits &= ~frontbuffer_bits; i915 115 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_unlock(&i915->fb_tracking.lock); i915 128 drivers/gpu/drm/i915/display/intel_frontbuffer.c void intel_frontbuffer_flip_complete(struct drm_i915_private *i915, i915 131 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_lock(&i915->fb_tracking.lock); i915 133 drivers/gpu/drm/i915/display/intel_frontbuffer.c frontbuffer_bits &= i915->fb_tracking.flip_bits; i915 134 drivers/gpu/drm/i915/display/intel_frontbuffer.c i915->fb_tracking.flip_bits &= ~frontbuffer_bits; i915 135 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_unlock(&i915->fb_tracking.lock); i915 138 drivers/gpu/drm/i915/display/intel_frontbuffer.c frontbuffer_flush(i915, frontbuffer_bits, ORIGIN_FLIP); i915 152 drivers/gpu/drm/i915/display/intel_frontbuffer.c void intel_frontbuffer_flip(struct drm_i915_private *i915, i915 155 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_lock(&i915->fb_tracking.lock); i915 157 drivers/gpu/drm/i915/display/intel_frontbuffer.c i915->fb_tracking.busy_bits &= ~frontbuffer_bits; i915 158 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_unlock(&i915->fb_tracking.lock); i915 160 drivers/gpu/drm/i915/display/intel_frontbuffer.c frontbuffer_flush(i915, frontbuffer_bits, ORIGIN_FLIP); i915 167 drivers/gpu/drm/i915/display/intel_frontbuffer.c struct drm_i915_private *i915 = to_i915(front->obj->base.dev); i915 170 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_lock(&i915->fb_tracking.lock); i915 171 drivers/gpu/drm/i915/display/intel_frontbuffer.c i915->fb_tracking.busy_bits |= frontbuffer_bits; i915 172 drivers/gpu/drm/i915/display/intel_frontbuffer.c i915->fb_tracking.flip_bits &= ~frontbuffer_bits; i915 173 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_unlock(&i915->fb_tracking.lock); i915 177 drivers/gpu/drm/i915/display/intel_frontbuffer.c intel_psr_invalidate(i915, frontbuffer_bits, origin); i915 178 drivers/gpu/drm/i915/display/intel_frontbuffer.c intel_edp_drrs_invalidate(i915, frontbuffer_bits); i915 179 drivers/gpu/drm/i915/display/intel_frontbuffer.c intel_fbc_invalidate(i915, frontbuffer_bits, origin); i915 186 drivers/gpu/drm/i915/display/intel_frontbuffer.c struct drm_i915_private *i915 = to_i915(front->obj->base.dev); i915 189 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_lock(&i915->fb_tracking.lock); i915 191 drivers/gpu/drm/i915/display/intel_frontbuffer.c frontbuffer_bits &= i915->fb_tracking.busy_bits; i915 192 drivers/gpu/drm/i915/display/intel_frontbuffer.c i915->fb_tracking.busy_bits &= ~frontbuffer_bits; i915 193 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_unlock(&i915->fb_tracking.lock); i915 197 drivers/gpu/drm/i915/display/intel_frontbuffer.c frontbuffer_flush(i915, frontbuffer_bits, origin); i915 234 drivers/gpu/drm/i915/display/intel_frontbuffer.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 237 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_lock(&i915->fb_tracking.lock); i915 241 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_unlock(&i915->fb_tracking.lock); i915 252 drivers/gpu/drm/i915/display/intel_frontbuffer.c i915_active_init(i915, &front->write, i915 255 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_lock(&i915->fb_tracking.lock); i915 264 drivers/gpu/drm/i915/display/intel_frontbuffer.c spin_unlock(&i915->fb_tracking.lock); i915 50 drivers/gpu/drm/i915/display/intel_frontbuffer.h void intel_frontbuffer_flip_prepare(struct drm_i915_private *i915, i915 52 drivers/gpu/drm/i915/display/intel_frontbuffer.h void intel_frontbuffer_flip_complete(struct drm_i915_private *i915, i915 54 drivers/gpu/drm/i915/display/intel_frontbuffer.h void intel_frontbuffer_flip(struct drm_i915_private *i915, i915 192 drivers/gpu/drm/i915/display/intel_gmbus.c struct drm_i915_private *i915 = bus->dev_priv; i915 193 drivers/gpu/drm/i915/display/intel_gmbus.c struct intel_uncore *uncore = &i915->uncore; i915 197 drivers/gpu/drm/i915/display/intel_gmbus.c if (!IS_I830(i915) && !IS_I845G(i915)) i915 1084 drivers/gpu/drm/i915/display/intel_opregion.c void intel_opregion_register(struct drm_i915_private *i915) i915 1086 drivers/gpu/drm/i915/display/intel_opregion.c struct intel_opregion *opregion = &i915->opregion; i915 1097 drivers/gpu/drm/i915/display/intel_opregion.c intel_opregion_resume(i915); i915 1100 drivers/gpu/drm/i915/display/intel_opregion.c void intel_opregion_resume(struct drm_i915_private *i915) i915 1102 drivers/gpu/drm/i915/display/intel_opregion.c struct intel_opregion *opregion = &i915->opregion; i915 1108 drivers/gpu/drm/i915/display/intel_opregion.c intel_didl_outputs(i915); i915 1109 drivers/gpu/drm/i915/display/intel_opregion.c intel_setup_cadls(i915); i915 1125 drivers/gpu/drm/i915/display/intel_opregion.c intel_opregion_notify_adapter(i915, PCI_D0); i915 1128 drivers/gpu/drm/i915/display/intel_opregion.c void intel_opregion_suspend(struct drm_i915_private *i915, pci_power_t state) i915 1130 drivers/gpu/drm/i915/display/intel_opregion.c struct intel_opregion *opregion = &i915->opregion; i915 1135 drivers/gpu/drm/i915/display/intel_opregion.c intel_opregion_notify_adapter(i915, state); i915 1140 drivers/gpu/drm/i915/display/intel_opregion.c cancel_work_sync(&i915->opregion.asle_work); i915 1146 drivers/gpu/drm/i915/display/intel_opregion.c void intel_opregion_unregister(struct drm_i915_private *i915) i915 1148 drivers/gpu/drm/i915/display/intel_opregion.c struct intel_opregion *opregion = &i915->opregion; i915 1150 drivers/gpu/drm/i915/display/intel_opregion.c intel_opregion_suspend(i915, PCI_D1); i915 177 drivers/gpu/drm/i915/display/intel_overlay.c struct drm_i915_private *i915; i915 245 drivers/gpu/drm/i915/display/intel_overlay.c struct drm_i915_private *dev_priv = overlay->i915; i915 288 drivers/gpu/drm/i915/display/intel_overlay.c intel_frontbuffer_flip_prepare(overlay->i915, i915 303 drivers/gpu/drm/i915/display/intel_overlay.c struct drm_i915_private *dev_priv = overlay->i915; i915 346 drivers/gpu/drm/i915/display/intel_overlay.c intel_frontbuffer_flip_complete(overlay->i915, i915 361 drivers/gpu/drm/i915/display/intel_overlay.c struct drm_i915_private *dev_priv = overlay->i915; i915 438 drivers/gpu/drm/i915/display/intel_overlay.c struct drm_i915_private *dev_priv = overlay->i915; i915 747 drivers/gpu/drm/i915/display/intel_overlay.c struct drm_i915_private *dev_priv = overlay->i915; i915 852 drivers/gpu/drm/i915/display/intel_overlay.c struct drm_i915_private *dev_priv = overlay->i915; i915 889 drivers/gpu/drm/i915/display/intel_overlay.c struct drm_i915_private *dev_priv = overlay->i915; i915 1301 drivers/gpu/drm/i915/display/intel_overlay.c struct drm_i915_private *i915 = overlay->i915; i915 1306 drivers/gpu/drm/i915/display/intel_overlay.c mutex_lock(&i915->drm.struct_mutex); i915 1308 drivers/gpu/drm/i915/display/intel_overlay.c obj = i915_gem_object_create_stolen(i915, PAGE_SIZE); i915 1310 drivers/gpu/drm/i915/display/intel_overlay.c obj = i915_gem_object_create_internal(i915, PAGE_SIZE); i915 1335 drivers/gpu/drm/i915/display/intel_overlay.c mutex_unlock(&i915->drm.struct_mutex); i915 1341 drivers/gpu/drm/i915/display/intel_overlay.c mutex_unlock(&i915->drm.struct_mutex); i915 1360 drivers/gpu/drm/i915/display/intel_overlay.c overlay->i915 = dev_priv; i915 14 drivers/gpu/drm/i915/display/intel_quirks.c static void quirk_ssc_force_disable(struct drm_i915_private *i915) i915 16 drivers/gpu/drm/i915/display/intel_quirks.c i915->quirks |= QUIRK_LVDS_SSC_DISABLE; i915 24 drivers/gpu/drm/i915/display/intel_quirks.c static void quirk_invert_brightness(struct drm_i915_private *i915) i915 26 drivers/gpu/drm/i915/display/intel_quirks.c i915->quirks |= QUIRK_INVERT_BRIGHTNESS; i915 31 drivers/gpu/drm/i915/display/intel_quirks.c static void quirk_backlight_present(struct drm_i915_private *i915) i915 33 drivers/gpu/drm/i915/display/intel_quirks.c i915->quirks |= QUIRK_BACKLIGHT_PRESENT; i915 40 drivers/gpu/drm/i915/display/intel_quirks.c static void quirk_increase_t12_delay(struct drm_i915_private *i915) i915 42 drivers/gpu/drm/i915/display/intel_quirks.c i915->quirks |= QUIRK_INCREASE_T12_DELAY; i915 50 drivers/gpu/drm/i915/display/intel_quirks.c static void quirk_increase_ddi_disabled_time(struct drm_i915_private *i915) i915 52 drivers/gpu/drm/i915/display/intel_quirks.c i915->quirks |= QUIRK_INCREASE_DDI_DISABLED_TIME; i915 60 drivers/gpu/drm/i915/display/intel_quirks.c void (*hook)(struct drm_i915_private *i915); i915 65 drivers/gpu/drm/i915/display/intel_quirks.c void (*hook)(struct drm_i915_private *i915); i915 151 drivers/gpu/drm/i915/display/intel_quirks.c void intel_init_quirks(struct drm_i915_private *i915) i915 153 drivers/gpu/drm/i915/display/intel_quirks.c struct pci_dev *d = i915->drm.pdev; i915 164 drivers/gpu/drm/i915/display/intel_quirks.c q->hook(i915); i915 168 drivers/gpu/drm/i915/display/intel_quirks.c intel_dmi_quirks[i].hook(i915); i915 26 drivers/gpu/drm/i915/display/intel_tc.c static bool has_modular_fia(struct drm_i915_private *i915) i915 28 drivers/gpu/drm/i915/display/intel_tc.c if (!INTEL_INFO(i915)->display.has_modular_fia) i915 31 drivers/gpu/drm/i915/display/intel_tc.c return intel_uncore_read(&i915->uncore, i915 35 drivers/gpu/drm/i915/display/intel_tc.c static enum phy_fia tc_port_to_fia(struct drm_i915_private *i915, i915 38 drivers/gpu/drm/i915/display/intel_tc.c if (!has_modular_fia(i915)) i915 50 drivers/gpu/drm/i915/display/intel_tc.c struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); i915 51 drivers/gpu/drm/i915/display/intel_tc.c enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port); i915 52 drivers/gpu/drm/i915/display/intel_tc.c struct intel_uncore *uncore = &i915->uncore; i915 66 drivers/gpu/drm/i915/display/intel_tc.c struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); i915 74 drivers/gpu/drm/i915/display/intel_tc.c with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref) i915 97 drivers/gpu/drm/i915/display/intel_tc.c struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); i915 98 drivers/gpu/drm/i915/display/intel_tc.c enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port); i915 100 drivers/gpu/drm/i915/display/intel_tc.c struct intel_uncore *uncore = &i915->uncore; i915 152 drivers/gpu/drm/i915/display/intel_tc.c struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); i915 153 drivers/gpu/drm/i915/display/intel_tc.c enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port); i915 154 drivers/gpu/drm/i915/display/intel_tc.c struct intel_uncore *uncore = &i915->uncore; i915 184 drivers/gpu/drm/i915/display/intel_tc.c struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); i915 185 drivers/gpu/drm/i915/display/intel_tc.c enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port); i915 186 drivers/gpu/drm/i915/display/intel_tc.c struct intel_uncore *uncore = &i915->uncore; i915 203 drivers/gpu/drm/i915/display/intel_tc.c struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); i915 204 drivers/gpu/drm/i915/display/intel_tc.c enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port); i915 205 drivers/gpu/drm/i915/display/intel_tc.c struct intel_uncore *uncore = &i915->uncore; i915 234 drivers/gpu/drm/i915/display/intel_tc.c struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); i915 235 drivers/gpu/drm/i915/display/intel_tc.c enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port); i915 236 drivers/gpu/drm/i915/display/intel_tc.c struct intel_uncore *uncore = &i915->uncore; i915 389 drivers/gpu/drm/i915/display/intel_tc.c struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); i915 392 drivers/gpu/drm/i915/display/intel_tc.c intel_display_power_flush_work(i915); i915 393 drivers/gpu/drm/i915/display/intel_tc.c WARN_ON(intel_display_power_is_enabled(i915, i915 476 drivers/gpu/drm/i915/display/intel_tc.c struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); i915 479 drivers/gpu/drm/i915/display/intel_tc.c wakeref = intel_display_power_get(i915, POWER_DOMAIN_DISPLAY_CORE); i915 498 drivers/gpu/drm/i915/display/intel_tc.c struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); i915 503 drivers/gpu/drm/i915/display/intel_tc.c intel_display_power_put_async(i915, POWER_DOMAIN_DISPLAY_CORE, i915 530 drivers/gpu/drm/i915/display/intel_tc.c struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); i915 532 drivers/gpu/drm/i915/display/intel_tc.c enum tc_port tc_port = intel_port_to_tc(i915, port); i915 543 drivers/gpu/drm/i915/display/intel_tc.c dig_port->tc_phy_fia = tc_port_to_fia(i915, tc_port); i915 462 drivers/gpu/drm/i915/display/intel_vdsc.c struct drm_i915_private *i915 = to_i915(crtc_state->base.crtc->dev); i915 475 drivers/gpu/drm/i915/display/intel_vdsc.c if (INTEL_GEN(i915) >= 12 && cpu_transcoder == TRANSCODER_A) i915 158 drivers/gpu/drm/i915/gem/i915_gem_client_blt.c struct drm_i915_private *i915 = w->ce->engine->i915; i915 177 drivers/gpu/drm/i915/gem/i915_gem_client_blt.c mutex_lock(&i915->drm.struct_mutex); i915 233 drivers/gpu/drm/i915/gem/i915_gem_client_blt.c mutex_unlock(&i915->drm.struct_mutex); i915 156 drivers/gpu/drm/i915/gem/i915_gem_context.c engine = intel_engine_lookup_user(ctx->i915, i915 170 drivers/gpu/drm/i915/gem/i915_gem_context.c static inline int new_hw_id(struct drm_i915_private *i915, gfp_t gfp) i915 174 drivers/gpu/drm/i915/gem/i915_gem_context.c lockdep_assert_held(&i915->contexts.mutex); i915 176 drivers/gpu/drm/i915/gem/i915_gem_context.c if (INTEL_GEN(i915) >= 12) i915 178 drivers/gpu/drm/i915/gem/i915_gem_context.c else if (INTEL_GEN(i915) >= 11) i915 180 drivers/gpu/drm/i915/gem/i915_gem_context.c else if (USES_GUC_SUBMISSION(i915)) i915 189 drivers/gpu/drm/i915/gem/i915_gem_context.c return ida_simple_get(&i915->contexts.hw_ida, 0, max, gfp); i915 192 drivers/gpu/drm/i915/gem/i915_gem_context.c static int steal_hw_id(struct drm_i915_private *i915) i915 198 drivers/gpu/drm/i915/gem/i915_gem_context.c lockdep_assert_held(&i915->contexts.mutex); i915 201 drivers/gpu/drm/i915/gem/i915_gem_context.c &i915->contexts.hw_id_list, hw_id_link) { i915 217 drivers/gpu/drm/i915/gem/i915_gem_context.c list_splice_tail(&pinned, &i915->contexts.hw_id_list); i915 221 drivers/gpu/drm/i915/gem/i915_gem_context.c static int assign_hw_id(struct drm_i915_private *i915, unsigned int *out) i915 225 drivers/gpu/drm/i915/gem/i915_gem_context.c lockdep_assert_held(&i915->contexts.mutex); i915 233 drivers/gpu/drm/i915/gem/i915_gem_context.c ret = new_hw_id(i915, GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN); i915 235 drivers/gpu/drm/i915/gem/i915_gem_context.c ret = steal_hw_id(i915); i915 237 drivers/gpu/drm/i915/gem/i915_gem_context.c ret = new_hw_id(i915, GFP_KERNEL); i915 248 drivers/gpu/drm/i915/gem/i915_gem_context.c struct drm_i915_private *i915 = ctx->i915; i915 253 drivers/gpu/drm/i915/gem/i915_gem_context.c mutex_lock(&i915->contexts.mutex); i915 255 drivers/gpu/drm/i915/gem/i915_gem_context.c ida_simple_remove(&i915->contexts.hw_ida, ctx->hw_id); i915 258 drivers/gpu/drm/i915/gem/i915_gem_context.c mutex_unlock(&i915->contexts.mutex); i915 284 drivers/gpu/drm/i915/gem/i915_gem_context.c const struct intel_gt *gt = &ctx->i915->gt; i915 312 drivers/gpu/drm/i915/gem/i915_gem_context.c lockdep_assert_held(&ctx->i915->drm.struct_mutex); i915 336 drivers/gpu/drm/i915/gem/i915_gem_context.c static void contexts_free(struct drm_i915_private *i915) i915 338 drivers/gpu/drm/i915/gem/i915_gem_context.c struct llist_node *freed = llist_del_all(&i915->contexts.free_list); i915 341 drivers/gpu/drm/i915/gem/i915_gem_context.c lockdep_assert_held(&i915->drm.struct_mutex); i915 347 drivers/gpu/drm/i915/gem/i915_gem_context.c static void contexts_free_first(struct drm_i915_private *i915) i915 352 drivers/gpu/drm/i915/gem/i915_gem_context.c lockdep_assert_held(&i915->drm.struct_mutex); i915 354 drivers/gpu/drm/i915/gem/i915_gem_context.c freed = llist_del_first(&i915->contexts.free_list); i915 364 drivers/gpu/drm/i915/gem/i915_gem_context.c struct drm_i915_private *i915 = i915 365 drivers/gpu/drm/i915/gem/i915_gem_context.c container_of(work, typeof(*i915), contexts.free_work); i915 367 drivers/gpu/drm/i915/gem/i915_gem_context.c mutex_lock(&i915->drm.struct_mutex); i915 368 drivers/gpu/drm/i915/gem/i915_gem_context.c contexts_free(i915); i915 369 drivers/gpu/drm/i915/gem/i915_gem_context.c mutex_unlock(&i915->drm.struct_mutex); i915 375 drivers/gpu/drm/i915/gem/i915_gem_context.c struct drm_i915_private *i915 = ctx->i915; i915 378 drivers/gpu/drm/i915/gem/i915_gem_context.c if (llist_add(&ctx->free_link, &i915->contexts.free_list)) i915 379 drivers/gpu/drm/i915/gem/i915_gem_context.c queue_work(i915->wq, &i915->contexts.free_work); i915 407 drivers/gpu/drm/i915/gem/i915_gem_context.c __create_context(struct drm_i915_private *i915) i915 419 drivers/gpu/drm/i915/gem/i915_gem_context.c list_add_tail(&ctx->link, &i915->contexts.list); i915 420 drivers/gpu/drm/i915/gem/i915_gem_context.c ctx->i915 = i915; i915 438 drivers/gpu/drm/i915/gem/i915_gem_context.c ctx->remap_slice = ALL_L3_SLICES(i915); i915 587 drivers/gpu/drm/i915/gem/i915_gem_context.c i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio) i915 592 drivers/gpu/drm/i915/gem/i915_gem_context.c ctx = i915_gem_create_context(i915, 0); i915 610 drivers/gpu/drm/i915/gem/i915_gem_context.c static void init_contexts(struct drm_i915_private *i915) i915 612 drivers/gpu/drm/i915/gem/i915_gem_context.c mutex_init(&i915->contexts.mutex); i915 613 drivers/gpu/drm/i915/gem/i915_gem_context.c INIT_LIST_HEAD(&i915->contexts.list); i915 618 drivers/gpu/drm/i915/gem/i915_gem_context.c ida_init(&i915->contexts.hw_ida); i915 619 drivers/gpu/drm/i915/gem/i915_gem_context.c INIT_LIST_HEAD(&i915->contexts.hw_id_list); i915 621 drivers/gpu/drm/i915/gem/i915_gem_context.c INIT_WORK(&i915->contexts.free_work, contexts_free_worker); i915 622 drivers/gpu/drm/i915/gem/i915_gem_context.c init_llist_head(&i915->contexts.free_list); i915 657 drivers/gpu/drm/i915/gem/i915_gem_context.c void i915_gem_contexts_fini(struct drm_i915_private *i915) i915 659 drivers/gpu/drm/i915/gem/i915_gem_context.c lockdep_assert_held(&i915->drm.struct_mutex); i915 661 drivers/gpu/drm/i915/gem/i915_gem_context.c destroy_kernel_context(&i915->kernel_context); i915 664 drivers/gpu/drm/i915/gem/i915_gem_context.c GEM_BUG_ON(!list_empty(&i915->contexts.hw_id_list)); i915 665 drivers/gpu/drm/i915/gem/i915_gem_context.c ida_destroy(&i915->contexts.hw_ida); i915 711 drivers/gpu/drm/i915/gem/i915_gem_context.c int i915_gem_context_open(struct drm_i915_private *i915, i915 724 drivers/gpu/drm/i915/gem/i915_gem_context.c mutex_lock(&i915->drm.struct_mutex); i915 725 drivers/gpu/drm/i915/gem/i915_gem_context.c ctx = i915_gem_create_context(i915, 0); i915 726 drivers/gpu/drm/i915/gem/i915_gem_context.c mutex_unlock(&i915->drm.struct_mutex); i915 767 drivers/gpu/drm/i915/gem/i915_gem_context.c struct drm_i915_private *i915 = to_i915(dev); i915 773 drivers/gpu/drm/i915/gem/i915_gem_context.c if (!HAS_FULL_PPGTT(i915)) i915 779 drivers/gpu/drm/i915/gem/i915_gem_context.c ppgtt = i915_ppgtt_create(i915); i915 873 drivers/gpu/drm/i915/gem/i915_gem_context.c struct drm_i915_private *i915 = ctx->i915; i915 879 drivers/gpu/drm/i915/gem/i915_gem_context.c lockdep_assert_held(&i915->drm.struct_mutex); i915 886 drivers/gpu/drm/i915/gem/i915_gem_context.c i915_active_init(i915, &cb->base, NULL, cb_retire); i915 945 drivers/gpu/drm/i915/gem/i915_gem_context.c ret = mutex_lock_interruptible(&ctx->i915->drm.struct_mutex); i915 950 drivers/gpu/drm/i915/gem/i915_gem_context.c mutex_unlock(&ctx->i915->drm.struct_mutex); i915 978 drivers/gpu/drm/i915/gem/i915_gem_context.c if (INTEL_GEN(old->i915) < 8) i915 1009 drivers/gpu/drm/i915/gem/i915_gem_context.c } else if (HAS_LOGICAL_RING_CONTEXTS(engine->i915)) { i915 1037 drivers/gpu/drm/i915/gem/i915_gem_context.c if (HAS_LOGICAL_RING_CONTEXTS(ce->engine->i915)) i915 1070 drivers/gpu/drm/i915/gem/i915_gem_context.c err = mutex_lock_interruptible(&ctx->i915->drm.struct_mutex); i915 1100 drivers/gpu/drm/i915/gem/i915_gem_context.c mutex_unlock(&ctx->i915->drm.struct_mutex); i915 1125 drivers/gpu/drm/i915/gem/i915_gem_context.c *cs++ = intel_sseu_make_rpcs(rq->i915, &sseu); i915 1168 drivers/gpu/drm/i915/gem/i915_gem_context.c GEM_BUG_ON(INTEL_GEN(ce->engine->i915) < 8); i915 1190 drivers/gpu/drm/i915/gem/i915_gem_context.c struct drm_i915_private *i915 = ce->engine->i915; i915 1193 drivers/gpu/drm/i915/gem/i915_gem_context.c ret = mutex_lock_interruptible(&i915->drm.struct_mutex); i915 1199 drivers/gpu/drm/i915/gem/i915_gem_context.c mutex_unlock(&i915->drm.struct_mutex); i915 1205 drivers/gpu/drm/i915/gem/i915_gem_context.c user_to_context_sseu(struct drm_i915_private *i915, i915 1209 drivers/gpu/drm/i915/gem/i915_gem_context.c const struct sseu_dev_info *device = &RUNTIME_INFO(i915)->sseu; i915 1248 drivers/gpu/drm/i915/gem/i915_gem_context.c if (IS_GEN(i915, 11)) { i915 1305 drivers/gpu/drm/i915/gem/i915_gem_context.c struct drm_i915_private *i915 = ctx->i915; i915 1315 drivers/gpu/drm/i915/gem/i915_gem_context.c if (!IS_GEN(i915, 11)) i915 1342 drivers/gpu/drm/i915/gem/i915_gem_context.c ret = user_to_context_sseu(i915, &user_sseu, &sseu); i915 1375 drivers/gpu/drm/i915/gem/i915_gem_context.c if (!HAS_EXECLISTS(set->ctx->i915)) i915 1378 drivers/gpu/drm/i915/gem/i915_gem_context.c if (USES_GUC_SUBMISSION(set->ctx->i915)) i915 1424 drivers/gpu/drm/i915/gem/i915_gem_context.c siblings[n] = intel_engine_lookup_user(set->ctx->i915, i915 1495 drivers/gpu/drm/i915/gem/i915_gem_context.c master = intel_engine_lookup_user(set->ctx->i915, i915 1512 drivers/gpu/drm/i915/gem/i915_gem_context.c bond = intel_engine_lookup_user(set->ctx->i915, i915 1600 drivers/gpu/drm/i915/gem/i915_gem_context.c engine = intel_engine_lookup_user(ctx->i915, i915 1797 drivers/gpu/drm/i915/gem/i915_gem_context.c else if (!(ctx->i915->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY)) i915 2079 drivers/gpu/drm/i915/gem/i915_gem_context.c struct drm_i915_private *i915 = to_i915(dev); i915 2084 drivers/gpu/drm/i915/gem/i915_gem_context.c if (!DRIVER_CAPS(i915)->has_logical_contexts) i915 2090 drivers/gpu/drm/i915/gem/i915_gem_context.c ret = intel_gt_terminally_wedged(&i915->gt); i915 2105 drivers/gpu/drm/i915/gem/i915_gem_context.c ext_data.ctx = i915_gem_create_context(i915, args->flags); i915 2341 drivers/gpu/drm/i915/gem/i915_gem_context.c struct drm_i915_private *i915 = ctx->i915; i915 2344 drivers/gpu/drm/i915/gem/i915_gem_context.c mutex_lock(&i915->contexts.mutex); i915 2351 drivers/gpu/drm/i915/gem/i915_gem_context.c err = assign_hw_id(i915, &ctx->hw_id); i915 2355 drivers/gpu/drm/i915/gem/i915_gem_context.c list_add_tail(&ctx->hw_id_link, &i915->contexts.hw_id_list); i915 2362 drivers/gpu/drm/i915/gem/i915_gem_context.c mutex_unlock(&i915->contexts.mutex); i915 139 drivers/gpu/drm/i915/gem/i915_gem_context.h int i915_gem_context_open(struct drm_i915_private *i915, i915 162 drivers/gpu/drm/i915/gem/i915_gem_context.h i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio); i915 51 drivers/gpu/drm/i915/gem/i915_gem_context_types.h struct drm_i915_private *i915; i915 224 drivers/gpu/drm/i915/gem/i915_gem_domain.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 237 drivers/gpu/drm/i915/gem/i915_gem_domain.c if (!HAS_LLC(i915) && cache_level != I915_CACHE_NONE) { i915 239 drivers/gpu/drm/i915/gem/i915_gem_domain.c intel_runtime_pm_get(&i915->runtime_pm); i915 249 drivers/gpu/drm/i915/gem/i915_gem_domain.c ret = mutex_lock_interruptible(&i915->ggtt.vm.mutex); i915 251 drivers/gpu/drm/i915/gem/i915_gem_domain.c intel_runtime_pm_put(&i915->runtime_pm, i915 272 drivers/gpu/drm/i915/gem/i915_gem_domain.c mutex_unlock(&i915->ggtt.vm.mutex); i915 273 drivers/gpu/drm/i915/gem/i915_gem_domain.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 341 drivers/gpu/drm/i915/gem/i915_gem_domain.c struct drm_i915_private *i915 = to_i915(dev); i915 358 drivers/gpu/drm/i915/gem/i915_gem_domain.c if (!HAS_LLC(i915) && !HAS_SNOOP(i915)) i915 364 drivers/gpu/drm/i915/gem/i915_gem_domain.c level = HAS_WT(i915) ? I915_CACHE_WT : I915_CACHE_NONE; i915 392 drivers/gpu/drm/i915/gem/i915_gem_domain.c ret = mutex_lock_interruptible(&i915->drm.struct_mutex); i915 401 drivers/gpu/drm/i915/gem/i915_gem_domain.c mutex_unlock(&i915->drm.struct_mutex); i915 484 drivers/gpu/drm/i915/gem/i915_gem_domain.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 489 drivers/gpu/drm/i915/gem/i915_gem_domain.c mutex_lock(&i915->ggtt.vm.mutex); i915 496 drivers/gpu/drm/i915/gem/i915_gem_domain.c mutex_unlock(&i915->ggtt.vm.mutex); i915 501 drivers/gpu/drm/i915/gem/i915_gem_domain.c spin_lock_irqsave(&i915->mm.obj_lock, flags); i915 504 drivers/gpu/drm/i915/gem/i915_gem_domain.c list_move_tail(&obj->mm.link, &i915->mm.shrink_list); i915 506 drivers/gpu/drm/i915/gem/i915_gem_domain.c spin_unlock_irqrestore(&i915->mm.obj_lock, flags); i915 217 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c struct drm_i915_private *i915; /** i915 backpointer */ i915 898 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c struct drm_i915_private *i915) i915 903 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c cache->gen = INTEL_GEN(i915); i915 904 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c cache->has_llc = HAS_LLC(i915); i915 905 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c cache->use_64bit_reloc = HAS_64BIT_RELOC(i915); i915 907 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment; i915 927 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c struct drm_i915_private *i915 = i915 928 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c container_of(cache, struct i915_execbuffer, reloc_cache)->i915; i915 929 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c return &i915->ggtt; i915 1394 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c IS_GEN(eb->i915, 6)) { i915 1682 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c struct drm_device *dev = &eb->i915->drm; i915 1725 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c flush_workqueue(eb->i915->mm.userptr_wq); i915 1943 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (!IS_GEN(rq->i915, 7) || rq->engine->id != RCS0) { i915 1966 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c struct drm_i915_private *dev_priv = eb->i915; i915 2029 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (CMDPARSER_USES_GGTT(eb->i915) && (err == -EACCES)) i915 2046 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (CMDPARSER_USES_GGTT(eb->i915)) i915 2108 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c static int num_vcs_engines(const struct drm_i915_private *i915) i915 2110 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c return hweight64(INTEL_INFO(i915)->engine_mask & i915 2182 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c err = mutex_lock_interruptible(&eb->i915->drm.struct_mutex); i915 2187 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c mutex_unlock(&eb->i915->drm.struct_mutex); i915 2198 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c mutex_lock(&eb->i915->drm.struct_mutex); i915 2200 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c mutex_unlock(&eb->i915->drm.struct_mutex); i915 2287 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c struct drm_i915_private *i915 = eb->i915; i915 2297 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (user_ring_id == I915_EXEC_BSD && num_vcs_engines(i915) > 1) { i915 2301 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c bsd_idx = gen8_dispatch_bsd_engine(i915, file); i915 2483 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c struct drm_i915_private *i915 = to_i915(dev); i915 2495 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c eb.i915 = i915; i915 2507 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c reloc_cache_init(&eb.reloc_cache, eb.i915); i915 2515 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (INTEL_GEN(i915) >= 11) i915 2519 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (!HAS_SECURE_BATCHES(i915)) i915 37 drivers/gpu/drm/i915/gem/i915_gem_internal.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 60 drivers/gpu/drm/i915/gem/i915_gem_internal.c if (IS_I965GM(i915) || IS_I965G(i915)) { i915 172 drivers/gpu/drm/i915/gem/i915_gem_internal.c i915_gem_object_create_internal(struct drm_i915_private *i915, i915 188 drivers/gpu/drm/i915/gem/i915_gem_internal.c drm_gem_private_object_init(&i915->drm, &obj->base, size); i915 194 drivers/gpu/drm/i915/gem/i915_gem_internal.c cache_level = HAS_LLC(i915) ? I915_CACHE_LLC : I915_CACHE_NONE; i915 223 drivers/gpu/drm/i915/gem/i915_gem_mman.c struct drm_i915_private *i915 = to_i915(dev); i915 224 drivers/gpu/drm/i915/gem/i915_gem_mman.c struct intel_runtime_pm *rpm = &i915->runtime_pm; i915 225 drivers/gpu/drm/i915/gem/i915_gem_mman.c struct i915_ggtt *ggtt = &i915->ggtt; i915 257 drivers/gpu/drm/i915/gem/i915_gem_mman.c if (obj->cache_level != I915_CACHE_NONE && !HAS_LLC(i915)) { i915 310 drivers/gpu/drm/i915/gem/i915_gem_mman.c mutex_lock(&i915->ggtt.vm.mutex); i915 312 drivers/gpu/drm/i915/gem/i915_gem_mman.c list_add(&obj->userfault_link, &i915->ggtt.userfault_list); i915 313 drivers/gpu/drm/i915/gem/i915_gem_mman.c mutex_unlock(&i915->ggtt.vm.mutex); i915 316 drivers/gpu/drm/i915/gem/i915_gem_mman.c intel_wakeref_auto(&i915->ggtt.userfault_wakeref, i915 406 drivers/gpu/drm/i915/gem/i915_gem_mman.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 417 drivers/gpu/drm/i915/gem/i915_gem_mman.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 418 drivers/gpu/drm/i915/gem/i915_gem_mman.c mutex_lock(&i915->ggtt.vm.mutex); i915 435 drivers/gpu/drm/i915/gem/i915_gem_mman.c mutex_unlock(&i915->ggtt.vm.mutex); i915 436 drivers/gpu/drm/i915/gem/i915_gem_mman.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 441 drivers/gpu/drm/i915/gem/i915_gem_mman.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 450 drivers/gpu/drm/i915/gem/i915_gem_mman.c err = i915_gem_wait_for_idle(i915, i915 456 drivers/gpu/drm/i915/gem/i915_gem_mman.c i915_gem_drain_freed_objects(i915); i915 461 drivers/gpu/drm/i915/gem/i915_gem_mman.c } while (flush_delayed_work(&i915->gem.retire_work)); i915 141 drivers/gpu/drm/i915/gem/i915_gem_object.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 146 drivers/gpu/drm/i915/gem/i915_gem_object.c GEM_BUG_ON(!atomic_read(&i915->mm.free_count)); i915 147 drivers/gpu/drm/i915/gem/i915_gem_object.c atomic_dec(&i915->mm.free_count); i915 150 drivers/gpu/drm/i915/gem/i915_gem_object.c static void __i915_gem_free_objects(struct drm_i915_private *i915, i915 156 drivers/gpu/drm/i915/gem/i915_gem_object.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 162 drivers/gpu/drm/i915/gem/i915_gem_object.c mutex_lock(&i915->drm.struct_mutex); i915 172 drivers/gpu/drm/i915/gem/i915_gem_object.c mutex_unlock(&i915->drm.struct_mutex); i915 194 drivers/gpu/drm/i915/gem/i915_gem_object.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 197 drivers/gpu/drm/i915/gem/i915_gem_object.c void i915_gem_flush_free_objects(struct drm_i915_private *i915) i915 199 drivers/gpu/drm/i915/gem/i915_gem_object.c struct llist_node *freed = llist_del_all(&i915->mm.free_list); i915 202 drivers/gpu/drm/i915/gem/i915_gem_object.c __i915_gem_free_objects(i915, freed); i915 207 drivers/gpu/drm/i915/gem/i915_gem_object.c struct drm_i915_private *i915 = i915 210 drivers/gpu/drm/i915/gem/i915_gem_object.c i915_gem_flush_free_objects(i915); i915 216 drivers/gpu/drm/i915/gem/i915_gem_object.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 226 drivers/gpu/drm/i915/gem/i915_gem_object.c atomic_inc(&i915->mm.free_count); i915 247 drivers/gpu/drm/i915/gem/i915_gem_object.c if (llist_add(&obj->freed, &i915->mm.free_list)) i915 248 drivers/gpu/drm/i915/gem/i915_gem_object.c queue_work(i915->wq, &i915->mm.free_work); i915 301 drivers/gpu/drm/i915/gem/i915_gem_object.c void i915_gem_init__objects(struct drm_i915_private *i915) i915 303 drivers/gpu/drm/i915/gem/i915_gem_object.c INIT_WORK(&i915->mm.free_work, __i915_gem_free_work); i915 20 drivers/gpu/drm/i915/gem/i915_gem_object.h void i915_gem_init__objects(struct drm_i915_private *i915); i915 28 drivers/gpu/drm/i915/gem/i915_gem_object.h i915_gem_object_create_shmem(struct drm_i915_private *i915, u64 size); i915 30 drivers/gpu/drm/i915/gem/i915_gem_object.h i915_gem_object_create_shmem_from_data(struct drm_i915_private *i915, i915 43 drivers/gpu/drm/i915/gem/i915_gem_object.h void i915_gem_flush_free_objects(struct drm_i915_private *i915); i915 18 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c struct drm_i915_private *i915 = ce->vm->i915; i915 55 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c if (INTEL_GEN(i915) >= 8) { i915 202 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c struct drm_i915_private *i915 = ce->vm->i915; i915 239 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c if (INTEL_GEN(i915) >= 9) { i915 250 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c } else if (INTEL_GEN(i915) >= 8) { i915 15 drivers/gpu/drm/i915/gem/i915_gem_pages.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 16 drivers/gpu/drm/i915/gem/i915_gem_pages.c unsigned long supported = INTEL_INFO(i915)->page_sizes; i915 35 drivers/gpu/drm/i915/gem/i915_gem_pages.c i915->quirks & QUIRK_PIN_SWIZZLED_PAGES) { i915 57 drivers/gpu/drm/i915/gem/i915_gem_pages.c GEM_BUG_ON(!HAS_PAGE_SIZES(i915, obj->mm.page_sizes.sg)); i915 63 drivers/gpu/drm/i915/gem/i915_gem_pages.c spin_lock_irqsave(&i915->mm.obj_lock, flags); i915 65 drivers/gpu/drm/i915/gem/i915_gem_pages.c i915->mm.shrink_count++; i915 66 drivers/gpu/drm/i915/gem/i915_gem_pages.c i915->mm.shrink_memory += obj->base.size; i915 69 drivers/gpu/drm/i915/gem/i915_gem_pages.c list = &i915->mm.purge_list; i915 71 drivers/gpu/drm/i915/gem/i915_gem_pages.c list = &i915->mm.shrink_list; i915 74 drivers/gpu/drm/i915/gem/i915_gem_pages.c spin_unlock_irqrestore(&i915->mm.obj_lock, flags); i915 30 drivers/gpu/drm/i915/gem/i915_gem_pm.c static void i915_gem_park(struct drm_i915_private *i915) i915 35 drivers/gpu/drm/i915/gem/i915_gem_pm.c lockdep_assert_held(&i915->drm.struct_mutex); i915 37 drivers/gpu/drm/i915/gem/i915_gem_pm.c for_each_engine(engine, i915, id) i915 40 drivers/gpu/drm/i915/gem/i915_gem_pm.c i915_vma_parked(i915); i915 47 drivers/gpu/drm/i915/gem/i915_gem_pm.c struct drm_i915_private *i915 = i915 48 drivers/gpu/drm/i915/gem/i915_gem_pm.c container_of(work, typeof(*i915), gem.idle_work); i915 51 drivers/gpu/drm/i915/gem/i915_gem_pm.c cancel_delayed_work_sync(&i915->gem.retire_work); i915 52 drivers/gpu/drm/i915/gem/i915_gem_pm.c mutex_lock(&i915->drm.struct_mutex); i915 54 drivers/gpu/drm/i915/gem/i915_gem_pm.c intel_wakeref_lock(&i915->gt.wakeref); i915 55 drivers/gpu/drm/i915/gem/i915_gem_pm.c park = (!intel_wakeref_is_active(&i915->gt.wakeref) && i915 57 drivers/gpu/drm/i915/gem/i915_gem_pm.c intel_wakeref_unlock(&i915->gt.wakeref); i915 59 drivers/gpu/drm/i915/gem/i915_gem_pm.c i915_gem_park(i915); i915 61 drivers/gpu/drm/i915/gem/i915_gem_pm.c queue_delayed_work(i915->wq, i915 62 drivers/gpu/drm/i915/gem/i915_gem_pm.c &i915->gem.retire_work, i915 65 drivers/gpu/drm/i915/gem/i915_gem_pm.c mutex_unlock(&i915->drm.struct_mutex); i915 70 drivers/gpu/drm/i915/gem/i915_gem_pm.c struct drm_i915_private *i915 = i915 71 drivers/gpu/drm/i915/gem/i915_gem_pm.c container_of(work, typeof(*i915), gem.retire_work.work); i915 74 drivers/gpu/drm/i915/gem/i915_gem_pm.c if (mutex_trylock(&i915->drm.struct_mutex)) { i915 75 drivers/gpu/drm/i915/gem/i915_gem_pm.c i915_retire_requests(i915); i915 76 drivers/gpu/drm/i915/gem/i915_gem_pm.c mutex_unlock(&i915->drm.struct_mutex); i915 79 drivers/gpu/drm/i915/gem/i915_gem_pm.c queue_delayed_work(i915->wq, i915 80 drivers/gpu/drm/i915/gem/i915_gem_pm.c &i915->gem.retire_work, i915 88 drivers/gpu/drm/i915/gem/i915_gem_pm.c struct drm_i915_private *i915 = i915 89 drivers/gpu/drm/i915/gem/i915_gem_pm.c container_of(nb, typeof(*i915), gem.pm_notifier); i915 94 drivers/gpu/drm/i915/gem/i915_gem_pm.c queue_delayed_work(i915->wq, i915 95 drivers/gpu/drm/i915/gem/i915_gem_pm.c &i915->gem.retire_work, i915 100 drivers/gpu/drm/i915/gem/i915_gem_pm.c queue_work(i915->wq, &i915->gem.idle_work); i915 112 drivers/gpu/drm/i915/gem/i915_gem_pm.c if (i915_gem_wait_for_idle(gt->i915, i915 118 drivers/gpu/drm/i915/gem/i915_gem_pm.c dev_err(gt->i915->drm.dev, i915 130 drivers/gpu/drm/i915/gem/i915_gem_pm.c } while (i915_retire_requests(gt->i915) && result); i915 138 drivers/gpu/drm/i915/gem/i915_gem_pm.c bool i915_gem_load_power_context(struct drm_i915_private *i915) i915 140 drivers/gpu/drm/i915/gem/i915_gem_pm.c return switch_to_kernel_context_sync(&i915->gt); i915 143 drivers/gpu/drm/i915/gem/i915_gem_pm.c void i915_gem_suspend(struct drm_i915_private *i915) i915 147 drivers/gpu/drm/i915/gem/i915_gem_pm.c intel_wakeref_auto(&i915->ggtt.userfault_wakeref, 0); i915 148 drivers/gpu/drm/i915/gem/i915_gem_pm.c flush_workqueue(i915->wq); i915 150 drivers/gpu/drm/i915/gem/i915_gem_pm.c mutex_lock(&i915->drm.struct_mutex); i915 161 drivers/gpu/drm/i915/gem/i915_gem_pm.c switch_to_kernel_context_sync(&i915->gt); i915 163 drivers/gpu/drm/i915/gem/i915_gem_pm.c mutex_unlock(&i915->drm.struct_mutex); i915 165 drivers/gpu/drm/i915/gem/i915_gem_pm.c cancel_delayed_work_sync(&i915->gt.hangcheck.work); i915 167 drivers/gpu/drm/i915/gem/i915_gem_pm.c i915_gem_drain_freed_objects(i915); i915 169 drivers/gpu/drm/i915/gem/i915_gem_pm.c intel_uc_suspend(&i915->gt.uc); i915 179 drivers/gpu/drm/i915/gem/i915_gem_pm.c void i915_gem_suspend_late(struct drm_i915_private *i915) i915 183 drivers/gpu/drm/i915/gem/i915_gem_pm.c &i915->mm.shrink_list, i915 184 drivers/gpu/drm/i915/gem/i915_gem_pm.c &i915->mm.purge_list, i915 209 drivers/gpu/drm/i915/gem/i915_gem_pm.c spin_lock_irqsave(&i915->mm.obj_lock, flags); i915 220 drivers/gpu/drm/i915/gem/i915_gem_pm.c spin_unlock_irqrestore(&i915->mm.obj_lock, flags); i915 227 drivers/gpu/drm/i915/gem/i915_gem_pm.c spin_lock_irqsave(&i915->mm.obj_lock, flags); i915 232 drivers/gpu/drm/i915/gem/i915_gem_pm.c spin_unlock_irqrestore(&i915->mm.obj_lock, flags); i915 234 drivers/gpu/drm/i915/gem/i915_gem_pm.c i915_gem_sanitize(i915); i915 237 drivers/gpu/drm/i915/gem/i915_gem_pm.c void i915_gem_resume(struct drm_i915_private *i915) i915 241 drivers/gpu/drm/i915/gem/i915_gem_pm.c mutex_lock(&i915->drm.struct_mutex); i915 242 drivers/gpu/drm/i915/gem/i915_gem_pm.c intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL); i915 244 drivers/gpu/drm/i915/gem/i915_gem_pm.c if (i915_gem_init_hw(i915)) i915 252 drivers/gpu/drm/i915/gem/i915_gem_pm.c if (intel_gt_resume(&i915->gt)) i915 255 drivers/gpu/drm/i915/gem/i915_gem_pm.c intel_uc_resume(&i915->gt.uc); i915 258 drivers/gpu/drm/i915/gem/i915_gem_pm.c if (!i915_gem_load_power_context(i915)) i915 262 drivers/gpu/drm/i915/gem/i915_gem_pm.c intel_uncore_forcewake_put(&i915->uncore, FORCEWAKE_ALL); i915 263 drivers/gpu/drm/i915/gem/i915_gem_pm.c mutex_unlock(&i915->drm.struct_mutex); i915 267 drivers/gpu/drm/i915/gem/i915_gem_pm.c if (!intel_gt_is_wedged(&i915->gt)) { i915 268 drivers/gpu/drm/i915/gem/i915_gem_pm.c dev_err(i915->drm.dev, i915 270 drivers/gpu/drm/i915/gem/i915_gem_pm.c intel_gt_set_wedged(&i915->gt); i915 275 drivers/gpu/drm/i915/gem/i915_gem_pm.c void i915_gem_init__pm(struct drm_i915_private *i915) i915 277 drivers/gpu/drm/i915/gem/i915_gem_pm.c INIT_WORK(&i915->gem.idle_work, idle_work_handler); i915 278 drivers/gpu/drm/i915/gem/i915_gem_pm.c INIT_DELAYED_WORK(&i915->gem.retire_work, retire_work_handler); i915 280 drivers/gpu/drm/i915/gem/i915_gem_pm.c i915->gem.pm_notifier.notifier_call = pm_notifier; i915 281 drivers/gpu/drm/i915/gem/i915_gem_pm.c blocking_notifier_chain_register(&i915->gt.pm_notifications, i915 282 drivers/gpu/drm/i915/gem/i915_gem_pm.c &i915->gem.pm_notifier); i915 15 drivers/gpu/drm/i915/gem/i915_gem_pm.h void i915_gem_init__pm(struct drm_i915_private *i915); i915 17 drivers/gpu/drm/i915/gem/i915_gem_pm.h bool i915_gem_load_power_context(struct drm_i915_private *i915); i915 18 drivers/gpu/drm/i915/gem/i915_gem_pm.h void i915_gem_resume(struct drm_i915_private *i915); i915 22 drivers/gpu/drm/i915/gem/i915_gem_pm.h void i915_gem_suspend(struct drm_i915_private *i915); i915 23 drivers/gpu/drm/i915/gem/i915_gem_pm.h void i915_gem_suspend_late(struct drm_i915_private *i915); i915 28 drivers/gpu/drm/i915/gem/i915_gem_shmem.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 100 drivers/gpu/drm/i915/gem/i915_gem_shmem.c i915_gem_shrink(i915, 2 * page_count, NULL, *s++); i915 173 drivers/gpu/drm/i915/gem/i915_gem_shmem.c dev_warn(&i915->drm.pdev->dev, i915 437 drivers/gpu/drm/i915/gem/i915_gem_shmem.c static int create_shmem(struct drm_i915_private *i915, i915 444 drivers/gpu/drm/i915/gem/i915_gem_shmem.c drm_gem_private_object_init(&i915->drm, obj, size); i915 446 drivers/gpu/drm/i915/gem/i915_gem_shmem.c if (i915->mm.gemfs) i915 447 drivers/gpu/drm/i915/gem/i915_gem_shmem.c filp = shmem_file_setup_with_mnt(i915->mm.gemfs, "i915", size, i915 459 drivers/gpu/drm/i915/gem/i915_gem_shmem.c i915_gem_object_create_shmem(struct drm_i915_private *i915, u64 size) i915 482 drivers/gpu/drm/i915/gem/i915_gem_shmem.c ret = create_shmem(i915, &obj->base, size); i915 487 drivers/gpu/drm/i915/gem/i915_gem_shmem.c if (IS_I965GM(i915) || IS_I965G(i915)) { i915 502 drivers/gpu/drm/i915/gem/i915_gem_shmem.c if (HAS_LLC(i915)) i915 19 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c static bool shrinker_lock(struct drm_i915_private *i915, i915 23 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c struct mutex *m = &i915->drm.struct_mutex; i915 45 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c static void shrinker_unlock(struct drm_i915_private *i915, bool unlock) i915 50 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c mutex_unlock(&i915->drm.struct_mutex); i915 146 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c i915_gem_shrink(struct drm_i915_private *i915, i915 155 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c { &i915->mm.purge_list, ~0u }, i915 157 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c &i915->mm.shrink_list, i915 167 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c if (!shrinker_lock(i915, shrink, &unlock)) i915 179 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c trace_i915_gem_shrink(i915, target, shrink); i915 187 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c wakeref = intel_runtime_pm_get_if_in_use(&i915->runtime_pm); i915 228 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c spin_lock_irqsave(&i915->mm.obj_lock, flags); i915 253 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c spin_unlock_irqrestore(&i915->mm.obj_lock, flags); i915 269 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c spin_lock_irqsave(&i915->mm.obj_lock, flags); i915 272 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c spin_unlock_irqrestore(&i915->mm.obj_lock, flags); i915 276 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 278 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c shrinker_unlock(i915, unlock); i915 299 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c unsigned long i915_gem_shrink_all(struct drm_i915_private *i915) i915 304 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) { i915 305 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c freed = i915_gem_shrink(i915, -1UL, NULL, i915 317 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c struct drm_i915_private *i915 = i915 322 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c count = READ_ONCE(i915->mm.shrink_memory) >> PAGE_SHIFT; i915 323 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c num_objects = READ_ONCE(i915->mm.shrink_count); i915 335 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c i915->mm.shrinker.batch = i915 336 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c max((i915->mm.shrinker.batch + avg) >> 1, i915 346 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c struct drm_i915_private *i915 = i915 353 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c if (!shrinker_lock(i915, 0, &unlock)) i915 356 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c freed = i915_gem_shrink(i915, i915 365 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) { i915 366 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c freed += i915_gem_shrink(i915, i915 376 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c shrinker_unlock(i915, unlock); i915 384 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c struct drm_i915_private *i915 = i915 392 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) i915 393 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c freed_pages += i915_gem_shrink(i915, -1UL, NULL, i915 403 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c spin_lock_irqsave(&i915->mm.obj_lock, flags); i915 404 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c list_for_each_entry(obj, &i915->mm.shrink_list, mm.link) { i915 410 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c spin_unlock_irqrestore(&i915->mm.obj_lock, flags); i915 424 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c struct drm_i915_private *i915 = i915 431 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c if (!shrinker_lock(i915, 0, &unlock)) i915 434 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) i915 435 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c freed_pages += i915_gem_shrink(i915, -1UL, NULL, i915 441 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c mutex_lock(&i915->ggtt.vm.mutex); i915 443 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c &i915->ggtt.vm.bound_list, vm_link) { i915 449 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c mutex_unlock(&i915->ggtt.vm.mutex); i915 452 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c mutex_lock(&i915->ggtt.vm.mutex); i915 454 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c mutex_unlock(&i915->ggtt.vm.mutex); i915 456 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c shrinker_unlock(i915, unlock); i915 462 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c void i915_gem_driver_register__shrinker(struct drm_i915_private *i915) i915 464 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c i915->mm.shrinker.scan_objects = i915_gem_shrinker_scan; i915 465 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c i915->mm.shrinker.count_objects = i915_gem_shrinker_count; i915 466 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c i915->mm.shrinker.seeks = DEFAULT_SEEKS; i915 467 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c i915->mm.shrinker.batch = 4096; i915 468 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c WARN_ON(register_shrinker(&i915->mm.shrinker)); i915 470 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c i915->mm.oom_notifier.notifier_call = i915_gem_shrinker_oom; i915 471 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c WARN_ON(register_oom_notifier(&i915->mm.oom_notifier)); i915 473 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c i915->mm.vmap_notifier.notifier_call = i915_gem_shrinker_vmap; i915 474 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c WARN_ON(register_vmap_purge_notifier(&i915->mm.vmap_notifier)); i915 477 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c void i915_gem_driver_unregister__shrinker(struct drm_i915_private *i915) i915 479 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c WARN_ON(unregister_vmap_purge_notifier(&i915->mm.vmap_notifier)); i915 480 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c WARN_ON(unregister_oom_notifier(&i915->mm.oom_notifier)); i915 481 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c unregister_shrinker(&i915->mm.shrinker); i915 484 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c void i915_gem_shrinker_taints_mutex(struct drm_i915_private *i915, i915 492 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c if (!lockdep_is_held_type(&i915->drm.struct_mutex, -1)) { i915 493 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c mutex_acquire(&i915->drm.struct_mutex.dep_map, i915 508 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c mutex_acquire(&i915->drm.struct_mutex.dep_map, i915 514 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c mutex_release(&i915->drm.struct_mutex.dep_map, 0, _RET_IP_); i915 519 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c mutex_release(&i915->drm.struct_mutex.dep_map, 0, _RET_IP_); i915 533 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c struct drm_i915_private *i915 = obj_to_i915(obj); i915 536 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c spin_lock_irqsave(&i915->mm.obj_lock, flags); i915 540 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c i915->mm.shrink_count--; i915 541 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c i915->mm.shrink_memory -= obj->base.size; i915 543 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c spin_unlock_irqrestore(&i915->mm.obj_lock, flags); i915 554 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c struct drm_i915_private *i915 = obj_to_i915(obj); i915 557 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c spin_lock_irqsave(&i915->mm.obj_lock, flags); i915 561 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c i915->mm.shrink_count++; i915 562 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c i915->mm.shrink_memory += obj->base.size; i915 564 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c spin_unlock_irqrestore(&i915->mm.obj_lock, flags); i915 15 drivers/gpu/drm/i915/gem/i915_gem_shrinker.h unsigned long i915_gem_shrink(struct drm_i915_private *i915, i915 25 drivers/gpu/drm/i915/gem/i915_gem_shrinker.h unsigned long i915_gem_shrink_all(struct drm_i915_private *i915); i915 26 drivers/gpu/drm/i915/gem/i915_gem_shrinker.h void i915_gem_driver_register__shrinker(struct drm_i915_private *i915); i915 27 drivers/gpu/drm/i915/gem/i915_gem_shrinker.h void i915_gem_driver_unregister__shrinker(struct drm_i915_private *i915); i915 28 drivers/gpu/drm/i915/gem/i915_gem_shrinker.h void i915_gem_shrinker_taints_mutex(struct drm_i915_private *i915, i915 329 drivers/gpu/drm/i915/gem/i915_gem_stolen.c static void icl_get_stolen_reserved(struct drm_i915_private *i915, i915 333 drivers/gpu/drm/i915/gem/i915_gem_stolen.c u64 reg_val = intel_uncore_read64(&i915->uncore, GEN6_STOLEN_RESERVED); i915 53 drivers/gpu/drm/i915/gem/i915_gem_tiling.c u32 i915_gem_fence_size(struct drm_i915_private *i915, i915 65 drivers/gpu/drm/i915/gem/i915_gem_tiling.c if (INTEL_GEN(i915) >= 4) { i915 72 drivers/gpu/drm/i915/gem/i915_gem_tiling.c if (IS_GEN(i915, 3)) i915 93 drivers/gpu/drm/i915/gem/i915_gem_tiling.c u32 i915_gem_fence_alignment(struct drm_i915_private *i915, u32 size, i915 105 drivers/gpu/drm/i915/gem/i915_gem_tiling.c if (INTEL_GEN(i915) >= 4) i915 112 drivers/gpu/drm/i915/gem/i915_gem_tiling.c return i915_gem_fence_size(i915, size, tiling, stride); i915 120 drivers/gpu/drm/i915/gem/i915_gem_tiling.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 133 drivers/gpu/drm/i915/gem/i915_gem_tiling.c if (INTEL_GEN(i915) >= 7) { i915 136 drivers/gpu/drm/i915/gem/i915_gem_tiling.c } else if (INTEL_GEN(i915) >= 4) { i915 147 drivers/gpu/drm/i915/gem/i915_gem_tiling.c if (IS_GEN(i915, 2) || i915 148 drivers/gpu/drm/i915/gem/i915_gem_tiling.c (tiling == I915_TILING_Y && HAS_128_BYTE_Y_TILING(i915))) i915 162 drivers/gpu/drm/i915/gem/i915_gem_tiling.c struct drm_i915_private *i915 = vma->vm->i915; i915 168 drivers/gpu/drm/i915/gem/i915_gem_tiling.c size = i915_gem_fence_size(i915, vma->size, tiling_mode, stride); i915 172 drivers/gpu/drm/i915/gem/i915_gem_tiling.c alignment = i915_gem_fence_alignment(i915, vma->size, tiling_mode, stride); i915 206 drivers/gpu/drm/i915/gem/i915_gem_tiling.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 215 drivers/gpu/drm/i915/gem/i915_gem_tiling.c lockdep_assert_held(&i915->drm.struct_mutex); i915 253 drivers/gpu/drm/i915/gem/i915_gem_tiling.c i915->quirks & QUIRK_PIN_SWIZZLED_PAGES) { i915 269 drivers/gpu/drm/i915/gem/i915_gem_tiling.c i915_gem_fence_size(i915, vma->size, tiling, stride); i915 271 drivers/gpu/drm/i915/gem/i915_gem_tiling.c i915_gem_fence_alignment(i915, i915 22 drivers/gpu/drm/i915/gem/i915_gem_userptr.c struct drm_i915_private *i915; i915 133 drivers/gpu/drm/i915/gem/i915_gem_userptr.c unlock = &mn->mm->i915->drm.struct_mutex; i915 230 drivers/gpu/drm/i915/gem/i915_gem_userptr.c mutex_lock(&mm->i915->mm_lock); i915 245 drivers/gpu/drm/i915/gem/i915_gem_userptr.c mutex_unlock(&mm->i915->mm_lock); i915 369 drivers/gpu/drm/i915/gem/i915_gem_userptr.c mm->i915 = to_i915(obj->base.dev); i915 404 drivers/gpu/drm/i915/gem/i915_gem_userptr.c mutex_unlock(&mm->i915->mm_lock); i915 407 drivers/gpu/drm/i915/gem/i915_gem_userptr.c queue_work(mm->i915->mm.userptr_wq, &mm->work); i915 14 drivers/gpu/drm/i915/gem/i915_gemfs.c int i915_gemfs_init(struct drm_i915_private *i915) i915 36 drivers/gpu/drm/i915/gem/i915_gemfs.c i915->mm.gemfs = gemfs; i915 41 drivers/gpu/drm/i915/gem/i915_gemfs.c void i915_gemfs_fini(struct drm_i915_private *i915) i915 43 drivers/gpu/drm/i915/gem/i915_gemfs.c kern_unmount(i915->mm.gemfs); i915 12 drivers/gpu/drm/i915/gem/i915_gemfs.h int i915_gemfs_init(struct drm_i915_private *i915); i915 14 drivers/gpu/drm/i915/gem/i915_gemfs.h void i915_gemfs_fini(struct drm_i915_private *i915); i915 95 drivers/gpu/drm/i915/gem/selftests/huge_gem_object.c huge_gem_object(struct drm_i915_private *i915, i915 113 drivers/gpu/drm/i915/gem/selftests/huge_gem_object.c drm_gem_private_object_init(&i915->drm, &obj->base, dma_size); i915 118 drivers/gpu/drm/i915/gem/selftests/huge_gem_object.c cache_level = HAS_LLC(i915) ? I915_CACHE_LLC : I915_CACHE_NONE; i915 11 drivers/gpu/drm/i915/gem/selftests/huge_gem_object.h huge_gem_object(struct drm_i915_private *i915, i915 28 drivers/gpu/drm/i915/gem/selftests/huge_pages.c static unsigned int get_largest_page_size(struct drm_i915_private *i915, i915 36 drivers/gpu/drm/i915/gem/selftests/huge_pages.c if (HAS_PAGE_SIZES(i915, page_size) && rem >= page_size) i915 149 drivers/gpu/drm/i915/gem/selftests/huge_pages.c huge_pages_object(struct drm_i915_private *i915, i915 168 drivers/gpu/drm/i915/gem/selftests/huge_pages.c drm_gem_private_object_init(&i915->drm, &obj->base, size); i915 182 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 204 drivers/gpu/drm/i915/gem/selftests/huge_pages.c unsigned int page_size = get_largest_page_size(i915, rem); i915 239 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 256 drivers/gpu/drm/i915/gem/selftests/huge_pages.c page_size = get_largest_page_size(i915, obj->base.size); i915 300 drivers/gpu/drm/i915/gem/selftests/huge_pages.c fake_huge_pages_object(struct drm_i915_private *i915, u64 size, bool single) i915 317 drivers/gpu/drm/i915/gem/selftests/huge_pages.c drm_gem_private_object_init(&i915->drm, &obj->base, size); i915 333 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct drm_i915_private *i915 = vma->vm->i915; i915 334 drivers/gpu/drm/i915/gem/selftests/huge_pages.c unsigned int supported = INTEL_INFO(i915)->page_sizes; i915 338 drivers/gpu/drm/i915/gem/selftests/huge_pages.c if (!HAS_PAGE_SIZES(i915, vma->page_sizes.sg)) { i915 344 drivers/gpu/drm/i915/gem/selftests/huge_pages.c if (!HAS_PAGE_SIZES(i915, vma->page_sizes.gtt)) { i915 374 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct drm_i915_private *i915 = ppgtt->vm.i915; i915 375 drivers/gpu/drm/i915/gem/selftests/huge_pages.c unsigned int saved_mask = INTEL_INFO(i915)->page_sizes; i915 394 drivers/gpu/drm/i915/gem/selftests/huge_pages.c mkwrite_device_info(i915)->page_sizes = combination; i915 397 drivers/gpu/drm/i915/gem/selftests/huge_pages.c obj = fake_huge_pages_object(i915, combination, !!single); i915 445 drivers/gpu/drm/i915/gem/selftests/huge_pages.c mkwrite_device_info(i915)->page_sizes = saved_mask; i915 453 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct drm_i915_private *i915 = ppgtt->vm.i915; i915 454 drivers/gpu/drm/i915/gem/selftests/huge_pages.c unsigned long supported = INTEL_INFO(i915)->page_sizes; i915 477 drivers/gpu/drm/i915/gem/selftests/huge_pages.c obj = fake_huge_pages_object(i915, size, true); i915 601 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct drm_i915_private *i915 = ppgtt->vm.i915; i915 616 drivers/gpu/drm/i915/gem/selftests/huge_pages.c obj = fake_huge_pages_object(i915, size, single); i915 662 drivers/gpu/drm/i915/gem/selftests/huge_pages.c if (HAS_PAGE_SIZES(i915, page_size) && i915 722 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct drm_i915_private *i915 = ppgtt->vm.i915; i915 792 drivers/gpu/drm/i915/gem/selftests/huge_pages.c if (!HAS_PAGE_SIZES(i915, I915_GTT_PAGE_SIZE_64K)) i915 802 drivers/gpu/drm/i915/gem/selftests/huge_pages.c obj = fake_huge_pages_object(i915, size, !!single); i915 990 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 991 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct i915_address_space *vm = ctx->vm ?: &i915->ggtt.vm; i915 1015 drivers/gpu/drm/i915/gem/selftests/huge_pages.c for_each_engine(engine, i915, id) { i915 1085 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct drm_i915_private *i915 = ctx->i915; i915 1086 drivers/gpu/drm/i915/gem/selftests/huge_pages.c unsigned long supported = INTEL_INFO(i915)->page_sizes; i915 1133 drivers/gpu/drm/i915/gem/selftests/huge_pages.c obj = huge_pages_object(i915, size, page_sizes); i915 1178 drivers/gpu/drm/i915/gem/selftests/huge_pages.c mkwrite_device_info(i915)->page_sizes = supported; i915 1186 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct drm_i915_private *i915 = ctx->i915; i915 1207 drivers/gpu/drm/i915/gem/selftests/huge_pages.c obj = i915_gem_object_create_internal(i915, size); i915 1243 drivers/gpu/drm/i915/gem/selftests/huge_pages.c static inline bool igt_can_allocate_thp(struct drm_i915_private *i915) i915 1245 drivers/gpu/drm/i915/gem/selftests/huge_pages.c return i915->mm.gemfs && has_transparent_hugepage(); i915 1251 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct drm_i915_private *i915 = ctx->i915; i915 1268 drivers/gpu/drm/i915/gem/selftests/huge_pages.c if (!igt_can_allocate_thp(i915)) { i915 1276 drivers/gpu/drm/i915/gem/selftests/huge_pages.c obj = i915_gem_object_create_shmem(i915, size); i915 1315 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct drm_i915_private *dev_priv = ctx->i915; i915 1449 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct drm_i915_private *i915 = ctx->i915; i915 1450 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct vfsmount *gemfs = i915->mm.gemfs; i915 1451 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct i915_address_space *vm = ctx->vm ?: &i915->ggtt.vm; i915 1463 drivers/gpu/drm/i915/gem/selftests/huge_pages.c i915->mm.gemfs = NULL; i915 1465 drivers/gpu/drm/i915/gem/selftests/huge_pages.c obj = i915_gem_object_create_shmem(i915, PAGE_SIZE); i915 1499 drivers/gpu/drm/i915/gem/selftests/huge_pages.c i915->mm.gemfs = gemfs; i915 1507 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct drm_i915_private *i915 = ctx->i915; i915 1508 drivers/gpu/drm/i915/gem/selftests/huge_pages.c struct i915_address_space *vm = ctx->vm ?: &i915->ggtt.vm; i915 1522 drivers/gpu/drm/i915/gem/selftests/huge_pages.c if (!igt_can_allocate_thp(i915)) { i915 1527 drivers/gpu/drm/i915/gem/selftests/huge_pages.c obj = i915_gem_object_create_shmem(i915, SZ_2M); i915 1551 drivers/gpu/drm/i915/gem/selftests/huge_pages.c for_each_engine(engine, i915, id) { i915 1566 drivers/gpu/drm/i915/gem/selftests/huge_pages.c i915_gem_shrink_all(i915); i915 1652 drivers/gpu/drm/i915/gem/selftests/huge_pages.c int i915_gem_huge_page_live_selftests(struct drm_i915_private *i915) i915 1667 drivers/gpu/drm/i915/gem/selftests/huge_pages.c if (!HAS_PPGTT(i915)) { i915 1672 drivers/gpu/drm/i915/gem/selftests/huge_pages.c if (intel_gt_is_wedged(&i915->gt)) i915 1675 drivers/gpu/drm/i915/gem/selftests/huge_pages.c file = mock_file(i915); i915 1679 drivers/gpu/drm/i915/gem/selftests/huge_pages.c mutex_lock(&i915->drm.struct_mutex); i915 1680 drivers/gpu/drm/i915/gem/selftests/huge_pages.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 1682 drivers/gpu/drm/i915/gem/selftests/huge_pages.c ctx = live_context(i915, file); i915 1694 drivers/gpu/drm/i915/gem/selftests/huge_pages.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 1695 drivers/gpu/drm/i915/gem/selftests/huge_pages.c mutex_unlock(&i915->drm.struct_mutex); i915 1697 drivers/gpu/drm/i915/gem/selftests/huge_pages.c mock_file_free(i915, file); i915 17 drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c struct drm_i915_private *i915 = arg; i915 18 drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c struct intel_context *ce = i915->engine[BCS0]->kernel_context; i915 40 drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c obj = huge_gem_object(i915, phys_sz, sz); i915 106 drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c int i915_gem_client_blt_live_selftests(struct drm_i915_private *i915) i915 112 drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c if (intel_gt_is_wedged(&i915->gt)) i915 115 drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c if (!HAS_ENGINE(i915, BCS0)) i915 118 drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c return i915_live_subtests(tests, i915); i915 183 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 199 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c rq = i915_request_create(i915->engine[RCS0]->kernel_context); i915 212 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c if (INTEL_GEN(i915) >= 8) { i915 217 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c } else if (INTEL_GEN(i915) >= 4) { i915 242 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c static bool always_valid(struct drm_i915_private *i915) i915 247 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c static bool needs_fence_registers(struct drm_i915_private *i915) i915 249 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c return !intel_gt_is_wedged(&i915->gt); i915 252 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c static bool needs_mi_store_dword(struct drm_i915_private *i915) i915 254 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c if (intel_gt_is_wedged(&i915->gt)) i915 257 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c if (!HAS_ENGINE(i915, RCS0)) i915 260 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c return intel_engine_can_store_dword(i915->engine[RCS0]); i915 267 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c bool (*valid)(struct drm_i915_private *i915); i915 280 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c struct drm_i915_private *i915 = arg; i915 302 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c mutex_lock(&i915->drm.struct_mutex); i915 303 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 308 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c if (!over->valid(i915)) i915 315 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c if (!write->valid(i915)) i915 322 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c if (!read->valid(i915)) i915 326 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c obj = i915_gem_object_create_internal(i915, PAGE_SIZE); i915 381 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 382 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c mutex_unlock(&i915->drm.struct_mutex); i915 391 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c int i915_gem_coherency_live_selftests(struct drm_i915_private *i915) i915 397 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c return i915_subtests(tests, i915); i915 31 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct drm_i915_private *i915 = arg; i915 48 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (!DRIVER_CAPS(i915)->has_logical_contexts) i915 51 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c file = mock_file(i915); i915 55 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_lock(&i915->drm.struct_mutex); i915 64 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ctx[n] = live_context(i915, file); i915 71 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c for_each_engine(engine, i915, id) { i915 87 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c intel_gt_set_wedged(&i915->gt); i915 97 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c err = igt_live_test_begin(&t, i915, __func__, engine->name); i915 131 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c intel_gt_set_wedged(&i915->gt); i915 154 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_unlock(&i915->drm.struct_mutex); i915 155 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mock_file_free(i915, file); i915 313 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct i915_address_space *vm = ctx->vm ?: &ctx->i915->ggtt.vm; i915 318 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c i915_retire_requests(ctx->i915); i915 323 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c obj = huge_gem_object(ctx->i915, DW_PER_PAGE * PAGE_SIZE, size); i915 353 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct drm_i915_private *i915 = arg; i915 364 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (!DRIVER_CAPS(i915)->has_logical_contexts) i915 367 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c for_each_engine(engine, i915, id) { i915 381 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c file = mock_file(i915); i915 385 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_lock(&i915->drm.struct_mutex); i915 387 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c err = igt_live_test_begin(&t, i915, __func__, engine->name); i915 397 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ctx = live_context(i915, file); i915 447 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_unlock(&i915->drm.struct_mutex); i915 449 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mock_file_free(i915, file); i915 453 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c i915_gem_drain_freed_objects(i915); i915 461 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct drm_i915_private *i915 = arg; i915 474 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (!DRIVER_CAPS(i915)->has_logical_contexts) i915 477 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c file = mock_file(i915); i915 481 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_lock(&i915->drm.struct_mutex); i915 483 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c parent = live_context(i915, file); i915 494 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c err = igt_live_test_begin(&t, i915, __func__, ""); i915 498 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c for_each_engine(engine, i915, id) { i915 513 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ctx = kernel_context(i915); i915 565 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_unlock(&i915->drm.struct_mutex); i915 566 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c i915_gem_drain_freed_objects(i915); i915 567 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_lock(&i915->drm.struct_mutex); i915 573 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_unlock(&i915->drm.struct_mutex); i915 575 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mock_file_free(i915, file); i915 585 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (INTEL_GEN(vma->vm->i915) < 8) i915 588 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c obj = i915_gem_object_create_internal(vma->vm->i915, PAGE_SIZE); i915 789 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (INTEL_GEN(ce->engine->i915) >= 11) { i915 863 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ret = i915_gem_wait_for_idle(ce->engine->i915, i915 907 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c __igt_ctx_sseu(struct drm_i915_private *i915, i915 911 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct intel_engine_cs *engine = i915->engine[RCS0]; i915 919 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (INTEL_GEN(i915) < 9 || !engine) i915 922 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (!RUNTIME_INFO(i915)->sseu.has_slice_pg) i915 941 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c file = mock_file(i915); i915 946 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c igt_global_reset_lock(&i915->gt); i915 948 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_lock(&i915->drm.struct_mutex); i915 950 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ctx = live_context(i915, file); i915 957 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c obj = i915_gem_object_create_internal(i915, PAGE_SIZE); i915 994 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 1004 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_unlock(&i915->drm.struct_mutex); i915 1007 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c igt_global_reset_unlock(&i915->gt); i915 1009 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mock_file_free(i915, file); i915 1042 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct drm_i915_private *i915 = arg; i915 1060 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c file = mock_file(i915); i915 1064 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_lock(&i915->drm.struct_mutex); i915 1066 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c err = igt_live_test_begin(&t, i915, __func__, ""); i915 1070 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ctx = live_context(i915, file); i915 1076 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c vm = ctx->vm ?: &i915->ggtt.alias->vm; i915 1088 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c for_each_engine(engine, i915, id) { i915 1120 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ndwords, RUNTIME_INFO(i915)->num_engines); i915 1143 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_unlock(&i915->drm.struct_mutex); i915 1145 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mock_file_free(i915, file); i915 1168 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct drm_i915_private *i915 = ctx->i915; i915 1177 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c obj = i915_gem_object_create_internal(i915, PAGE_SIZE); i915 1188 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (INTEL_GEN(i915) >= 8) { i915 1255 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct drm_i915_private *i915 = ctx->i915; i915 1266 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c obj = i915_gem_object_create_internal(i915, PAGE_SIZE); i915 1277 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (INTEL_GEN(i915) >= 8) { i915 1367 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct drm_i915_private *i915 = arg; i915 1378 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (INTEL_GEN(i915) < 7) i915 1386 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c file = mock_file(i915); i915 1390 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_lock(&i915->drm.struct_mutex); i915 1392 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c err = igt_live_test_begin(&t, i915, __func__, ""); i915 1396 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ctx_a = live_context(i915, file); i915 1402 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ctx_b = live_context(i915, file); i915 1417 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c for_each_engine(engine, i915, id) { i915 1456 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c count, RUNTIME_INFO(i915)->num_engines); i915 1461 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_unlock(&i915->drm.struct_mutex); i915 1463 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mock_file_free(i915, file); i915 1468 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c __engine_name(struct drm_i915_private *i915, intel_engine_mask_t engines) i915 1476 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c for_each_engine_masked(engine, i915, engines, tmp) i915 1498 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct drm_i915_private *i915 = arg; i915 1509 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_lock(&i915->drm.struct_mutex); i915 1511 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ctx = mock_context(i915, "mock"); i915 1546 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c rq = igt_request_alloc(ctx, i915->engine[RCS0]); i915 1579 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mock_device_flush(i915); i915 1589 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c mutex_unlock(&i915->drm.struct_mutex); i915 1600 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c struct drm_i915_private *i915; i915 1603 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c i915 = mock_gem_device(); i915 1604 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (!i915) i915 1607 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c err = i915_subtests(tests, i915); i915 1609 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c drm_dev_put(&i915->drm); i915 1613 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c int i915_gem_context_live_selftests(struct drm_i915_private *i915) i915 1624 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (intel_gt_is_wedged(&i915->gt)) i915 1627 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c return i915_live_subtests(tests, i915); i915 15 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c struct drm_i915_private *i915 = arg; i915 19 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c obj = i915_gem_object_create_shmem(i915, PAGE_SIZE); i915 37 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c struct drm_i915_private *i915 = arg; i915 43 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c obj = i915_gem_object_create_shmem(i915, PAGE_SIZE); i915 55 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c import = i915_gem_prime_import(&i915->drm, dmabuf); i915 81 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c struct drm_i915_private *i915 = arg; i915 92 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c obj = to_intel_bo(i915_gem_prime_import(&i915->drm, dmabuf)); i915 100 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c if (obj->base.dev != &i915->drm) { i915 163 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c struct drm_i915_private *i915 = arg; i915 183 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c obj = to_intel_bo(i915_gem_prime_import(&i915->drm, dmabuf)); i915 212 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c struct drm_i915_private *i915 = arg; i915 218 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c obj = i915_gem_object_create_shmem(i915, PAGE_SIZE); i915 259 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c struct drm_i915_private *i915 = arg; i915 265 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c obj = i915_gem_object_create_shmem(i915, 2 * PAGE_SIZE); i915 367 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c struct drm_i915_private *i915; i915 370 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c i915 = mock_gem_device(); i915 371 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c if (!i915) i915 374 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c err = i915_subtests(tests, i915); i915 376 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c drm_dev_put(&i915->drm); i915 380 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c int i915_gem_dmabuf_live_selftests(struct drm_i915_private *i915) i915 386 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c return i915_subtests(tests, i915); i915 181 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c struct drm_i915_private *i915 = arg; i915 195 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c obj = huge_gem_object(i915, i915 197 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c (1 + next_prime_number(i915->ggtt.vm.total >> PAGE_SHIFT)) << PAGE_SHIFT); i915 208 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c mutex_lock(&i915->drm.struct_mutex); i915 209 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 233 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c if (i915->quirks & QUIRK_PIN_SWIZZLED_PAGES) i915 244 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c tile.swizzle = i915->mm.bit_6_swizzle_x; i915 247 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c tile.swizzle = i915->mm.bit_6_swizzle_y; i915 256 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c if (INTEL_GEN(i915) <= 2) { i915 261 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c HAS_128_BYTE_Y_TILING(i915)) { i915 271 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c if (INTEL_GEN(i915) < 4) i915 273 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c else if (INTEL_GEN(i915) < 7) i915 286 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c if (pitch > 2 && INTEL_GEN(i915) >= 4) { i915 295 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c if (pitch < max_pitch && INTEL_GEN(i915) >= 4) { i915 305 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c if (INTEL_GEN(i915) >= 4) { i915 320 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 321 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c mutex_unlock(&i915->drm.struct_mutex); i915 330 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 336 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL); i915 344 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c for_each_engine(engine, i915, id) { i915 369 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c static bool assert_mmap_offset(struct drm_i915_private *i915, i915 376 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c obj = i915_gem_object_create_internal(i915, size); i915 386 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c static void disable_retire_worker(struct drm_i915_private *i915) i915 388 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c i915_gem_driver_unregister__shrinker(i915); i915 390 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c intel_gt_pm_get(&i915->gt); i915 392 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c cancel_delayed_work_sync(&i915->gem.retire_work); i915 393 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c flush_work(&i915->gem.idle_work); i915 396 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c static void restore_retire_worker(struct drm_i915_private *i915) i915 398 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c intel_gt_pm_put(&i915->gt); i915 400 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c mutex_lock(&i915->drm.struct_mutex); i915 401 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c igt_flush_test(i915, I915_WAIT_LOCKED); i915 402 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c mutex_unlock(&i915->drm.struct_mutex); i915 404 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c i915_gem_driver_register__shrinker(i915); i915 407 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c static void mmap_offset_lock(struct drm_i915_private *i915) i915 408 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c __acquires(&i915->drm.vma_offset_manager->vm_lock) i915 410 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c write_lock(&i915->drm.vma_offset_manager->vm_lock); i915 413 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c static void mmap_offset_unlock(struct drm_i915_private *i915) i915 414 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c __releases(&i915->drm.vma_offset_manager->vm_lock) i915 416 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c write_unlock(&i915->drm.vma_offset_manager->vm_lock); i915 421 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c struct drm_i915_private *i915 = arg; i915 422 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c struct drm_mm *mm = &i915->drm.vma_offset_manager->vm_addr_space_mm; i915 429 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c disable_retire_worker(i915); i915 430 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c GEM_BUG_ON(!i915->gt.awake); i915 437 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c mmap_offset_lock(i915); i915 439 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c mmap_offset_unlock(i915); i915 448 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c if (!assert_mmap_offset(i915, PAGE_SIZE, 0)) { i915 455 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c if (!assert_mmap_offset(i915, 2 * PAGE_SIZE, -ENOSPC)) { i915 462 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c obj = i915_gem_object_create_internal(i915, PAGE_SIZE); i915 474 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c if (!assert_mmap_offset(i915, PAGE_SIZE, -ENOSPC)) { i915 484 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c if (intel_gt_is_wedged(&i915->gt)) i915 487 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c obj = i915_gem_object_create_internal(i915, PAGE_SIZE); i915 493 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c mutex_lock(&i915->drm.struct_mutex); i915 495 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c mutex_unlock(&i915->drm.struct_mutex); i915 503 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c mmap_offset_lock(i915); i915 505 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c mmap_offset_unlock(i915); i915 507 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c restore_retire_worker(i915); i915 514 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c int i915_gem_mman_live_selftests(struct drm_i915_private *i915) i915 521 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c return i915_subtests(tests, i915); i915 15 drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c struct drm_i915_private *i915 = arg; i915 21 drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c obj = i915_gem_object_create_shmem(i915, PAGE_SIZE); i915 37 drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c struct drm_i915_private *i915 = arg; i915 44 drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c obj = huge_gem_object(i915, i915 46 drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c i915->ggtt.vm.total + PAGE_SIZE); i915 79 drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c struct drm_i915_private *i915; i915 82 drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c i915 = mock_gem_device(); i915 83 drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c if (!i915) i915 86 drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c err = i915_subtests(tests, i915); i915 88 drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c drm_dev_put(&i915->drm); i915 92 drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c int i915_gem_object_live_selftests(struct drm_i915_private *i915) i915 98 drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c return i915_subtests(tests, i915); i915 17 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c struct drm_i915_private *i915 = arg; i915 18 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c struct intel_context *ce = i915->engine[BCS0]->kernel_context; i915 46 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c obj = huge_gem_object(i915, phys_sz, sz); i915 68 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c mutex_lock(&i915->drm.struct_mutex); i915 70 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c mutex_unlock(&i915->drm.struct_mutex); i915 108 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c struct drm_i915_private *i915 = arg; i915 109 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c struct intel_context *ce = i915->engine[BCS0]->kernel_context; i915 131 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c src = huge_gem_object(i915, phys_sz, sz); i915 151 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c dst = huge_gem_object(i915, phys_sz, sz); i915 169 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c mutex_lock(&i915->drm.struct_mutex); i915 171 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c mutex_unlock(&i915->drm.struct_mutex); i915 211 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c int i915_gem_object_blt_live_selftests(struct drm_i915_private *i915) i915 218 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c if (intel_gt_is_wedged(&i915->gt)) i915 221 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c if (!HAS_ENGINE(i915, BCS0)) i915 224 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c return i915_live_subtests(tests, i915); i915 13 drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c struct drm_i915_private *i915 = arg; i915 21 drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c obj = i915_gem_object_create_shmem(i915, PAGE_SIZE); i915 28 drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c mutex_lock(&i915->drm.struct_mutex); i915 30 drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c mutex_unlock(&i915->drm.struct_mutex); i915 69 drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c struct drm_i915_private *i915; i915 72 drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c i915 = mock_gem_device(); i915 73 drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c if (!i915) i915 76 drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c err = i915_subtests(tests, i915); i915 78 drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c drm_dev_put(&i915->drm); i915 45 drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c const int gen = INTEL_GEN(vma->vm->i915); i915 52 drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c obj = i915_gem_object_create_internal(vma->vm->i915, size); i915 132 drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c if (INTEL_GEN(vm->i915) <= 5) i915 11 drivers/gpu/drm/i915/gem/selftests/mock_context.c mock_context(struct drm_i915_private *i915, i915 24 drivers/gpu/drm/i915/gem/selftests/mock_context.c ctx->i915 = i915; i915 47 drivers/gpu/drm/i915/gem/selftests/mock_context.c ppgtt = mock_ppgtt(i915, name); i915 74 drivers/gpu/drm/i915/gem/selftests/mock_context.c void mock_init_contexts(struct drm_i915_private *i915) i915 76 drivers/gpu/drm/i915/gem/selftests/mock_context.c init_contexts(i915); i915 80 drivers/gpu/drm/i915/gem/selftests/mock_context.c live_context(struct drm_i915_private *i915, struct drm_file *file) i915 85 drivers/gpu/drm/i915/gem/selftests/mock_context.c lockdep_assert_held(&i915->drm.struct_mutex); i915 87 drivers/gpu/drm/i915/gem/selftests/mock_context.c ctx = i915_gem_create_context(i915, 0); i915 103 drivers/gpu/drm/i915/gem/selftests/mock_context.c kernel_context(struct drm_i915_private *i915) i915 105 drivers/gpu/drm/i915/gem/selftests/mock_context.c return i915_gem_context_create_kernel(i915, I915_PRIORITY_NORMAL); i915 10 drivers/gpu/drm/i915/gem/selftests/mock_context.h void mock_init_contexts(struct drm_i915_private *i915); i915 13 drivers/gpu/drm/i915/gem/selftests/mock_context.h mock_context(struct drm_i915_private *i915, i915 19 drivers/gpu/drm/i915/gem/selftests/mock_context.h live_context(struct drm_i915_private *i915, struct drm_file *file); i915 21 drivers/gpu/drm/i915/gem/selftests/mock_context.h struct i915_gem_context *kernel_context(struct drm_i915_private *i915); i915 65 drivers/gpu/drm/i915/gt/intel_context.c with_intel_runtime_pm(&ce->engine->i915->runtime_pm, wakeref) i915 241 drivers/gpu/drm/i915/gt/intel_context.c i915_active_init(ctx->i915, &ce->active, i915 333 drivers/gpu/drm/i915/gt/intel_engine.h int intel_engines_init_mmio(struct drm_i915_private *i915); i915 334 drivers/gpu/drm/i915/gt/intel_engine.h int intel_engines_setup(struct drm_i915_private *i915); i915 335 drivers/gpu/drm/i915/gt/intel_engine.h int intel_engines_init(struct drm_i915_private *i915); i915 336 drivers/gpu/drm/i915/gt/intel_engine.h void intel_engines_cleanup(struct drm_i915_private *i915); i915 508 drivers/gpu/drm/i915/gt/intel_engine.h u32 intel_engine_context_size(struct drm_i915_private *i915, u8 class); i915 224 drivers/gpu/drm/i915/gt/intel_engine_cs.c static u32 __engine_mmio_base(struct drm_i915_private *i915, i915 230 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (INTEL_GEN(i915) >= bases[i].gen) i915 257 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (INTEL_GEN(engine->i915) < 6 && engine->class != RENDER_CLASS) i915 260 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (INTEL_GEN(engine->i915) >= 3) i915 297 drivers/gpu/drm/i915/gt/intel_engine_cs.c engine->i915 = gt->i915; i915 301 drivers/gpu/drm/i915/gt/intel_engine_cs.c engine->mmio_base = __engine_mmio_base(gt->i915, info->mmio_bases); i915 313 drivers/gpu/drm/i915/gt/intel_engine_cs.c engine->context_size = intel_engine_context_size(gt->i915, i915 318 drivers/gpu/drm/i915/gt/intel_engine_cs.c DRIVER_CAPS(gt->i915)->has_logical_contexts = true; i915 333 drivers/gpu/drm/i915/gt/intel_engine_cs.c gt->i915->engine[id] = engine; i915 340 drivers/gpu/drm/i915/gt/intel_engine_cs.c struct drm_i915_private *i915 = engine->i915; i915 347 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (INTEL_GEN(i915) >= 11 || i915 348 drivers/gpu/drm/i915/gt/intel_engine_cs.c (INTEL_GEN(i915) >= 9 && engine->instance == 0)) i915 356 drivers/gpu/drm/i915/gt/intel_engine_cs.c if ((INTEL_GEN(i915) >= 11 && i915 357 drivers/gpu/drm/i915/gt/intel_engine_cs.c RUNTIME_INFO(i915)->vdbox_sfc_access & engine->mask) || i915 358 drivers/gpu/drm/i915/gt/intel_engine_cs.c (INTEL_GEN(i915) >= 9 && engine->instance == 0)) i915 362 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (INTEL_GEN(i915) >= 9) i915 368 drivers/gpu/drm/i915/gt/intel_engine_cs.c static void intel_setup_engine_capabilities(struct drm_i915_private *i915) i915 373 drivers/gpu/drm/i915/gt/intel_engine_cs.c for_each_engine(engine, i915, id) i915 381 drivers/gpu/drm/i915/gt/intel_engine_cs.c void intel_engines_cleanup(struct drm_i915_private *i915) i915 386 drivers/gpu/drm/i915/gt/intel_engine_cs.c for_each_engine(engine, i915, id) { i915 388 drivers/gpu/drm/i915/gt/intel_engine_cs.c i915->engine[id] = NULL; i915 398 drivers/gpu/drm/i915/gt/intel_engine_cs.c int intel_engines_init_mmio(struct drm_i915_private *i915) i915 400 drivers/gpu/drm/i915/gt/intel_engine_cs.c struct intel_device_info *device_info = mkwrite_device_info(i915); i915 401 drivers/gpu/drm/i915/gt/intel_engine_cs.c const unsigned int engine_mask = INTEL_INFO(i915)->engine_mask; i915 410 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (i915_inject_probe_failure(i915)) i915 414 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (!HAS_ENGINE(i915, i)) i915 417 drivers/gpu/drm/i915/gt/intel_engine_cs.c err = intel_engine_setup(&i915->gt, i); i915 432 drivers/gpu/drm/i915/gt/intel_engine_cs.c RUNTIME_INFO(i915)->num_engines = hweight32(mask); i915 434 drivers/gpu/drm/i915/gt/intel_engine_cs.c intel_gt_check_and_clear_faults(&i915->gt); i915 436 drivers/gpu/drm/i915/gt/intel_engine_cs.c intel_setup_engine_capabilities(i915); i915 441 drivers/gpu/drm/i915/gt/intel_engine_cs.c intel_engines_cleanup(i915); i915 451 drivers/gpu/drm/i915/gt/intel_engine_cs.c int intel_engines_init(struct drm_i915_private *i915) i915 458 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (HAS_EXECLISTS(i915)) i915 463 drivers/gpu/drm/i915/gt/intel_engine_cs.c for_each_engine(engine, i915, id) { i915 472 drivers/gpu/drm/i915/gt/intel_engine_cs.c intel_engines_cleanup(i915); i915 503 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (!HWS_NEEDS_PHYSICAL(engine->i915)) i915 516 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (!HAS_LLC(engine->i915)) i915 549 drivers/gpu/drm/i915/gt/intel_engine_cs.c obj = i915_gem_object_create_internal(engine->i915, PAGE_SIZE); i915 572 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (!HWS_NEEDS_PHYSICAL(engine->i915)) { i915 608 drivers/gpu/drm/i915/gt/intel_engine_cs.c intel_sseu_from_device_info(&RUNTIME_INFO(engine->i915)->sseu); i915 626 drivers/gpu/drm/i915/gt/intel_engine_cs.c int intel_engines_setup(struct drm_i915_private *i915) i915 633 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (HAS_EXECLISTS(i915)) i915 638 drivers/gpu/drm/i915/gt/intel_engine_cs.c for_each_engine(engine, i915, id) { i915 656 drivers/gpu/drm/i915/gt/intel_engine_cs.c intel_engines_cleanup(i915); i915 688 drivers/gpu/drm/i915/gt/intel_engine_cs.c frame->rq.i915 = engine->i915; i915 736 drivers/gpu/drm/i915/gt/intel_engine_cs.c ce = intel_context_create(engine->i915->kernel_context, engine); i915 828 drivers/gpu/drm/i915/gt/intel_engine_cs.c struct drm_i915_private *i915 = engine->i915; i915 832 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (INTEL_GEN(i915) >= 8) i915 834 drivers/gpu/drm/i915/gt/intel_engine_cs.c else if (INTEL_GEN(i915) >= 4) i915 846 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (INTEL_GEN(engine->i915) >= 8) i915 861 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (INTEL_GEN(engine->i915) < 3) i915 890 drivers/gpu/drm/i915/gt/intel_engine_cs.c const char *i915_cache_level_str(struct drm_i915_private *i915, int type) i915 894 drivers/gpu/drm/i915/gt/intel_engine_cs.c case I915_CACHE_LLC: return HAS_LLC(i915) ? " LLC" : " snooped"; i915 905 drivers/gpu/drm/i915/gt/intel_engine_cs.c struct drm_i915_private *i915 = engine->i915; i915 910 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (INTEL_GEN(i915) >= 11) { i915 950 drivers/gpu/drm/i915/gt/intel_engine_cs.c struct drm_i915_private *i915 = engine->i915; i915 958 drivers/gpu/drm/i915/gt/intel_engine_cs.c switch (INTEL_GEN(i915)) { i915 968 drivers/gpu/drm/i915/gt/intel_engine_cs.c for_each_instdone_slice_subslice(i915, slice, subslice) { i915 1025 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (INTEL_GEN(engine->i915) > 2 && i915 1054 drivers/gpu/drm/i915/gt/intel_engine_cs.c synchronize_hardirq(engine->i915->drm.pdev->irq); i915 1096 drivers/gpu/drm/i915/gt/intel_engine_cs.c for_each_engine(engine, gt->i915, id) { i915 1109 drivers/gpu/drm/i915/gt/intel_engine_cs.c for_each_engine(engine, gt->i915, id) i915 1115 drivers/gpu/drm/i915/gt/intel_engine_cs.c switch (INTEL_GEN(engine->i915)) { i915 1120 drivers/gpu/drm/i915/gt/intel_engine_cs.c return !(IS_I915G(engine->i915) || IS_I915GM(engine->i915)); i915 1128 drivers/gpu/drm/i915/gt/intel_engine_cs.c static int print_sched_attr(struct drm_i915_private *i915, i915 1149 drivers/gpu/drm/i915/gt/intel_engine_cs.c x = print_sched_attr(rq->i915, &rq->sched.attr, buf, x, sizeof(buf)); i915 1199 drivers/gpu/drm/i915/gt/intel_engine_cs.c struct drm_i915_private *dev_priv = engine->i915; i915 1214 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (INTEL_GEN(engine->i915) > 2) { i915 1358 drivers/gpu/drm/i915/gt/intel_engine_cs.c struct i915_gpu_error * const error = &engine->i915->gpu_error; i915 1406 drivers/gpu/drm/i915/gt/intel_engine_cs.c wakeref = intel_runtime_pm_get_if_in_use(&engine->i915->runtime_pm); i915 1409 drivers/gpu/drm/i915/gt/intel_engine_cs.c intel_runtime_pm_put(&engine->i915->runtime_pm, wakeref); i915 172 drivers/gpu/drm/i915/gt/intel_engine_pm.c struct intel_runtime_pm *rpm = &engine->i915->runtime_pm; i915 97 drivers/gpu/drm/i915/gt/intel_engine_pool.c i915_active_init(engine->i915, &node->active, pool_active, pool_retire); i915 99 drivers/gpu/drm/i915/gt/intel_engine_pool.c obj = i915_gem_object_create_internal(engine->i915, sz); i915 288 drivers/gpu/drm/i915/gt/intel_engine_types.h struct drm_i915_private *i915; i915 16 drivers/gpu/drm/i915/gt/intel_engine_user.c intel_engine_lookup_user(struct drm_i915_private *i915, u8 class, u8 instance) i915 18 drivers/gpu/drm/i915/gt/intel_engine_user.c struct rb_node *p = i915->uabi_engines.rb_node; i915 41 drivers/gpu/drm/i915/gt/intel_engine_user.c (struct llist_head *)&engine->i915->uabi_engines); i915 71 drivers/gpu/drm/i915/gt/intel_engine_user.c static struct llist_node *get_engines(struct drm_i915_private *i915) i915 73 drivers/gpu/drm/i915/gt/intel_engine_user.c return llist_del_all((struct llist_head *)&i915->uabi_engines); i915 76 drivers/gpu/drm/i915/gt/intel_engine_user.c static void sort_engines(struct drm_i915_private *i915, i915 81 drivers/gpu/drm/i915/gt/intel_engine_user.c llist_for_each_safe(pos, next, get_engines(i915)) { i915 90 drivers/gpu/drm/i915/gt/intel_engine_user.c static void set_scheduler_caps(struct drm_i915_private *i915) i915 107 drivers/gpu/drm/i915/gt/intel_engine_user.c for_each_uabi_engine(engine, i915) { /* all engines must agree! */ i915 125 drivers/gpu/drm/i915/gt/intel_engine_user.c i915->caps.scheduler = enabled & ~disabled; i915 126 drivers/gpu/drm/i915/gt/intel_engine_user.c if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_ENABLED)) i915 127 drivers/gpu/drm/i915/gt/intel_engine_user.c i915->caps.scheduler = 0; i915 193 drivers/gpu/drm/i915/gt/intel_engine_user.c void intel_engines_driver_register(struct drm_i915_private *i915) i915 201 drivers/gpu/drm/i915/gt/intel_engine_user.c sort_engines(i915, &engines); i915 204 drivers/gpu/drm/i915/gt/intel_engine_user.c p = &i915->uabi_engines.rb_node; i915 225 drivers/gpu/drm/i915/gt/intel_engine_user.c rb_insert_color(&engine->uabi_node, &i915->uabi_engines); i915 227 drivers/gpu/drm/i915/gt/intel_engine_user.c GEM_BUG_ON(intel_engine_lookup_user(i915, i915 247 drivers/gpu/drm/i915/gt/intel_engine_user.c engine = intel_engine_lookup_user(i915, i915 273 drivers/gpu/drm/i915/gt/intel_engine_user.c isolation = intel_engines_has_context_isolation(i915); i915 274 drivers/gpu/drm/i915/gt/intel_engine_user.c for_each_uabi_engine(engine, i915) { i915 286 drivers/gpu/drm/i915/gt/intel_engine_user.c i915->uabi_engines = RB_ROOT; i915 289 drivers/gpu/drm/i915/gt/intel_engine_user.c set_scheduler_caps(i915); i915 292 drivers/gpu/drm/i915/gt/intel_engine_user.c unsigned int intel_engines_has_context_isolation(struct drm_i915_private *i915) i915 298 drivers/gpu/drm/i915/gt/intel_engine_user.c for_each_uabi_engine(engine, i915) i915 16 drivers/gpu/drm/i915/gt/intel_engine_user.h intel_engine_lookup_user(struct drm_i915_private *i915, u8 class, u8 instance); i915 18 drivers/gpu/drm/i915/gt/intel_engine_user.h unsigned int intel_engines_has_context_isolation(struct drm_i915_private *i915); i915 21 drivers/gpu/drm/i915/gt/intel_engine_user.h void intel_engines_driver_register(struct drm_i915_private *i915); i915 11 drivers/gpu/drm/i915/gt/intel_gt.c void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915) i915 13 drivers/gpu/drm/i915/gt/intel_gt.c gt->i915 = i915; i915 14 drivers/gpu/drm/i915/gt/intel_gt.c gt->uncore = &i915->uncore; i915 27 drivers/gpu/drm/i915/gt/intel_gt.c void intel_gt_init_hw(struct drm_i915_private *i915) i915 29 drivers/gpu/drm/i915/gt/intel_gt.c i915->gt.ggtt = &i915->ggtt; i915 57 drivers/gpu/drm/i915/gt/intel_gt.c struct drm_i915_private *i915 = gt->i915; i915 61 drivers/gpu/drm/i915/gt/intel_gt.c if (!IS_GEN(i915, 2)) i915 64 drivers/gpu/drm/i915/gt/intel_gt.c if (INTEL_GEN(i915) < 4) i915 82 drivers/gpu/drm/i915/gt/intel_gt.c if (INTEL_GEN(i915) >= 12) { i915 85 drivers/gpu/drm/i915/gt/intel_gt.c } else if (INTEL_GEN(i915) >= 8) { i915 88 drivers/gpu/drm/i915/gt/intel_gt.c } else if (INTEL_GEN(i915) >= 6) { i915 92 drivers/gpu/drm/i915/gt/intel_gt.c for_each_engine_masked(engine, i915, engine_mask, id) i915 103 drivers/gpu/drm/i915/gt/intel_gt.c for_each_engine(engine, gt->i915, id) { i915 126 drivers/gpu/drm/i915/gt/intel_gt.c if (INTEL_GEN(gt->i915) >= 12) { i915 164 drivers/gpu/drm/i915/gt/intel_gt.c struct drm_i915_private *i915 = gt->i915; i915 167 drivers/gpu/drm/i915/gt/intel_gt.c if (INTEL_GEN(i915) >= 8) i915 169 drivers/gpu/drm/i915/gt/intel_gt.c else if (INTEL_GEN(i915) >= 6) i915 179 drivers/gpu/drm/i915/gt/intel_gt.c struct drm_i915_private *i915 = gt->i915; i915 203 drivers/gpu/drm/i915/gt/intel_gt.c if (INTEL_INFO(i915)->has_coherent_ggtt) i915 208 drivers/gpu/drm/i915/gt/intel_gt.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) { i915 221 drivers/gpu/drm/i915/gt/intel_gt.c if (INTEL_GEN(gt->i915) < 6) i915 227 drivers/gpu/drm/i915/gt/intel_gt.c struct drm_i915_private *i915 = gt->i915; i915 232 drivers/gpu/drm/i915/gt/intel_gt.c obj = i915_gem_object_create_stolen(i915, size); i915 234 drivers/gpu/drm/i915/gt/intel_gt.c obj = i915_gem_object_create_internal(i915, size); i915 30 drivers/gpu/drm/i915/gt/intel_gt.h void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915); i915 31 drivers/gpu/drm/i915/gt/intel_gt.h void intel_gt_init_hw(struct drm_i915_private *i915); i915 254 drivers/gpu/drm/i915/gt/intel_gt_irq.c if (!HAS_L3_DPF(gt->i915)) i915 258 drivers/gpu/drm/i915/gt/intel_gt_irq.c gen5_gt_disable_irq(gt, GT_PARITY_ERROR(gt->i915)); i915 262 drivers/gpu/drm/i915/gt/intel_gt_irq.c gt->i915->l3_parity.which_slice |= 1 << 1; i915 265 drivers/gpu/drm/i915/gt/intel_gt_irq.c gt->i915->l3_parity.which_slice |= 1 << 0; i915 267 drivers/gpu/drm/i915/gt/intel_gt_irq.c schedule_work(>->i915->l3_parity.error_work); i915 284 drivers/gpu/drm/i915/gt/intel_gt_irq.c if (gt_iir & GT_PARITY_ERROR(gt->i915)) i915 339 drivers/gpu/drm/i915/gt/intel_gt_irq.c gen6_rps_irq_handler(gt->i915, gt_iir[2]); i915 417 drivers/gpu/drm/i915/gt/intel_gt_irq.c if (INTEL_GEN(gt->i915) >= 6) i915 428 drivers/gpu/drm/i915/gt/intel_gt_irq.c if (HAS_L3_DPF(gt->i915)) { i915 430 drivers/gpu/drm/i915/gt/intel_gt_irq.c gt->gt_imr = ~GT_PARITY_ERROR(gt->i915); i915 431 drivers/gpu/drm/i915/gt/intel_gt_irq.c gt_irqs |= GT_PARITY_ERROR(gt->i915); i915 435 drivers/gpu/drm/i915/gt/intel_gt_irq.c if (IS_GEN(gt->i915, 5)) i915 442 drivers/gpu/drm/i915/gt/intel_gt_irq.c if (INTEL_GEN(gt->i915) >= 6) { i915 447 drivers/gpu/drm/i915/gt/intel_gt_irq.c if (HAS_ENGINE(gt->i915, VECS0)) { i915 15 drivers/gpu/drm/i915/gt/intel_gt_pm.c static void pm_notify(struct drm_i915_private *i915, int state) i915 17 drivers/gpu/drm/i915/gt/intel_gt_pm.c blocking_notifier_call_chain(&i915->gt.pm_notifications, state, i915); i915 23 drivers/gpu/drm/i915/gt/intel_gt_pm.c struct drm_i915_private *i915 = gt->i915; i915 38 drivers/gpu/drm/i915/gt/intel_gt_pm.c gt->awake = intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ); i915 41 drivers/gpu/drm/i915/gt/intel_gt_pm.c if (NEEDS_RC6_CTX_CORRUPTION_WA(i915)) i915 42 drivers/gpu/drm/i915/gt/intel_gt_pm.c intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL); i915 44 drivers/gpu/drm/i915/gt/intel_gt_pm.c intel_enable_gt_powersave(i915); i915 46 drivers/gpu/drm/i915/gt/intel_gt_pm.c i915_update_gfx_val(i915); i915 47 drivers/gpu/drm/i915/gt/intel_gt_pm.c if (INTEL_GEN(i915) >= 6) i915 48 drivers/gpu/drm/i915/gt/intel_gt_pm.c gen6_rps_busy(i915); i915 50 drivers/gpu/drm/i915/gt/intel_gt_pm.c i915_pmu_gt_unparked(i915); i915 54 drivers/gpu/drm/i915/gt/intel_gt_pm.c pm_notify(i915, INTEL_GT_UNPARK); i915 61 drivers/gpu/drm/i915/gt/intel_gt_pm.c struct drm_i915_private *i915 = i915 62 drivers/gpu/drm/i915/gt/intel_gt_pm.c container_of(wf, typeof(*i915), gt.wakeref); i915 63 drivers/gpu/drm/i915/gt/intel_gt_pm.c intel_wakeref_t wakeref = fetch_and_zero(&i915->gt.awake); i915 67 drivers/gpu/drm/i915/gt/intel_gt_pm.c pm_notify(i915, INTEL_GT_PARK); i915 69 drivers/gpu/drm/i915/gt/intel_gt_pm.c i915_pmu_gt_parked(i915); i915 70 drivers/gpu/drm/i915/gt/intel_gt_pm.c if (INTEL_GEN(i915) >= 6) i915 71 drivers/gpu/drm/i915/gt/intel_gt_pm.c gen6_rps_idle(i915); i915 73 drivers/gpu/drm/i915/gt/intel_gt_pm.c if (NEEDS_RC6_CTX_CORRUPTION_WA(i915)) { i915 74 drivers/gpu/drm/i915/gt/intel_gt_pm.c i915_rc6_ctx_wa_check(i915); i915 75 drivers/gpu/drm/i915/gt/intel_gt_pm.c intel_uncore_forcewake_put(&i915->uncore, FORCEWAKE_ALL); i915 79 drivers/gpu/drm/i915/gt/intel_gt_pm.c intel_synchronize_irq(i915); i915 82 drivers/gpu/drm/i915/gt/intel_gt_pm.c intel_display_power_put(i915, POWER_DOMAIN_GT_IRQ, wakeref); i915 95 drivers/gpu/drm/i915/gt/intel_gt_pm.c intel_wakeref_init(>->wakeref, >->i915->runtime_pm, &wf_ops); i915 102 drivers/gpu/drm/i915/gt/intel_gt_pm.c if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) i915 130 drivers/gpu/drm/i915/gt/intel_gt_pm.c for_each_engine(engine, gt->i915, id) i915 147 drivers/gpu/drm/i915/gt/intel_gt_pm.c for_each_engine(engine, gt->i915, id) { i915 161 drivers/gpu/drm/i915/gt/intel_gt_pm.c dev_err(gt->i915->drm.dev, i915 15 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c struct drm_i915_private *i915 = gt->i915; i915 20 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c if (INTEL_GEN(i915) >= 11) { i915 23 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c } else if (INTEL_GEN(i915) >= 8) { i915 65 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c i915_reg_t reg = INTEL_GEN(gt->i915) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR; i915 76 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c struct drm_i915_private *i915 = gt->i915; i915 81 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c if (INTEL_GEN(i915) >= 11) { i915 84 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c } else if (INTEL_GEN(i915) >= 8) { i915 37 drivers/gpu/drm/i915/gt/intel_gt_types.h struct drm_i915_private *i915; i915 55 drivers/gpu/drm/i915/gt/intel_hangcheck.c struct drm_i915_private *dev_priv = engine->i915; i915 112 drivers/gpu/drm/i915/gt/intel_hangcheck.c if (IS_GEN(engine->i915, 2)) i915 239 drivers/gpu/drm/i915/gt/intel_hangcheck.c for_each_engine_masked(engine, gt->i915, hung, tmp) i915 273 drivers/gpu/drm/i915/gt/intel_hangcheck.c wakeref = intel_runtime_pm_get_if_in_use(>->i915->runtime_pm); i915 283 drivers/gpu/drm/i915/gt/intel_hangcheck.c for_each_engine(engine, gt->i915, id) { i915 305 drivers/gpu/drm/i915/gt/intel_hangcheck.c for_each_engine(engine, gt->i915, id) { i915 314 drivers/gpu/drm/i915/gt/intel_hangcheck.c dev_err(gt->i915->drm.dev, i915 324 drivers/gpu/drm/i915/gt/intel_hangcheck.c intel_runtime_pm_put(>->i915->runtime_pm, wakeref); i915 444 drivers/gpu/drm/i915/gt/intel_lrc.c if (IS_GEN(engine->i915, 8)) i915 454 drivers/gpu/drm/i915/gt/intel_lrc.c if (INTEL_GEN(engine->i915) >= 11) { i915 1493 drivers/gpu/drm/i915/gt/intel_lrc.c GEM_BUG_ON(USES_GUC_SUBMISSION(engine->i915)); i915 1549 drivers/gpu/drm/i915/gt/intel_lrc.c if (INTEL_GEN(engine->i915) >= 12) i915 1747 drivers/gpu/drm/i915/gt/intel_lrc.c dev_err_once(engine->i915->drm.dev, i915 1779 drivers/gpu/drm/i915/gt/intel_lrc.c intel_sseu_make_rpcs(engine->i915, &ce->sseu); i915 1800 drivers/gpu/drm/i915/gt/intel_lrc.c i915_coherent_map_type(engine->i915) | i915 1909 drivers/gpu/drm/i915/gt/intel_lrc.c GEM_BUG_ON(intel_vgpu_active(rq->i915)); i915 2060 drivers/gpu/drm/i915/gt/intel_lrc.c if (IS_BROADWELL(engine->i915)) i915 2147 drivers/gpu/drm/i915/gt/intel_lrc.c if (HAS_POOLED_EU(engine->i915)) { i915 2220 drivers/gpu/drm/i915/gt/intel_lrc.c obj = i915_gem_object_create_shmem(engine->i915, CTX_WA_BB_OBJ_SIZE); i915 2263 drivers/gpu/drm/i915/gt/intel_lrc.c switch (INTEL_GEN(engine->i915)) { i915 2280 drivers/gpu/drm/i915/gt/intel_lrc.c MISSING_CASE(INTEL_GEN(engine->i915)); i915 2327 drivers/gpu/drm/i915/gt/intel_lrc.c if (INTEL_GEN(engine->i915) >= 11) i915 2804 drivers/gpu/drm/i915/gt/intel_lrc.c if (IS_GEN(request->i915, 9)) i915 2808 drivers/gpu/drm/i915/gt/intel_lrc.c if (IS_KBL_REVID(request->i915, 0, KBL_REVID_B0)) i915 3006 drivers/gpu/drm/i915/gt/intel_lrc.c if (!intel_vgpu_active(engine->i915)) { i915 3008 drivers/gpu/drm/i915/gt/intel_lrc.c if (HAS_LOGICAL_RING_PREEMPTION(engine->i915)) i915 3041 drivers/gpu/drm/i915/gt/intel_lrc.c if (INTEL_GEN(engine->i915) < 11) { i915 3052 drivers/gpu/drm/i915/gt/intel_lrc.c if (IS_GEN(engine->i915, 8)) i915 3063 drivers/gpu/drm/i915/gt/intel_lrc.c if (INTEL_GEN(engine->i915) < 11) { i915 3081 drivers/gpu/drm/i915/gt/intel_lrc.c switch (INTEL_GEN(engine->i915)) { i915 3112 drivers/gpu/drm/i915/gt/intel_lrc.c struct drm_i915_private *i915 = engine->i915; i915 3129 drivers/gpu/drm/i915/gt/intel_lrc.c if (HAS_LOGICAL_RING_ELSQ(i915)) { i915 3143 drivers/gpu/drm/i915/gt/intel_lrc.c &engine->status_page.addr[intel_hws_csb_write_index(i915)]; i915 3145 drivers/gpu/drm/i915/gt/intel_lrc.c if (INTEL_GEN(i915) < 11) i915 3159 drivers/gpu/drm/i915/gt/intel_lrc.c switch (INTEL_GEN(engine->i915)) { i915 3161 drivers/gpu/drm/i915/gt/intel_lrc.c MISSING_CASE(INTEL_GEN(engine->i915)); i915 3213 drivers/gpu/drm/i915/gt/intel_lrc.c if (INTEL_GEN(engine->i915) < 11) { i915 3287 drivers/gpu/drm/i915/gt/intel_lrc.c if (INTEL_GEN(engine->i915) >= 10) i915 3367 drivers/gpu/drm/i915/gt/intel_lrc.c ctx_obj = i915_gem_object_create_shmem(engine->i915, context_size); i915 3725 drivers/gpu/drm/i915/gt/intel_lrc.c ve->base.i915 = ctx->i915; i915 285 drivers/gpu/drm/i915/gt/intel_mocs.c struct drm_i915_private *i915 = gt->i915; i915 288 drivers/gpu/drm/i915/gt/intel_mocs.c if (INTEL_GEN(i915) >= 12) { i915 293 drivers/gpu/drm/i915/gt/intel_mocs.c } else if (IS_GEN(i915, 11)) { i915 298 drivers/gpu/drm/i915/gt/intel_mocs.c } else if (IS_GEN9_BC(i915) || IS_CANNONLAKE(i915)) { i915 303 drivers/gpu/drm/i915/gt/intel_mocs.c } else if (IS_GEN9_LP(i915)) { i915 309 drivers/gpu/drm/i915/gt/intel_mocs.c WARN_ONCE(INTEL_GEN(i915) >= 9, i915 314 drivers/gpu/drm/i915/gt/intel_mocs.c if (IS_GEN(i915, 9)) { i915 376 drivers/gpu/drm/i915/gt/intel_mocs.c if (HAS_GLOBAL_MOCS_REGISTERS(gt->i915)) i915 409 drivers/gpu/drm/i915/gt/intel_mocs.c GEM_BUG_ON(!HAS_GLOBAL_MOCS_REGISTERS(gt->i915)); i915 601 drivers/gpu/drm/i915/gt/intel_mocs.c if (HAS_GLOBAL_MOCS_REGISTERS(rq->i915) || i915 624 drivers/gpu/drm/i915/gt/intel_mocs.c if (HAS_GLOBAL_MOCS_REGISTERS(gt->i915)) i915 47 drivers/gpu/drm/i915/gt/intel_renderstate.c switch (INTEL_GEN(engine->i915)) { i915 78 drivers/gpu/drm/i915/gt/intel_renderstate.c struct drm_i915_private *i915) i915 98 drivers/gpu/drm/i915/gt/intel_renderstate.c if (HAS_64BIT_RELOC(i915)) { i915 126 drivers/gpu/drm/i915/gt/intel_renderstate.c if (HAS_POOLED_EU(i915)) { i915 192 drivers/gpu/drm/i915/gt/intel_renderstate.c so.obj = i915_gem_object_create_internal(engine->i915, PAGE_SIZE); i915 206 drivers/gpu/drm/i915/gt/intel_renderstate.c err = render_state_setup(&so, rq->i915); i915 149 drivers/gpu/drm/i915/gt/intel_reset.c struct pci_dev *pdev = gt->i915->drm.pdev; i915 178 drivers/gpu/drm/i915/gt/intel_reset.c struct pci_dev *pdev = gt->i915->drm.pdev; i915 188 drivers/gpu/drm/i915/gt/intel_reset.c struct pci_dev *pdev = gt->i915->drm.pdev; i915 301 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine_masked(engine, gt->i915, engine_mask, tmp) { i915 313 drivers/gpu/drm/i915/gt/intel_reset.c u8 vdbox_sfc_access = RUNTIME_INFO(engine->i915)->vdbox_sfc_access; i915 380 drivers/gpu/drm/i915/gt/intel_reset.c u8 vdbox_sfc_access = RUNTIME_INFO(engine->i915)->vdbox_sfc_access; i915 428 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine_masked(engine, gt->i915, engine_mask, tmp) { i915 438 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine_masked(engine, gt->i915, engine_mask, tmp) i915 497 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine_masked(engine, gt->i915, engine_mask, tmp) { i915 517 drivers/gpu/drm/i915/gt/intel_reset.c if (INTEL_GEN(gt->i915) >= 11) i915 523 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine_masked(engine, gt->i915, engine_mask, tmp) i915 533 drivers/gpu/drm/i915/gt/intel_reset.c static reset_func intel_get_gpu_reset(struct drm_i915_private *i915) i915 535 drivers/gpu/drm/i915/gt/intel_reset.c if (INTEL_GEN(i915) >= 8) i915 537 drivers/gpu/drm/i915/gt/intel_reset.c else if (INTEL_GEN(i915) >= 6) i915 539 drivers/gpu/drm/i915/gt/intel_reset.c else if (INTEL_GEN(i915) >= 5) i915 541 drivers/gpu/drm/i915/gt/intel_reset.c else if (IS_G4X(i915)) i915 543 drivers/gpu/drm/i915/gt/intel_reset.c else if (IS_G33(i915) || IS_PINEVIEW(i915)) i915 545 drivers/gpu/drm/i915/gt/intel_reset.c else if (INTEL_GEN(i915) >= 3) i915 558 drivers/gpu/drm/i915/gt/intel_reset.c reset = intel_get_gpu_reset(gt->i915); i915 578 drivers/gpu/drm/i915/gt/intel_reset.c bool intel_has_gpu_reset(struct drm_i915_private *i915) i915 583 drivers/gpu/drm/i915/gt/intel_reset.c return intel_get_gpu_reset(i915); i915 586 drivers/gpu/drm/i915/gt/intel_reset.c bool intel_has_reset_engine(struct drm_i915_private *i915) i915 588 drivers/gpu/drm/i915/gt/intel_reset.c return INTEL_INFO(i915)->has_reset_engine && i915_modparams.reset >= 2; i915 594 drivers/gpu/drm/i915/gt/intel_reset.c INTEL_GEN(gt->i915) >= 11 ? GEN11_GRDOM_GUC : GEN9_GRDOM_GUC; i915 597 drivers/gpu/drm/i915/gt/intel_reset.c GEM_BUG_ON(!HAS_GT_UC(gt->i915)); i915 642 drivers/gpu/drm/i915/gt/intel_reset.c unmap_mapping_range(gt->i915->drm.anon_inode->i_mapping, i915 655 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine(engine, gt->i915, id) { i915 681 drivers/gpu/drm/i915/gt/intel_reset.c err = i915_ggtt_enable_hw(gt->i915); i915 685 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine(engine, gt->i915, id) i915 688 drivers/gpu/drm/i915/gt/intel_reset.c i915_gem_restore_fences(gt->i915); i915 706 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine(engine, gt->i915, id) { i915 742 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine(engine, gt->i915, id) i915 756 drivers/gpu/drm/i915/gt/intel_reset.c if (!INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) i915 759 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine(engine, gt->i915, id) i915 771 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine(engine, gt->i915, id) i915 784 drivers/gpu/drm/i915/gt/intel_reset.c with_intel_runtime_pm(>->i915->runtime_pm, wakeref) i915 894 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine(engine, gt->i915, id) { i915 938 drivers/gpu/drm/i915/gt/intel_reset.c dev_notice(gt->i915->drm.dev, i915 940 drivers/gpu/drm/i915/gt/intel_reset.c atomic_inc(>->i915->gpu_error.reset_count); i915 944 drivers/gpu/drm/i915/gt/intel_reset.c if (!intel_has_gpu_reset(gt->i915)) { i915 946 drivers/gpu/drm/i915/gt/intel_reset.c dev_err(gt->i915->drm.dev, "GPU reset not supported\n"); i915 952 drivers/gpu/drm/i915/gt/intel_reset.c if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) i915 953 drivers/gpu/drm/i915/gt/intel_reset.c intel_runtime_pm_disable_interrupts(gt->i915); i915 956 drivers/gpu/drm/i915/gt/intel_reset.c dev_err(gt->i915->drm.dev, "Failed to reset chip\n"); i915 960 drivers/gpu/drm/i915/gt/intel_reset.c if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) i915 961 drivers/gpu/drm/i915/gt/intel_reset.c intel_runtime_pm_enable_interrupts(gt->i915); i915 963 drivers/gpu/drm/i915/gt/intel_reset.c intel_overlay_reset(gt->i915); i915 973 drivers/gpu/drm/i915/gt/intel_reset.c ret = i915_gem_init_hw(gt->i915); i915 1043 drivers/gpu/drm/i915/gt/intel_reset.c dev_notice(engine->i915->drm.dev, i915 1045 drivers/gpu/drm/i915/gt/intel_reset.c atomic_inc(&engine->i915->gpu_error.reset_engine_count[engine->uabi_class]); i915 1084 drivers/gpu/drm/i915/gt/intel_reset.c struct kobject *kobj = >->i915->drm.primary->kdev->kobj; i915 1097 drivers/gpu/drm/i915/gt/intel_reset.c intel_prepare_reset(gt->i915); i915 1104 drivers/gpu/drm/i915/gt/intel_reset.c intel_finish_reset(gt->i915); i915 1152 drivers/gpu/drm/i915/gt/intel_reset.c wakeref = intel_runtime_pm_get(>->i915->runtime_pm); i915 1154 drivers/gpu/drm/i915/gt/intel_reset.c engine_mask &= INTEL_INFO(gt->i915)->engine_mask; i915 1157 drivers/gpu/drm/i915/gt/intel_reset.c i915_capture_error_state(gt->i915, engine_mask, msg); i915 1165 drivers/gpu/drm/i915/gt/intel_reset.c if (intel_has_reset_engine(gt->i915) && !intel_gt_is_wedged(gt)) { i915 1166 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine_masked(engine, gt->i915, engine_mask, tmp) { i915 1194 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine(engine, gt->i915, tmp) { i915 1204 drivers/gpu/drm/i915/gt/intel_reset.c for_each_engine(engine, gt->i915, tmp) i915 1212 drivers/gpu/drm/i915/gt/intel_reset.c intel_runtime_pm_put(>->i915->runtime_pm, wakeref); i915 1255 drivers/gpu/drm/i915/gt/intel_reset.c if (mutex_is_locked(>->i915->drm.struct_mutex)) i915 1282 drivers/gpu/drm/i915/gt/intel_reset.c dev_err(w->gt->i915->drm.dev, i915 74 drivers/gpu/drm/i915/gt/intel_reset.h bool intel_has_gpu_reset(struct drm_i915_private *i915); i915 75 drivers/gpu/drm/i915/gt/intel_reset.h bool intel_has_reset_engine(struct drm_i915_private *i915); i915 128 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (IS_G4X(rq->i915) || IS_GEN(rq->i915, 5)) i915 496 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (INTEL_GEN(engine->i915) >= 6) i915 507 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *dev_priv = engine->i915; i915 533 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *dev_priv = engine->i915; i915 574 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *dev_priv = engine->i915; i915 603 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *dev_priv = engine->i915; i915 640 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *dev_priv = engine->i915; i915 853 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *dev_priv = engine->i915; i915 999 drivers/gpu/drm/i915/gt/intel_ringbuffer.c engine->i915->irq_mask &= ~engine->irq_enable_mask; i915 1000 drivers/gpu/drm/i915/gt/intel_ringbuffer.c intel_uncore_write(engine->uncore, GEN2_IMR, engine->i915->irq_mask); i915 1007 drivers/gpu/drm/i915/gt/intel_ringbuffer.c engine->i915->irq_mask |= engine->irq_enable_mask; i915 1008 drivers/gpu/drm/i915/gt/intel_ringbuffer.c intel_uncore_write(engine->uncore, GEN2_IMR, engine->i915->irq_mask); i915 1014 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *i915 = engine->i915; i915 1016 drivers/gpu/drm/i915/gt/intel_ringbuffer.c i915->irq_mask &= ~engine->irq_enable_mask; i915 1017 drivers/gpu/drm/i915/gt/intel_ringbuffer.c intel_uncore_write16(&i915->uncore, GEN2_IMR, i915->irq_mask); i915 1024 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *i915 = engine->i915; i915 1026 drivers/gpu/drm/i915/gt/intel_ringbuffer.c i915->irq_mask |= engine->irq_enable_mask; i915 1027 drivers/gpu/drm/i915/gt/intel_ringbuffer.c intel_uncore_write16(&i915->uncore, GEN2_IMR, i915->irq_mask); i915 1215 drivers/gpu/drm/i915/gt/intel_ringbuffer.c i915_coherent_map_type(vma->vm->i915)); i915 1270 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *i915 = vm->i915; i915 1274 drivers/gpu/drm/i915/gt/intel_ringbuffer.c obj = i915_gem_object_create_stolen(i915, size); i915 1276 drivers/gpu/drm/i915/gt/intel_ringbuffer.c obj = i915_gem_object_create_internal(i915, size); i915 1301 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *i915 = engine->i915; i915 1322 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (IS_I830(i915) || IS_I845G(i915)) i915 1405 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *i915 = engine->i915; i915 1410 drivers/gpu/drm/i915/gt/intel_ringbuffer.c obj = i915_gem_object_create_shmem(i915, engine->context_size); i915 1429 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (IS_IVYBRIDGE(i915)) i915 1574 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *i915 = rq->i915; i915 1578 drivers/gpu/drm/i915/gt/intel_ringbuffer.c IS_HASWELL(i915) ? RUNTIME_INFO(i915)->num_engines - 1 : 0; i915 1584 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (IS_HASWELL(i915)) i915 1592 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (IS_GEN(i915, 7)) i915 1594 drivers/gpu/drm/i915/gt/intel_ringbuffer.c else if (IS_GEN(i915, 5)) i915 1608 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (IS_GEN(i915, 7)) { i915 1614 drivers/gpu/drm/i915/gt/intel_ringbuffer.c for_each_engine(signaller, i915, id) { i915 1624 drivers/gpu/drm/i915/gt/intel_ringbuffer.c } else if (IS_GEN(i915, 5)) { i915 1662 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (IS_GEN(i915, 7)) { i915 1668 drivers/gpu/drm/i915/gt/intel_ringbuffer.c for_each_engine(signaller, i915, id) { i915 1686 drivers/gpu/drm/i915/gt/intel_ringbuffer.c } else if (IS_GEN(i915, 5)) { i915 1697 drivers/gpu/drm/i915/gt/intel_ringbuffer.c u32 *cs, *remap_info = rq->i915->l3_parity.remap_info[slice]; i915 1752 drivers/gpu/drm/i915/gt/intel_ringbuffer.c GEM_BUG_ON(HAS_EXECLISTS(rq->i915)); i915 1768 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (engine->id == BCS0 && IS_VALLEYVIEW(engine->i915)) i915 2155 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *dev_priv = engine->i915; i915 2173 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *i915 = engine->i915; i915 2175 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (INTEL_GEN(i915) >= 6) { i915 2178 drivers/gpu/drm/i915/gt/intel_ringbuffer.c } else if (INTEL_GEN(i915) >= 5) { i915 2181 drivers/gpu/drm/i915/gt/intel_ringbuffer.c } else if (INTEL_GEN(i915) >= 3) { i915 2192 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *i915 = engine->i915; i915 2195 drivers/gpu/drm/i915/gt/intel_ringbuffer.c GEM_BUG_ON(INTEL_GEN(i915) >= 8); i915 2215 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (IS_GEN(i915, 5)) i915 2220 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (INTEL_GEN(i915) >= 6) i915 2222 drivers/gpu/drm/i915/gt/intel_ringbuffer.c else if (INTEL_GEN(i915) >= 4) i915 2224 drivers/gpu/drm/i915/gt/intel_ringbuffer.c else if (IS_I830(i915) || IS_I845G(i915)) i915 2232 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *i915 = engine->i915; i915 2234 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (HAS_L3_DPF(i915)) i915 2239 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (INTEL_GEN(i915) >= 7) { i915 2242 drivers/gpu/drm/i915/gt/intel_ringbuffer.c } else if (IS_GEN(i915, 6)) { i915 2245 drivers/gpu/drm/i915/gt/intel_ringbuffer.c } else if (IS_GEN(i915, 5)) { i915 2248 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (INTEL_GEN(i915) < 4) i915 2255 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (IS_HASWELL(i915)) i915 2263 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *i915 = engine->i915; i915 2265 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (INTEL_GEN(i915) >= 6) { i915 2267 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (IS_GEN(i915, 6)) i915 2272 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (IS_GEN(i915, 6)) i915 2278 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (IS_GEN(i915, 5)) i915 2287 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *i915 = engine->i915; i915 2292 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (IS_GEN(i915, 6)) i915 2300 drivers/gpu/drm/i915/gt/intel_ringbuffer.c struct drm_i915_private *i915 = engine->i915; i915 2302 drivers/gpu/drm/i915/gt/intel_ringbuffer.c GEM_BUG_ON(INTEL_GEN(i915) < 7); i915 28 drivers/gpu/drm/i915/gt/intel_sseu.c u32 intel_sseu_make_rpcs(struct drm_i915_private *i915, i915 31 drivers/gpu/drm/i915/gt/intel_sseu.c const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu; i915 41 drivers/gpu/drm/i915/gt/intel_sseu.c if (INTEL_GEN(i915) < 9) i915 52 drivers/gpu/drm/i915/gt/intel_sseu.c if (!i915->perf.exclusive_stream) { i915 57 drivers/gpu/drm/i915/gt/intel_sseu.c if (IS_GEN(i915, 11)) { i915 97 drivers/gpu/drm/i915/gt/intel_sseu.c if (IS_GEN(i915, 11) && i915 115 drivers/gpu/drm/i915/gt/intel_sseu.c if (INTEL_GEN(i915) >= 11) { i915 72 drivers/gpu/drm/i915/gt/intel_sseu.h u32 intel_sseu_make_rpcs(struct drm_i915_private *i915, i915 36 drivers/gpu/drm/i915/gt/intel_timeline.c struct drm_i915_private *i915 = gt->i915; i915 40 drivers/gpu/drm/i915/gt/intel_timeline.c obj = i915_gem_object_create_internal(i915, PAGE_SIZE); i915 180 drivers/gpu/drm/i915/gt/intel_timeline.c i915_active_init(hwsp->gt->i915, &cl->active, i915 276 drivers/gpu/drm/i915/gt/intel_timeline.c void intel_timelines_init(struct drm_i915_private *i915) i915 278 drivers/gpu/drm/i915/gt/intel_timeline.c timelines_init(&i915->gt); i915 555 drivers/gpu/drm/i915/gt/intel_timeline.c void intel_timelines_fini(struct drm_i915_private *i915) i915 557 drivers/gpu/drm/i915/gt/intel_timeline.c timelines_fini(&i915->gt); i915 91 drivers/gpu/drm/i915/gt/intel_timeline.h void intel_timelines_init(struct drm_i915_private *i915); i915 92 drivers/gpu/drm/i915/gt/intel_timeline.h void intel_timelines_fini(struct drm_i915_private *i915); i915 240 drivers/gpu/drm/i915/gt/intel_workarounds.c struct drm_i915_private *i915 = engine->i915; i915 262 drivers/gpu/drm/i915/gt/intel_workarounds.c (IS_BDW_GT3(i915) ? HDC_FENCE_DEST_SLM_DISABLE : 0)); i915 280 drivers/gpu/drm/i915/gt/intel_workarounds.c struct drm_i915_private *i915 = engine->i915; i915 282 drivers/gpu/drm/i915/gt/intel_workarounds.c if (HAS_LLC(i915)) { i915 339 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_SKYLAKE(i915) || IS_KABYLAKE(i915) || IS_COFFEELAKE(i915)) i915 366 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_GEN9_LP(i915)) i915 373 drivers/gpu/drm/i915/gt/intel_workarounds.c struct drm_i915_private *i915 = engine->i915; i915 384 drivers/gpu/drm/i915/gt/intel_workarounds.c if (!is_power_of_2(RUNTIME_INFO(i915)->sseu.subslice_7eu[i])) i915 393 drivers/gpu/drm/i915/gt/intel_workarounds.c ss = ffs(RUNTIME_INFO(i915)->sseu.subslice_7eu[i]) - 1; i915 434 drivers/gpu/drm/i915/gt/intel_workarounds.c struct drm_i915_private *i915 = engine->i915; i915 439 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_KBL_REVID(i915, KBL_REVID_C0, REVID_FOREVER)) i915 475 drivers/gpu/drm/i915/gt/intel_workarounds.c struct drm_i915_private *i915 = engine->i915; i915 482 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_CNL_REVID(i915, CNL_REVID_B0, CNL_REVID_B0)) i915 490 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_CNL_REVID(i915, 0, CNL_REVID_B0)) i915 515 drivers/gpu/drm/i915/gt/intel_workarounds.c struct drm_i915_private *i915 = engine->i915; i915 526 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_B0)) i915 542 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_A0)) i915 547 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_A0)) i915 577 drivers/gpu/drm/i915/gt/intel_workarounds.c struct drm_i915_private *i915 = engine->i915; i915 584 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_GEN(i915, 12)) i915 586 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_GEN(i915, 11)) i915 588 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_CANNONLAKE(i915)) i915 590 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_COFFEELAKE(i915)) i915 592 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_GEMINILAKE(i915)) i915 594 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_KABYLAKE(i915)) i915 596 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_BROXTON(i915)) i915 598 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_SKYLAKE(i915)) i915 600 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_CHERRYVIEW(i915)) i915 602 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_BROADWELL(i915)) i915 604 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (INTEL_GEN(i915) < 8) i915 607 drivers/gpu/drm/i915/gt/intel_workarounds.c MISSING_CASE(INTEL_GEN(i915)); i915 653 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) i915 656 drivers/gpu/drm/i915/gt/intel_workarounds.c if (!IS_COFFEELAKE(i915)) i915 661 drivers/gpu/drm/i915/gt/intel_workarounds.c if (HAS_LLC(i915)) { i915 679 drivers/gpu/drm/i915/gt/intel_workarounds.c skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) i915 681 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_gt_workarounds_init(i915, wal); i915 689 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_SKL_REVID(i915, SKL_REVID_H0, REVID_FOREVER)) i915 696 drivers/gpu/drm/i915/gt/intel_workarounds.c bxt_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) i915 698 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_gt_workarounds_init(i915, wal); i915 707 drivers/gpu/drm/i915/gt/intel_workarounds.c kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) i915 709 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_gt_workarounds_init(i915, wal); i915 712 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_KBL_REVID(i915, 0, KBL_REVID_B0)) i915 729 drivers/gpu/drm/i915/gt/intel_workarounds.c glk_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) i915 731 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_gt_workarounds_init(i915, wal); i915 735 drivers/gpu/drm/i915/gt/intel_workarounds.c cfl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) i915 737 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_gt_workarounds_init(i915, wal); i915 751 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal) i915 753 drivers/gpu/drm/i915/gt/intel_workarounds.c const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu; i915 757 drivers/gpu/drm/i915/gt/intel_workarounds.c GEM_BUG_ON(INTEL_GEN(i915) < 10); i915 787 drivers/gpu/drm/i915/gt/intel_workarounds.c if (INTEL_GEN(i915) >= 10 && is_power_of_2(sseu->slice_mask)) { i915 789 drivers/gpu/drm/i915/gt/intel_workarounds.c intel_uncore_read(&i915->uncore, GEN10_MIRROR_FUSE3) & i915 809 drivers/gpu/drm/i915/gt/intel_workarounds.c if (INTEL_GEN(i915) >= 11) { i915 823 drivers/gpu/drm/i915/gt/intel_workarounds.c cnl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) i915 825 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_init_mcr(i915, wal); i915 828 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_CNL_REVID(i915, CNL_REVID_B0, CNL_REVID_B0)) i915 840 drivers/gpu/drm/i915/gt/intel_workarounds.c icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) i915 842 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_init_mcr(i915, wal); i915 871 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_A0)) i915 882 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_B0)) i915 896 drivers/gpu/drm/i915/gt/intel_workarounds.c tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) i915 901 drivers/gpu/drm/i915/gt/intel_workarounds.c gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal) i915 903 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_GEN(i915, 12)) i915 904 drivers/gpu/drm/i915/gt/intel_workarounds.c tgl_gt_workarounds_init(i915, wal); i915 905 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_GEN(i915, 11)) i915 906 drivers/gpu/drm/i915/gt/intel_workarounds.c icl_gt_workarounds_init(i915, wal); i915 907 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_CANNONLAKE(i915)) i915 908 drivers/gpu/drm/i915/gt/intel_workarounds.c cnl_gt_workarounds_init(i915, wal); i915 909 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_COFFEELAKE(i915)) i915 910 drivers/gpu/drm/i915/gt/intel_workarounds.c cfl_gt_workarounds_init(i915, wal); i915 911 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_GEMINILAKE(i915)) i915 912 drivers/gpu/drm/i915/gt/intel_workarounds.c glk_gt_workarounds_init(i915, wal); i915 913 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_KABYLAKE(i915)) i915 914 drivers/gpu/drm/i915/gt/intel_workarounds.c kbl_gt_workarounds_init(i915, wal); i915 915 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_BROXTON(i915)) i915 916 drivers/gpu/drm/i915/gt/intel_workarounds.c bxt_gt_workarounds_init(i915, wal); i915 917 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_SKYLAKE(i915)) i915 918 drivers/gpu/drm/i915/gt/intel_workarounds.c skl_gt_workarounds_init(i915, wal); i915 919 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (INTEL_GEN(i915) <= 8) i915 922 drivers/gpu/drm/i915/gt/intel_workarounds.c MISSING_CASE(INTEL_GEN(i915)); i915 925 drivers/gpu/drm/i915/gt/intel_workarounds.c void intel_gt_init_workarounds(struct drm_i915_private *i915) i915 927 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal = &i915->gt_wa_list; i915 930 drivers/gpu/drm/i915/gt/intel_workarounds.c gt_init_workarounds(i915, wal); i915 995 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_list_apply(gt->uncore, >->i915->gt_wa_list); i915 1016 drivers/gpu/drm/i915/gt/intel_workarounds.c return wa_list_verify(gt->uncore, >->i915->gt_wa_list, from); i915 1204 drivers/gpu/drm/i915/gt/intel_workarounds.c struct drm_i915_private *i915 = engine->i915; i915 1209 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_GEN(i915, 12)) i915 1211 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_GEN(i915, 11)) i915 1213 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_CANNONLAKE(i915)) i915 1215 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_COFFEELAKE(i915)) i915 1217 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_GEMINILAKE(i915)) i915 1219 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_KABYLAKE(i915)) i915 1221 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_BROXTON(i915)) i915 1223 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (IS_SKYLAKE(i915)) i915 1225 drivers/gpu/drm/i915/gt/intel_workarounds.c else if (INTEL_GEN(i915) <= 8) i915 1228 drivers/gpu/drm/i915/gt/intel_workarounds.c MISSING_CASE(INTEL_GEN(i915)); i915 1259 drivers/gpu/drm/i915/gt/intel_workarounds.c struct drm_i915_private *i915 = engine->i915; i915 1261 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_GEN(i915, 11)) { i915 1309 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_B0)) i915 1326 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_GEN_RANGE(i915, 9, 11)) { i915 1333 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_SKYLAKE(i915) || IS_KABYLAKE(i915) || IS_COFFEELAKE(i915)) { i915 1340 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_BROXTON(i915)) { i915 1347 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_GEN(i915, 9)) { i915 1359 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_GEN9_LP(i915)) i915 1376 drivers/gpu/drm/i915/gt/intel_workarounds.c struct drm_i915_private *i915 = engine->i915; i915 1379 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_KBL_REVID(i915, KBL_REVID_A0, KBL_REVID_E0)) { i915 1389 drivers/gpu/drm/i915/gt/intel_workarounds.c if (I915_SELFTEST_ONLY(INTEL_GEN(engine->i915) < 8)) i915 1402 drivers/gpu/drm/i915/gt/intel_workarounds.c if (INTEL_GEN(engine->i915) < 8) i915 1424 drivers/gpu/drm/i915/gt/intel_workarounds.c obj = i915_gem_object_create_internal(vm->i915, size); i915 1448 drivers/gpu/drm/i915/gt/intel_workarounds.c static bool mcr_range(struct drm_i915_private *i915, u32 offset) i915 1455 drivers/gpu/drm/i915/gt/intel_workarounds.c if (INTEL_GEN(i915) >= 8 && (offset >= 0xb100 && offset <= 0xb3ff)) i915 1466 drivers/gpu/drm/i915/gt/intel_workarounds.c struct drm_i915_private *i915 = rq->i915; i915 1472 drivers/gpu/drm/i915/gt/intel_workarounds.c if (INTEL_GEN(i915) >= 8) i915 1476 drivers/gpu/drm/i915/gt/intel_workarounds.c if (!mcr_range(i915, i915_mmio_reg_offset(wa->reg))) i915 1487 drivers/gpu/drm/i915/gt/intel_workarounds.c if (mcr_range(i915, offset)) i915 1542 drivers/gpu/drm/i915/gt/intel_workarounds.c if (mcr_range(rq->i915, i915_mmio_reg_offset(wa->reg))) i915 28 drivers/gpu/drm/i915/gt/intel_workarounds.h void intel_gt_init_workarounds(struct drm_i915_private *i915); i915 236 drivers/gpu/drm/i915/gt/mock_engine.c struct intel_engine_cs *mock_engine(struct drm_i915_private *i915, i915 249 drivers/gpu/drm/i915/gt/mock_engine.c engine->base.i915 = i915; i915 250 drivers/gpu/drm/i915/gt/mock_engine.c engine->base.gt = &i915->gt; i915 42 drivers/gpu/drm/i915/gt/mock_engine.h struct intel_engine_cs *mock_engine(struct drm_i915_private *i915, i915 85 drivers/gpu/drm/i915/gt/selftest_context.c i915_coherent_map_type(engine->i915)); i915 104 drivers/gpu/drm/i915/gt/selftest_context.c if (HAS_EXECLISTS(engine->i915)) i915 156 drivers/gpu/drm/i915/gt/selftest_context.c mutex_lock(>->i915->drm.struct_mutex); i915 158 drivers/gpu/drm/i915/gt/selftest_context.c fixme = kernel_context(gt->i915); i915 164 drivers/gpu/drm/i915/gt/selftest_context.c for_each_engine(engine, gt->i915, id) { i915 203 drivers/gpu/drm/i915/gt/selftest_context.c mutex_unlock(>->i915->drm.struct_mutex); i915 302 drivers/gpu/drm/i915/gt/selftest_context.c file = mock_file(gt->i915); i915 306 drivers/gpu/drm/i915/gt/selftest_context.c mutex_lock(>->i915->drm.struct_mutex); i915 308 drivers/gpu/drm/i915/gt/selftest_context.c fixme = live_context(gt->i915, file); i915 314 drivers/gpu/drm/i915/gt/selftest_context.c for_each_engine(engine, gt->i915, id) { i915 319 drivers/gpu/drm/i915/gt/selftest_context.c err = igt_flush_test(gt->i915, I915_WAIT_LOCKED); i915 325 drivers/gpu/drm/i915/gt/selftest_context.c mutex_unlock(>->i915->drm.struct_mutex); i915 326 drivers/gpu/drm/i915/gt/selftest_context.c mock_file_free(gt->i915, file); i915 415 drivers/gpu/drm/i915/gt/selftest_context.c file = mock_file(gt->i915); i915 419 drivers/gpu/drm/i915/gt/selftest_context.c mutex_lock(>->i915->drm.struct_mutex); i915 421 drivers/gpu/drm/i915/gt/selftest_context.c fixme = live_context(gt->i915, file); i915 427 drivers/gpu/drm/i915/gt/selftest_context.c for_each_engine(engine, gt->i915, id) { i915 432 drivers/gpu/drm/i915/gt/selftest_context.c err = igt_flush_test(gt->i915, I915_WAIT_LOCKED); i915 438 drivers/gpu/drm/i915/gt/selftest_context.c mutex_unlock(>->i915->drm.struct_mutex); i915 439 drivers/gpu/drm/i915/gt/selftest_context.c mock_file_free(gt->i915, file); i915 443 drivers/gpu/drm/i915/gt/selftest_context.c int intel_context_live_selftests(struct drm_i915_private *i915) i915 450 drivers/gpu/drm/i915/gt/selftest_context.c struct intel_gt *gt = &i915->gt; i915 10 drivers/gpu/drm/i915/gt/selftest_engine.c int intel_engine_live_selftests(struct drm_i915_private *i915) i915 16 drivers/gpu/drm/i915/gt/selftest_engine.c struct intel_gt *gt = &i915->gt; i915 28 drivers/gpu/drm/i915/gt/selftest_engine_pm.c for_each_engine(engine, gt->i915, id) { i915 61 drivers/gpu/drm/i915/gt/selftest_hangcheck.c h->ctx = kernel_context(gt->i915); i915 67 drivers/gpu/drm/i915/gt/selftest_hangcheck.c h->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); i915 73 drivers/gpu/drm/i915/gt/selftest_hangcheck.c h->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); i915 88 drivers/gpu/drm/i915/gt/selftest_hangcheck.c i915_coherent_map_type(gt->i915)); i915 143 drivers/gpu/drm/i915/gt/selftest_hangcheck.c obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); i915 147 drivers/gpu/drm/i915/gt/selftest_hangcheck.c vaddr = i915_gem_object_pin_map(obj, i915_coherent_map_type(gt->i915)); i915 190 drivers/gpu/drm/i915/gt/selftest_hangcheck.c if (INTEL_GEN(gt->i915) >= 8) { i915 204 drivers/gpu/drm/i915/gt/selftest_hangcheck.c } else if (INTEL_GEN(gt->i915) >= 6) { i915 217 drivers/gpu/drm/i915/gt/selftest_hangcheck.c } else if (INTEL_GEN(gt->i915) >= 4) { i915 253 drivers/gpu/drm/i915/gt/selftest_hangcheck.c if (INTEL_GEN(gt->i915) <= 5) i915 288 drivers/gpu/drm/i915/gt/selftest_hangcheck.c igt_flush_test(h->gt->i915, I915_WAIT_LOCKED); i915 312 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 317 drivers/gpu/drm/i915/gt/selftest_hangcheck.c for_each_engine(engine, gt->i915, id) { i915 359 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 371 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct i915_gpu_error *global = >->i915->gpu_error; i915 382 drivers/gpu/drm/i915/gt/selftest_hangcheck.c file = mock_file(gt->i915); i915 386 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 387 drivers/gpu/drm/i915/gt/selftest_hangcheck.c ctx = live_context(gt->i915, file); i915 388 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 398 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 400 drivers/gpu/drm/i915/gt/selftest_hangcheck.c for_each_engine(engine, gt->i915, id) { i915 420 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 432 drivers/gpu/drm/i915/gt/selftest_hangcheck.c err = igt_flush_test(gt->i915, 0); i915 438 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 439 drivers/gpu/drm/i915/gt/selftest_hangcheck.c err = igt_flush_test(gt->i915, I915_WAIT_LOCKED); i915 440 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 443 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mock_file_free(gt->i915, file); i915 452 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct i915_gpu_error *global = >->i915->gpu_error; i915 461 drivers/gpu/drm/i915/gt/selftest_hangcheck.c if (!intel_has_reset_engine(gt->i915)) i915 464 drivers/gpu/drm/i915/gt/selftest_hangcheck.c file = mock_file(gt->i915); i915 468 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 469 drivers/gpu/drm/i915/gt/selftest_hangcheck.c ctx = live_context(gt->i915, file); i915 470 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 477 drivers/gpu/drm/i915/gt/selftest_hangcheck.c for_each_engine(engine, gt->i915, id) { i915 497 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 510 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 536 drivers/gpu/drm/i915/gt/selftest_hangcheck.c err = igt_flush_test(gt->i915, 0); i915 541 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 542 drivers/gpu/drm/i915/gt/selftest_hangcheck.c err = igt_flush_test(gt->i915, I915_WAIT_LOCKED); i915 543 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 546 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mock_file_free(gt->i915, file); i915 554 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct i915_gpu_error *global = >->i915->gpu_error; i915 562 drivers/gpu/drm/i915/gt/selftest_hangcheck.c if (!intel_has_reset_engine(gt->i915)) i915 566 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 568 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 573 drivers/gpu/drm/i915/gt/selftest_hangcheck.c for_each_engine(engine, gt->i915, id) { i915 596 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 600 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 606 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 609 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct drm_printer p = drm_info_printer(gt->i915->drm.dev); i915 650 drivers/gpu/drm/i915/gt/selftest_hangcheck.c err = igt_flush_test(gt->i915, 0); i915 659 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 661 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 723 drivers/gpu/drm/i915/gt/selftest_hangcheck.c file = mock_file(engine->i915); i915 728 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(&engine->i915->drm.struct_mutex); i915 729 drivers/gpu/drm/i915/gt/selftest_hangcheck.c ctx[count] = live_context(engine->i915, file); i915 730 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(&engine->i915->drm.struct_mutex); i915 744 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(&engine->i915->drm.struct_mutex); i915 747 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(&engine->i915->drm.struct_mutex); i915 758 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(&engine->i915->drm.struct_mutex); i915 776 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mock_file_free(engine->i915, file); i915 784 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct i915_gpu_error *global = >->i915->gpu_error; i915 794 drivers/gpu/drm/i915/gt/selftest_hangcheck.c if (!intel_has_reset_engine(gt->i915)) i915 798 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 800 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 808 drivers/gpu/drm/i915/gt/selftest_hangcheck.c for_each_engine(engine, gt->i915, id) { i915 826 drivers/gpu/drm/i915/gt/selftest_hangcheck.c for_each_engine(other, gt->i915, tmp) { i915 858 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 862 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 868 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 871 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct drm_printer p = drm_info_printer(gt->i915->drm.dev); i915 896 drivers/gpu/drm/i915/gt/selftest_hangcheck.c drm_info_printer(gt->i915->drm.dev); i915 916 drivers/gpu/drm/i915/gt/selftest_hangcheck.c drm_info_printer(gt->i915->drm.dev); i915 943 drivers/gpu/drm/i915/gt/selftest_hangcheck.c for_each_engine(other, gt->i915, tmp) { i915 980 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 981 drivers/gpu/drm/i915/gt/selftest_hangcheck.c err = igt_flush_test(gt->i915, I915_WAIT_LOCKED); i915 982 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 991 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 993 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 1025 drivers/gpu/drm/i915/gt/selftest_hangcheck.c if (!(gt->i915->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY)) i915 1039 drivers/gpu/drm/i915/gt/selftest_hangcheck.c u32 count = i915_reset_count(>->i915->gpu_error); i915 1049 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct i915_gpu_error *global = >->i915->gpu_error; i915 1050 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct intel_engine_cs *engine = gt->i915->engine[RCS0]; i915 1064 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 1079 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct drm_printer p = drm_info_printer(gt->i915->drm.dev); i915 1112 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 1130 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct drm_i915_private *i915 = vm->i915; i915 1136 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(&i915->drm.struct_mutex); i915 1138 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(&i915->drm.struct_mutex); i915 1146 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct drm_i915_private *i915 = arg->vma->vm->i915; i915 1151 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(&i915->drm.struct_mutex); i915 1176 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(&i915->drm.struct_mutex); i915 1186 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct intel_engine_cs *engine = gt->i915->engine[RCS0]; i915 1199 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 1204 drivers/gpu/drm/i915/gt/selftest_hangcheck.c obj = i915_gem_object_create_internal(gt->i915, SZ_1M); i915 1265 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 1268 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct drm_printer p = drm_info_printer(gt->i915->drm.dev); i915 1291 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct drm_printer p = drm_info_printer(gt->i915->drm.dev); i915 1315 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 1323 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 1346 drivers/gpu/drm/i915/gt/selftest_hangcheck.c file = mock_file(gt->i915); i915 1350 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 1351 drivers/gpu/drm/i915/gt/selftest_hangcheck.c ctx = live_context(gt->i915, file); i915 1352 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 1364 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mock_file_free(gt->i915, file); i915 1382 drivers/gpu/drm/i915/gt/selftest_hangcheck.c for_each_engine(engine, gt->i915, id) { i915 1396 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct i915_gpu_error *global = >->i915->gpu_error; i915 1406 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 1411 drivers/gpu/drm/i915/gt/selftest_hangcheck.c for_each_engine(engine, gt->i915, id) { i915 1465 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct drm_printer p = drm_info_printer(gt->i915->drm.dev); i915 1521 drivers/gpu/drm/i915/gt/selftest_hangcheck.c err = igt_flush_test(gt->i915, I915_WAIT_LOCKED); i915 1529 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 1541 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct i915_gpu_error *global = >->i915->gpu_error; i915 1542 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct intel_engine_cs *engine = gt->i915->engine[RCS0]; i915 1550 drivers/gpu/drm/i915/gt/selftest_hangcheck.c if (!intel_has_reset_engine(gt->i915)) i915 1556 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 1572 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct drm_printer p = drm_info_printer(gt->i915->drm.dev); i915 1584 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 1593 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 1606 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 1692 drivers/gpu/drm/i915/gt/selftest_hangcheck.c if (!intel_has_reset_engine(gt->i915)) i915 1695 drivers/gpu/drm/i915/gt/selftest_hangcheck.c if (USES_GUC_SUBMISSION(gt->i915)) i915 1699 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 1709 drivers/gpu/drm/i915/gt/selftest_hangcheck.c for_each_engine(engine, gt->i915, id) { i915 1721 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 1727 drivers/gpu/drm/i915/gt/selftest_hangcheck.c int intel_hangcheck_live_selftests(struct drm_i915_private *i915) i915 1744 drivers/gpu/drm/i915/gt/selftest_hangcheck.c struct intel_gt *gt = &i915->gt; i915 1749 drivers/gpu/drm/i915/gt/selftest_hangcheck.c if (!intel_has_gpu_reset(gt->i915)) i915 1755 drivers/gpu/drm/i915/gt/selftest_hangcheck.c wakeref = intel_runtime_pm_get(>->i915->runtime_pm); i915 1761 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_lock(>->i915->drm.struct_mutex); i915 1762 drivers/gpu/drm/i915/gt/selftest_hangcheck.c igt_flush_test(gt->i915, I915_WAIT_LOCKED); i915 1763 drivers/gpu/drm/i915/gt/selftest_hangcheck.c mutex_unlock(>->i915->drm.struct_mutex); i915 1766 drivers/gpu/drm/i915/gt/selftest_hangcheck.c intel_runtime_pm_put(>->i915->runtime_pm, wakeref); i915 24 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_i915_private *i915 = arg; i915 32 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!HAS_LOGICAL_RING_CONTEXTS(i915)) i915 35 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&i915->drm.struct_mutex); i915 36 drivers/gpu/drm/i915/gt/selftest_lrc.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 38 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_spinner_init(&spin, &i915->gt)) i915 41 drivers/gpu/drm/i915/gt/selftest_lrc.c ctx = kernel_context(i915); i915 58 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_gt_set_wedged(&i915->gt); i915 64 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) { i915 77 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 78 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&i915->drm.struct_mutex); i915 126 drivers/gpu/drm/i915/gt/selftest_lrc.c ctx = kernel_context(engine->i915); i915 193 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(engine, outer->i915, id) { i915 211 drivers/gpu/drm/i915/gt/selftest_lrc.c 2 * RUNTIME_INFO(outer->i915)->num_engines * (count + 2) * (count + 3)) < 0) { i915 226 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_i915_private *i915 = arg; i915 243 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&i915->drm.struct_mutex); i915 244 drivers/gpu/drm/i915/gt/selftest_lrc.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 246 drivers/gpu/drm/i915/gt/selftest_lrc.c obj = i915_gem_object_create_internal(i915, PAGE_SIZE); i915 252 drivers/gpu/drm/i915/gt/selftest_lrc.c vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL); i915 272 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(engine, i915, id) { i915 282 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) { i915 296 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 297 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&i915->drm.struct_mutex); i915 304 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_i915_private *i915 = arg; i915 319 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&i915->drm.struct_mutex); i915 320 drivers/gpu/drm/i915/gt/selftest_lrc.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 322 drivers/gpu/drm/i915/gt/selftest_lrc.c ctx_hi = kernel_context(i915); i915 328 drivers/gpu/drm/i915/gt/selftest_lrc.c ctx_lo = kernel_context(i915); i915 334 drivers/gpu/drm/i915/gt/selftest_lrc.c obj = i915_gem_object_create_internal(i915, PAGE_SIZE); i915 346 drivers/gpu/drm/i915/gt/selftest_lrc.c vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL); i915 356 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(engine, i915, id) { i915 367 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_live_test_begin(&t, i915, __func__, engine->name)) { i915 447 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_printer p = drm_info_printer(i915->drm.dev); i915 455 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_gt_set_wedged(&i915->gt); i915 479 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 480 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&i915->drm.struct_mutex); i915 504 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_i915_private *i915 = arg; i915 512 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!HAS_LOGICAL_RING_PREEMPTION(i915)) i915 515 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_PREEMPTION)) i915 518 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&i915->drm.struct_mutex); i915 519 drivers/gpu/drm/i915/gt/selftest_lrc.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 521 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_spinner_init(&spin_hi, &i915->gt)) i915 524 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_spinner_init(&spin_lo, &i915->gt)) i915 527 drivers/gpu/drm/i915/gt/selftest_lrc.c ctx_hi = kernel_context(i915); i915 533 drivers/gpu/drm/i915/gt/selftest_lrc.c ctx_lo = kernel_context(i915); i915 539 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(engine, i915, id) { i915 546 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_live_test_begin(&t, i915, __func__, engine->name)) { i915 562 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_gt_set_wedged(&i915->gt); i915 579 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_gt_set_wedged(&i915->gt); i915 603 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 604 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&i915->drm.struct_mutex); i915 610 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_i915_private *i915 = arg; i915 619 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!HAS_LOGICAL_RING_PREEMPTION(i915)) i915 622 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&i915->drm.struct_mutex); i915 623 drivers/gpu/drm/i915/gt/selftest_lrc.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 625 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_spinner_init(&spin_hi, &i915->gt)) i915 628 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_spinner_init(&spin_lo, &i915->gt)) i915 631 drivers/gpu/drm/i915/gt/selftest_lrc.c ctx_hi = kernel_context(i915); i915 635 drivers/gpu/drm/i915/gt/selftest_lrc.c ctx_lo = kernel_context(i915); i915 642 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(engine, i915, id) { i915 649 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_live_test_begin(&t, i915, __func__, engine->name)) { i915 709 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 710 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&i915->drm.struct_mutex); i915 716 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_gt_set_wedged(&i915->gt); i915 726 drivers/gpu/drm/i915/gt/selftest_lrc.c static int preempt_client_init(struct drm_i915_private *i915, i915 729 drivers/gpu/drm/i915/gt/selftest_lrc.c c->ctx = kernel_context(i915); i915 733 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_spinner_init(&c->spin, &i915->gt)) i915 751 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_i915_private *i915 = arg; i915 763 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!HAS_LOGICAL_RING_PREEMPTION(i915)) i915 766 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&i915->drm.struct_mutex); i915 767 drivers/gpu/drm/i915/gt/selftest_lrc.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 769 drivers/gpu/drm/i915/gt/selftest_lrc.c if (preempt_client_init(i915, &a)) i915 771 drivers/gpu/drm/i915/gt/selftest_lrc.c if (preempt_client_init(i915, &b)) i915 775 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(engine, i915, id) { i915 835 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 845 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 846 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&i915->drm.struct_mutex); i915 852 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_gt_set_wedged(&i915->gt); i915 859 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_i915_private *i915 = arg; i915 876 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!HAS_LOGICAL_RING_PREEMPTION(i915)) i915 879 drivers/gpu/drm/i915/gt/selftest_lrc.c if (USES_GUC_SUBMISSION(i915)) i915 882 drivers/gpu/drm/i915/gt/selftest_lrc.c if (intel_vgpu_active(i915)) i915 885 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&i915->drm.struct_mutex); i915 886 drivers/gpu/drm/i915/gt/selftest_lrc.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 888 drivers/gpu/drm/i915/gt/selftest_lrc.c if (preempt_client_init(i915, &a)) i915 890 drivers/gpu/drm/i915/gt/selftest_lrc.c if (preempt_client_init(i915, &b)) i915 893 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(engine, i915, id) { i915 951 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 961 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 962 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&i915->drm.struct_mutex); i915 968 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_gt_set_wedged(&i915->gt); i915 1024 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_i915_private *i915 = arg; i915 1038 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!HAS_LOGICAL_RING_PREEMPTION(i915)) i915 1041 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&i915->drm.struct_mutex); i915 1042 drivers/gpu/drm/i915/gt/selftest_lrc.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 1044 drivers/gpu/drm/i915/gt/selftest_lrc.c if (preempt_client_init(i915, &client[0])) /* ELSP[0] */ i915 1046 drivers/gpu/drm/i915/gt/selftest_lrc.c if (preempt_client_init(i915, &client[1])) /* ELSP[1] */ i915 1048 drivers/gpu/drm/i915/gt/selftest_lrc.c if (preempt_client_init(i915, &client[2])) /* head of queue */ i915 1050 drivers/gpu/drm/i915/gt/selftest_lrc.c if (preempt_client_init(i915, &client[3])) /* bystander */ i915 1053 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(engine, i915, id) { i915 1108 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 1132 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 1133 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&i915->drm.struct_mutex); i915 1139 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_gt_set_wedged(&i915->gt); i915 1146 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_i915_private *i915 = arg; i915 1159 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!HAS_LOGICAL_RING_PREEMPTION(i915)) i915 1162 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&i915->drm.struct_mutex); i915 1163 drivers/gpu/drm/i915/gt/selftest_lrc.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 1165 drivers/gpu/drm/i915/gt/selftest_lrc.c if (preempt_client_init(i915, &hi)) i915 1168 drivers/gpu/drm/i915/gt/selftest_lrc.c if (preempt_client_init(i915, &lo)) i915 1171 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(engine, i915, id) { i915 1202 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_live_test_begin(&t, i915, __func__, engine->name)) { i915 1240 drivers/gpu/drm/i915/gt/selftest_lrc.c drm_info_printer(i915->drm.dev); i915 1256 drivers/gpu/drm/i915/gt/selftest_lrc.c drm_info_printer(i915->drm.dev); i915 1278 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 1279 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&i915->drm.struct_mutex); i915 1285 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_gt_set_wedged(&i915->gt); i915 1292 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_i915_private *i915 = arg; i915 1300 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!HAS_LOGICAL_RING_PREEMPTION(i915)) i915 1303 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!intel_has_reset_engine(i915)) i915 1306 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&i915->drm.struct_mutex); i915 1307 drivers/gpu/drm/i915/gt/selftest_lrc.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 1309 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_spinner_init(&spin_hi, &i915->gt)) i915 1312 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_spinner_init(&spin_lo, &i915->gt)) i915 1315 drivers/gpu/drm/i915/gt/selftest_lrc.c ctx_hi = kernel_context(i915); i915 1321 drivers/gpu/drm/i915/gt/selftest_lrc.c ctx_lo = kernel_context(i915); i915 1327 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(engine, i915, id) { i915 1344 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_gt_set_wedged(&i915->gt); i915 1366 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_gt_set_wedged(&i915->gt); i915 1371 drivers/gpu/drm/i915/gt/selftest_lrc.c set_bit(I915_RESET_ENGINE + id, &i915->gt.reset.flags); i915 1373 drivers/gpu/drm/i915/gt/selftest_lrc.c clear_bit(I915_RESET_ENGINE + id, &i915->gt.reset.flags); i915 1380 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_gt_set_wedged(&i915->gt); i915 1387 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) { i915 1403 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 1404 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&i915->drm.struct_mutex); i915 1419 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_i915_private *i915; i915 1492 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&smoke->i915->drm.struct_mutex); i915 1496 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&smoke->i915->drm.struct_mutex); i915 1517 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&smoke->i915->drm.struct_mutex); i915 1519 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(engine, smoke->i915, id) { i915 1536 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(engine, smoke->i915, id) { i915 1551 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&smoke->i915->drm.struct_mutex); i915 1555 drivers/gpu/drm/i915/gt/selftest_lrc.c RUNTIME_INFO(smoke->i915)->num_engines, smoke->ncontext); i915 1567 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(smoke->engine, smoke->i915, id) { i915 1583 drivers/gpu/drm/i915/gt/selftest_lrc.c RUNTIME_INFO(smoke->i915)->num_engines, smoke->ncontext); i915 1590 drivers/gpu/drm/i915/gt/selftest_lrc.c .i915 = arg, i915 1601 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!HAS_LOGICAL_RING_PREEMPTION(smoke.i915)) i915 1610 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&smoke.i915->drm.struct_mutex); i915 1611 drivers/gpu/drm/i915/gt/selftest_lrc.c wakeref = intel_runtime_pm_get(&smoke.i915->runtime_pm); i915 1613 drivers/gpu/drm/i915/gt/selftest_lrc.c smoke.batch = i915_gem_object_create_internal(smoke.i915, PAGE_SIZE); i915 1630 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_live_test_begin(&t, smoke.i915, __func__, "all")) { i915 1636 drivers/gpu/drm/i915/gt/selftest_lrc.c smoke.contexts[n] = kernel_context(smoke.i915); i915 1664 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_runtime_pm_put(&smoke.i915->runtime_pm, wakeref); i915 1665 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&smoke.i915->drm.struct_mutex); i915 1671 drivers/gpu/drm/i915/gt/selftest_lrc.c static int nop_virtual_engine(struct drm_i915_private *i915, i915 1690 drivers/gpu/drm/i915/gt/selftest_lrc.c ctx[n] = kernel_context(i915); i915 1715 drivers/gpu/drm/i915/gt/selftest_lrc.c err = igt_live_test_begin(&t, i915, __func__, ve[0]->engine->name); i915 1762 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_gt_set_wedged(&i915->gt); i915 1784 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 1797 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_i915_private *i915 = arg; i915 1800 drivers/gpu/drm/i915/gt/selftest_lrc.c struct intel_gt *gt = &i915->gt; i915 1805 drivers/gpu/drm/i915/gt/selftest_lrc.c if (USES_GUC_SUBMISSION(i915)) i915 1808 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&i915->drm.struct_mutex); i915 1810 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(engine, i915, id) { i915 1811 drivers/gpu/drm/i915/gt/selftest_lrc.c err = nop_virtual_engine(i915, &engine, 1, 1, 0); i915 1833 drivers/gpu/drm/i915/gt/selftest_lrc.c err = nop_virtual_engine(i915, siblings, nsibling, i915 1839 drivers/gpu/drm/i915/gt/selftest_lrc.c err = nop_virtual_engine(i915, siblings, nsibling, n, CHAIN); i915 1845 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&i915->drm.struct_mutex); i915 1849 drivers/gpu/drm/i915/gt/selftest_lrc.c static int mask_virtual_engine(struct drm_i915_private *i915, i915 1865 drivers/gpu/drm/i915/gt/selftest_lrc.c ctx = kernel_context(i915); i915 1879 drivers/gpu/drm/i915/gt/selftest_lrc.c err = igt_live_test_begin(&t, i915, __func__, ve->engine->name); i915 1910 drivers/gpu/drm/i915/gt/selftest_lrc.c intel_gt_set_wedged(&i915->gt); i915 1929 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 1946 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_i915_private *i915 = arg; i915 1948 drivers/gpu/drm/i915/gt/selftest_lrc.c struct intel_gt *gt = &i915->gt; i915 1952 drivers/gpu/drm/i915/gt/selftest_lrc.c if (USES_GUC_SUBMISSION(i915)) i915 1955 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&i915->drm.struct_mutex); i915 1970 drivers/gpu/drm/i915/gt/selftest_lrc.c err = mask_virtual_engine(i915, siblings, nsibling); i915 1976 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&i915->drm.struct_mutex); i915 1980 drivers/gpu/drm/i915/gt/selftest_lrc.c static int bond_virtual_engine(struct drm_i915_private *i915, i915 1996 drivers/gpu/drm/i915/gt/selftest_lrc.c ctx = kernel_context(i915); i915 2002 drivers/gpu/drm/i915/gt/selftest_lrc.c for_each_engine(master, i915, id) { i915 2107 drivers/gpu/drm/i915/gt/selftest_lrc.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 2124 drivers/gpu/drm/i915/gt/selftest_lrc.c struct drm_i915_private *i915 = arg; i915 2126 drivers/gpu/drm/i915/gt/selftest_lrc.c struct intel_gt *gt = &i915->gt; i915 2130 drivers/gpu/drm/i915/gt/selftest_lrc.c if (USES_GUC_SUBMISSION(i915)) i915 2133 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_lock(&i915->drm.struct_mutex); i915 2151 drivers/gpu/drm/i915/gt/selftest_lrc.c err = bond_virtual_engine(i915, i915 2163 drivers/gpu/drm/i915/gt/selftest_lrc.c mutex_unlock(&i915->drm.struct_mutex); i915 2167 drivers/gpu/drm/i915/gt/selftest_lrc.c int intel_execlists_live_selftests(struct drm_i915_private *i915) i915 2186 drivers/gpu/drm/i915/gt/selftest_lrc.c if (!HAS_EXECLISTS(i915)) i915 2189 drivers/gpu/drm/i915/gt/selftest_lrc.c if (intel_gt_is_wedged(&i915->gt)) i915 2192 drivers/gpu/drm/i915/gt/selftest_lrc.c return i915_live_subtests(tests, i915); i915 20 drivers/gpu/drm/i915/gt/selftest_reset.c wakeref = intel_runtime_pm_get(>->i915->runtime_pm); i915 22 drivers/gpu/drm/i915/gt/selftest_reset.c reset_count = i915_reset_count(>->i915->gpu_error); i915 26 drivers/gpu/drm/i915/gt/selftest_reset.c if (i915_reset_count(>->i915->gpu_error) == reset_count) { i915 31 drivers/gpu/drm/i915/gt/selftest_reset.c intel_runtime_pm_put(>->i915->runtime_pm, wakeref); i915 48 drivers/gpu/drm/i915/gt/selftest_reset.c wakeref = intel_runtime_pm_get(>->i915->runtime_pm); i915 55 drivers/gpu/drm/i915/gt/selftest_reset.c intel_runtime_pm_put(>->i915->runtime_pm, wakeref); i915 115 drivers/gpu/drm/i915/gt/selftest_reset.c if (!intel_has_reset_engine(gt->i915)) i915 118 drivers/gpu/drm/i915/gt/selftest_reset.c if (USES_GUC_SUBMISSION(gt->i915)) i915 128 drivers/gpu/drm/i915/gt/selftest_reset.c for_each_engine(engine, gt->i915, id) { i915 163 drivers/gpu/drm/i915/gt/selftest_reset.c int intel_reset_live_selftests(struct drm_i915_private *i915) i915 171 drivers/gpu/drm/i915/gt/selftest_reset.c struct intel_gt *gt = &i915->gt; i915 173 drivers/gpu/drm/i915/gt/selftest_reset.c if (!intel_has_gpu_reset(gt->i915)) i915 37 drivers/gpu/drm/i915/gt/selftest_timeline.c struct drm_i915_private *i915; i915 70 drivers/gpu/drm/i915/gt/selftest_timeline.c tl = intel_timeline_create(&state->i915->gt, NULL); i915 122 drivers/gpu/drm/i915/gt/selftest_timeline.c state.i915 = mock_gem_device(); i915 123 drivers/gpu/drm/i915/gt/selftest_timeline.c if (!state.i915) i915 139 drivers/gpu/drm/i915/gt/selftest_timeline.c mutex_lock(&state.i915->drm.struct_mutex); i915 152 drivers/gpu/drm/i915/gt/selftest_timeline.c mutex_unlock(&state.i915->drm.struct_mutex); i915 155 drivers/gpu/drm/i915/gt/selftest_timeline.c drm_dev_put(&state.i915->drm); i915 424 drivers/gpu/drm/i915/gt/selftest_timeline.c if (INTEL_GEN(rq->i915) >= 8) { i915 429 drivers/gpu/drm/i915/gt/selftest_timeline.c } else if (INTEL_GEN(rq->i915) >= 4) { i915 452 drivers/gpu/drm/i915/gt/selftest_timeline.c lockdep_assert_held(&tl->gt->i915->drm.struct_mutex); /* lazy rq refs */ i915 478 drivers/gpu/drm/i915/gt/selftest_timeline.c checked_intel_timeline_create(struct drm_i915_private *i915) i915 482 drivers/gpu/drm/i915/gt/selftest_timeline.c tl = intel_timeline_create(&i915->gt, NULL); i915 499 drivers/gpu/drm/i915/gt/selftest_timeline.c struct drm_i915_private *i915 = arg; i915 518 drivers/gpu/drm/i915/gt/selftest_timeline.c mutex_lock(&i915->drm.struct_mutex); i915 519 drivers/gpu/drm/i915/gt/selftest_timeline.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 522 drivers/gpu/drm/i915/gt/selftest_timeline.c for_each_engine(engine, i915, id) { i915 530 drivers/gpu/drm/i915/gt/selftest_timeline.c tl = checked_intel_timeline_create(i915); i915 548 drivers/gpu/drm/i915/gt/selftest_timeline.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 562 drivers/gpu/drm/i915/gt/selftest_timeline.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 563 drivers/gpu/drm/i915/gt/selftest_timeline.c mutex_unlock(&i915->drm.struct_mutex); i915 574 drivers/gpu/drm/i915/gt/selftest_timeline.c struct drm_i915_private *i915 = arg; i915 594 drivers/gpu/drm/i915/gt/selftest_timeline.c mutex_lock(&i915->drm.struct_mutex); i915 595 drivers/gpu/drm/i915/gt/selftest_timeline.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 599 drivers/gpu/drm/i915/gt/selftest_timeline.c for_each_engine(engine, i915, id) { i915 606 drivers/gpu/drm/i915/gt/selftest_timeline.c tl = checked_intel_timeline_create(i915); i915 624 drivers/gpu/drm/i915/gt/selftest_timeline.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 638 drivers/gpu/drm/i915/gt/selftest_timeline.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 639 drivers/gpu/drm/i915/gt/selftest_timeline.c mutex_unlock(&i915->drm.struct_mutex); i915 649 drivers/gpu/drm/i915/gt/selftest_timeline.c struct drm_i915_private *i915 = arg; i915 661 drivers/gpu/drm/i915/gt/selftest_timeline.c mutex_lock(&i915->drm.struct_mutex); i915 662 drivers/gpu/drm/i915/gt/selftest_timeline.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 664 drivers/gpu/drm/i915/gt/selftest_timeline.c tl = intel_timeline_create(&i915->gt, NULL); i915 676 drivers/gpu/drm/i915/gt/selftest_timeline.c for_each_engine(engine, i915, id) { i915 746 drivers/gpu/drm/i915/gt/selftest_timeline.c i915_retire_requests(i915); /* recycle HWSP */ i915 750 drivers/gpu/drm/i915/gt/selftest_timeline.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 757 drivers/gpu/drm/i915/gt/selftest_timeline.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 758 drivers/gpu/drm/i915/gt/selftest_timeline.c mutex_unlock(&i915->drm.struct_mutex); i915 765 drivers/gpu/drm/i915/gt/selftest_timeline.c struct drm_i915_private *i915 = arg; i915 778 drivers/gpu/drm/i915/gt/selftest_timeline.c mutex_lock(&i915->drm.struct_mutex); i915 779 drivers/gpu/drm/i915/gt/selftest_timeline.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 782 drivers/gpu/drm/i915/gt/selftest_timeline.c for_each_engine(engine, i915, id) { i915 792 drivers/gpu/drm/i915/gt/selftest_timeline.c tl = checked_intel_timeline_create(i915); i915 827 drivers/gpu/drm/i915/gt/selftest_timeline.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 828 drivers/gpu/drm/i915/gt/selftest_timeline.c mutex_unlock(&i915->drm.struct_mutex); i915 833 drivers/gpu/drm/i915/gt/selftest_timeline.c int intel_timeline_live_selftests(struct drm_i915_private *i915) i915 842 drivers/gpu/drm/i915/gt/selftest_timeline.c if (intel_gt_is_wedged(&i915->gt)) i915 845 drivers/gpu/drm/i915/gt/selftest_timeline.c return i915_live_subtests(tests, i915); i915 37 drivers/gpu/drm/i915/gt/selftest_workarounds.c reference_lists_init(struct drm_i915_private *i915, struct wa_lists *lists) i915 45 drivers/gpu/drm/i915/gt/selftest_workarounds.c gt_init_workarounds(i915, &lists->gt_wa_list); i915 48 drivers/gpu/drm/i915/gt/selftest_workarounds.c for_each_engine(engine, i915, id) { i915 62 drivers/gpu/drm/i915/gt/selftest_workarounds.c reference_lists_fini(struct drm_i915_private *i915, struct wa_lists *lists) i915 67 drivers/gpu/drm/i915/gt/selftest_workarounds.c for_each_engine(engine, i915, id) i915 84 drivers/gpu/drm/i915/gt/selftest_workarounds.c result = i915_gem_object_create_internal(engine->i915, PAGE_SIZE); i915 124 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (INTEL_GEN(ctx->i915) >= 8) i915 194 drivers/gpu/drm/i915/gt/selftest_workarounds.c intel_wedge_on_timeout(&wedge, &ctx->i915->gt, HZ / 5) /* safety net! */ i915 197 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (intel_gt_is_wedged(&ctx->i915->gt)) i915 249 drivers/gpu/drm/i915/gt/selftest_workarounds.c ctx = kernel_context(engine->i915); i915 259 drivers/gpu/drm/i915/gt/selftest_workarounds.c with_intel_runtime_pm(&engine->i915->runtime_pm, wakeref) i915 289 drivers/gpu/drm/i915/gt/selftest_workarounds.c struct drm_i915_private *i915 = engine->i915; i915 298 drivers/gpu/drm/i915/gt/selftest_workarounds.c ctx = kernel_context(i915); i915 316 drivers/gpu/drm/i915/gt/selftest_workarounds.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) i915 333 drivers/gpu/drm/i915/gt/selftest_workarounds.c tmp = kernel_context(i915); i915 361 drivers/gpu/drm/i915/gt/selftest_workarounds.c obj = i915_gem_object_create_internal(ctx->i915, 16 * PAGE_SIZE); i915 397 drivers/gpu/drm/i915/gt/selftest_workarounds.c enum intel_platform platform = INTEL_INFO(engine->i915)->platform; i915 497 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (INTEL_GEN(ctx->i915) >= 8) i915 582 drivers/gpu/drm/i915/gt/selftest_workarounds.c intel_gt_set_wedged(&ctx->i915->gt); i915 671 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (igt_flush_test(ctx->i915, I915_WAIT_LOCKED)) i915 682 drivers/gpu/drm/i915/gt/selftest_workarounds.c struct drm_i915_private *i915 = arg; i915 692 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (INTEL_GEN(i915) < 7) /* minimum requirement for LRI, SRM, LRM */ i915 695 drivers/gpu/drm/i915/gt/selftest_workarounds.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 697 drivers/gpu/drm/i915/gt/selftest_workarounds.c mutex_unlock(&i915->drm.struct_mutex); i915 698 drivers/gpu/drm/i915/gt/selftest_workarounds.c file = mock_file(i915); i915 699 drivers/gpu/drm/i915/gt/selftest_workarounds.c mutex_lock(&i915->drm.struct_mutex); i915 705 drivers/gpu/drm/i915/gt/selftest_workarounds.c ctx = live_context(i915, file); i915 711 drivers/gpu/drm/i915/gt/selftest_workarounds.c for_each_engine(engine, i915, id) { i915 721 drivers/gpu/drm/i915/gt/selftest_workarounds.c mutex_unlock(&i915->drm.struct_mutex); i915 722 drivers/gpu/drm/i915/gt/selftest_workarounds.c mock_file_free(i915, file); i915 723 drivers/gpu/drm/i915/gt/selftest_workarounds.c mutex_lock(&i915->drm.struct_mutex); i915 725 drivers/gpu/drm/i915/gt/selftest_workarounds.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 731 drivers/gpu/drm/i915/gt/selftest_workarounds.c struct drm_i915_private *i915 = arg; i915 732 drivers/gpu/drm/i915/gt/selftest_workarounds.c struct intel_engine_cs *engine = i915->engine[RCS0]; i915 740 drivers/gpu/drm/i915/gt/selftest_workarounds.c igt_global_reset_lock(&i915->gt); i915 742 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (intel_has_reset_engine(i915)) { i915 750 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (intel_has_gpu_reset(i915)) { i915 759 drivers/gpu/drm/i915/gt/selftest_workarounds.c igt_global_reset_unlock(&i915->gt); i915 776 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (INTEL_GEN(ctx->i915) >= 8) i915 873 drivers/gpu/drm/i915/gt/selftest_workarounds.c static bool find_reg(struct drm_i915_private *i915, i915 881 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (INTEL_INFO(i915)->gen_mask & tbl->gen_mask && i915 890 drivers/gpu/drm/i915/gt/selftest_workarounds.c static bool pardon_reg(struct drm_i915_private *i915, i915_reg_t reg) i915 898 drivers/gpu/drm/i915/gt/selftest_workarounds.c return find_reg(i915, reg, pardon, ARRAY_SIZE(pardon)); i915 904 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (a != b && !pardon_reg(engine->i915, reg)) { i915 913 drivers/gpu/drm/i915/gt/selftest_workarounds.c static bool writeonly_reg(struct drm_i915_private *i915, i915_reg_t reg) i915 920 drivers/gpu/drm/i915/gt/selftest_workarounds.c return find_reg(i915, reg, wo, ARRAY_SIZE(wo)); i915 926 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (a == b && !writeonly_reg(engine->i915, reg)) { i915 976 drivers/gpu/drm/i915/gt/selftest_workarounds.c struct drm_i915_private *i915 = arg; i915 990 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (!intel_engines_has_context_isolation(i915)) i915 993 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (!i915->kernel_context->vm) i915 999 drivers/gpu/drm/i915/gt/selftest_workarounds.c c = kernel_context(i915); i915 1023 drivers/gpu/drm/i915/gt/selftest_workarounds.c for_each_engine(engine, i915, id) { i915 1077 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 1087 drivers/gpu/drm/i915/gt/selftest_workarounds.c struct drm_i915_private *i915 = ctx->i915; i915 1092 drivers/gpu/drm/i915/gt/selftest_workarounds.c ok &= wa_list_verify(&i915->uncore, &lists->gt_wa_list, str); i915 1112 drivers/gpu/drm/i915/gt/selftest_workarounds.c struct drm_i915_private *i915 = arg; i915 1118 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (!intel_has_gpu_reset(i915)) i915 1121 drivers/gpu/drm/i915/gt/selftest_workarounds.c ctx = kernel_context(i915); i915 1129 drivers/gpu/drm/i915/gt/selftest_workarounds.c igt_global_reset_lock(&i915->gt); i915 1130 drivers/gpu/drm/i915/gt/selftest_workarounds.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 1132 drivers/gpu/drm/i915/gt/selftest_workarounds.c reference_lists_init(i915, &lists); i915 1138 drivers/gpu/drm/i915/gt/selftest_workarounds.c intel_gt_reset(&i915->gt, ALL_ENGINES, "live_workarounds"); i915 1145 drivers/gpu/drm/i915/gt/selftest_workarounds.c reference_lists_fini(i915, &lists); i915 1146 drivers/gpu/drm/i915/gt/selftest_workarounds.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 1147 drivers/gpu/drm/i915/gt/selftest_workarounds.c igt_global_reset_unlock(&i915->gt); i915 1155 drivers/gpu/drm/i915/gt/selftest_workarounds.c struct drm_i915_private *i915 = arg; i915 1165 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (!intel_has_reset_engine(i915)) i915 1168 drivers/gpu/drm/i915/gt/selftest_workarounds.c ctx = kernel_context(i915); i915 1172 drivers/gpu/drm/i915/gt/selftest_workarounds.c igt_global_reset_lock(&i915->gt); i915 1173 drivers/gpu/drm/i915/gt/selftest_workarounds.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 1175 drivers/gpu/drm/i915/gt/selftest_workarounds.c reference_lists_init(i915, &lists); i915 1230 drivers/gpu/drm/i915/gt/selftest_workarounds.c reference_lists_fini(i915, &lists); i915 1231 drivers/gpu/drm/i915/gt/selftest_workarounds.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 1232 drivers/gpu/drm/i915/gt/selftest_workarounds.c igt_global_reset_unlock(&i915->gt); i915 1235 drivers/gpu/drm/i915/gt/selftest_workarounds.c igt_flush_test(i915, I915_WAIT_LOCKED); i915 1240 drivers/gpu/drm/i915/gt/selftest_workarounds.c int intel_workarounds_live_selftests(struct drm_i915_private *i915) i915 1251 drivers/gpu/drm/i915/gt/selftest_workarounds.c if (intel_gt_is_wedged(&i915->gt)) i915 1254 drivers/gpu/drm/i915/gt/selftest_workarounds.c mutex_lock(&i915->drm.struct_mutex); i915 1255 drivers/gpu/drm/i915/gt/selftest_workarounds.c err = i915_subtests(tests, i915); i915 1256 drivers/gpu/drm/i915/gt/selftest_workarounds.c mutex_unlock(&i915->drm.struct_mutex); i915 41 drivers/gpu/drm/i915/gt/uc/intel_guc.c if (INTEL_GEN(gt->i915) >= 11) { i915 61 drivers/gpu/drm/i915/gt/uc/intel_guc.c struct drm_i915_private *i915 = guc_to_gt(guc)->i915; i915 72 drivers/gpu/drm/i915/gt/uc/intel_guc.c if (INTEL_GEN(i915) >= 11) { i915 305 drivers/gpu/drm/i915/gt/uc/intel_guc.c DRM_DEV_DEBUG_DRIVER(gt->i915->drm.dev, "failed with %d\n", ret); i915 431 drivers/gpu/drm/i915/gt/uc/intel_guc.c struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915; i915 599 drivers/gpu/drm/i915/gt/uc/intel_guc.c obj = i915_gem_object_create_shmem(gt->i915, size); i915 70 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915; i915 24 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c struct drm_i915_private *i915 = guc_to_gt(guc)->i915; i915 26 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c intel_uc_fw_init_early(&guc->fw, INTEL_UC_FW_TYPE_GUC, HAS_GT_UC(i915), i915 27 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c INTEL_INFO(i915)->platform, INTEL_REVID(i915)); i915 42 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c if (IS_GEN9_LP(uncore->i915)) i915 47 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c if (IS_GEN(uncore->i915, 9)) { i915 195 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c dev_notice_ratelimited(guc_to_gt(log_to_guc(log))->i915->drm.dev, i915 369 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915; i915 416 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915; i915 512 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915; i915 610 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c struct drm_i915_private *i915 = guc_to_gt(guc)->i915; i915 619 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) i915 629 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c struct drm_i915_private *i915 = guc_to_gt(guc)->i915; i915 632 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c intel_synchronize_irq(i915); i915 484 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c struct drm_i915_private *i915 = vma->vm->i915; i915 487 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c intel_uncore_posting_read_fw(&i915->uncore, GUC_STATUS); i915 1007 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c struct intel_rps *rps = >->i915->gt_pm.rps; i915 1017 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c for_each_engine(engine, gt->i915, id) i915 1053 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c struct intel_rps *rps = >->i915->gt_pm.rps; i915 1065 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c for_each_engine(engine, gt->i915, id) i915 1122 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c err = i915_inject_load_error(gt->i915, -ENXIO); i915 1148 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c for_each_engine(engine, gt->i915, id) { i915 14 drivers/gpu/drm/i915/gt/uc/intel_huc.c struct drm_i915_private *i915 = huc_to_gt(huc)->i915; i915 18 drivers/gpu/drm/i915/gt/uc/intel_huc.c if (INTEL_GEN(i915) >= 11) { i915 38 drivers/gpu/drm/i915/gt/uc/intel_huc.c err = i915_inject_load_error(gt->i915, -ENXIO); i915 80 drivers/gpu/drm/i915/gt/uc/intel_huc.c struct drm_i915_private *i915 = huc_to_gt(huc)->i915; i915 102 drivers/gpu/drm/i915/gt/uc/intel_huc.c DRM_DEV_DEBUG_DRIVER(i915->drm.dev, "failed with %d\n", err); i915 137 drivers/gpu/drm/i915/gt/uc/intel_huc.c ret = i915_inject_load_error(gt->i915, -ENXIO); i915 163 drivers/gpu/drm/i915/gt/uc/intel_huc.c i915_probe_error(gt->i915, "HuC: Authentication failed %d\n", ret); i915 188 drivers/gpu/drm/i915/gt/uc/intel_huc.c with_intel_runtime_pm(>->i915->runtime_pm, wakeref) i915 35 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c struct drm_i915_private *i915 = gt->i915; i915 39 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c INTEL_INFO(i915)->platform, INTEL_REVID(i915)); i915 23 drivers/gpu/drm/i915/gt/uc/intel_uc.c ret = i915_inject_load_error(gt->i915, -ENXIO); i915 43 drivers/gpu/drm/i915/gt/uc/intel_uc.c struct drm_i915_private *i915 = uc_to_gt(uc)->i915; i915 45 drivers/gpu/drm/i915/gt/uc/intel_uc.c DRM_DEV_DEBUG_DRIVER(i915->drm.dev, i915 63 drivers/gpu/drm/i915/gt/uc/intel_uc.c dev_info(i915->drm.dev, i915 69 drivers/gpu/drm/i915/gt/uc/intel_uc.c dev_info(i915->drm.dev, i915 75 drivers/gpu/drm/i915/gt/uc/intel_uc.c dev_info(i915->drm.dev, i915 81 drivers/gpu/drm/i915/gt/uc/intel_uc.c dev_info(i915->drm.dev, i915 158 drivers/gpu/drm/i915/gt/uc/intel_uc.c struct drm_i915_private *i915 = guc_to_gt(guc)->i915; i915 166 drivers/gpu/drm/i915/gt/uc/intel_uc.c spin_lock_irq(&i915->irq_lock); i915 168 drivers/gpu/drm/i915/gt/uc/intel_uc.c spin_unlock_irq(&i915->irq_lock); i915 195 drivers/gpu/drm/i915/gt/uc/intel_uc.c struct drm_i915_private *i915 = guc_to_gt(guc)->i915; i915 200 drivers/gpu/drm/i915/gt/uc/intel_uc.c ret = i915_inject_load_error(i915, -ENXIO); i915 218 drivers/gpu/drm/i915/gt/uc/intel_uc.c spin_lock_irq(&i915->irq_lock); i915 220 drivers/gpu/drm/i915/gt/uc/intel_uc.c spin_unlock_irq(&i915->irq_lock); i915 266 drivers/gpu/drm/i915/gt/uc/intel_uc.c struct drm_i915_private *i915 = uc_to_gt(uc)->i915; i915 272 drivers/gpu/drm/i915/gt/uc/intel_uc.c err = intel_uc_fw_fetch(&uc->guc.fw, i915); i915 277 drivers/gpu/drm/i915/gt/uc/intel_uc.c intel_uc_fw_fetch(&uc->huc.fw, i915); i915 354 drivers/gpu/drm/i915/gt/uc/intel_uc.c u32 base = intel_wopcm_guc_base(>->i915->wopcm); i915 355 drivers/gpu/drm/i915/gt/uc/intel_uc.c u32 size = intel_wopcm_guc_size(>->i915->wopcm); i915 361 drivers/gpu/drm/i915/gt/uc/intel_uc.c i915_probe_error(gt->i915, "Unsuccessful WOPCM partitioning\n"); i915 371 drivers/gpu/drm/i915/gt/uc/intel_uc.c err = i915_inject_load_error(gt->i915, -ENXIO); i915 392 drivers/gpu/drm/i915/gt/uc/intel_uc.c i915_probe_error(gt->i915, "Failed to init uC WOPCM registers!\n"); i915 393 drivers/gpu/drm/i915/gt/uc/intel_uc.c i915_probe_error(gt->i915, "%s(%#x)=%#x\n", "DMA_GUC_WOPCM_OFFSET", i915 396 drivers/gpu/drm/i915/gt/uc/intel_uc.c i915_probe_error(gt->i915, "%s(%#x)=%#x\n", "GUC_WOPCM_SIZE", i915 414 drivers/gpu/drm/i915/gt/uc/intel_uc.c struct drm_i915_private *i915 = uc_to_gt(uc)->i915; i915 446 drivers/gpu/drm/i915/gt/uc/intel_uc.c if (IS_GEN(i915, 9)) i915 491 drivers/gpu/drm/i915/gt/uc/intel_uc.c dev_info(i915->drm.dev, "%s firmware %s version %u.%u %s:%s\n", i915 498 drivers/gpu/drm/i915/gt/uc/intel_uc.c dev_info(i915->drm.dev, "%s firmware %s version %u.%u %s:%s\n", i915 519 drivers/gpu/drm/i915/gt/uc/intel_uc.c dev_notice(i915->drm.dev, "GuC is uninitialized\n"); i915 524 drivers/gpu/drm/i915/gt/uc/intel_uc.c i915_probe_error(i915, "GuC initialization failed %d\n", ret); i915 584 drivers/gpu/drm/i915/gt/uc/intel_uc.c with_intel_runtime_pm(&uc_to_gt(uc)->i915->runtime_pm, wakeref) i915 29 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c DRM_DEV_DEBUG_DRIVER(__uc_fw_to_gt(uc_fw)->i915->drm.dev, i915 216 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c struct drm_i915_private *i915, i915 221 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c if (i915_inject_load_error(i915, e)) { i915 225 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c } else if (i915_inject_load_error(i915, e)) { i915 230 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c } else if (i915_inject_load_error(i915, e)) { i915 234 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c } else if (uc_fw->major_ver_wanted && i915_inject_load_error(i915, e)) { i915 239 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c } else if (uc_fw->minor_ver_wanted && i915_inject_load_error(i915, e)) { i915 243 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c } else if (user && i915_inject_load_error(i915, e)) { i915 260 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw, struct drm_i915_private *i915) i915 262 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c struct device *dev = i915->drm.dev; i915 269 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c GEM_BUG_ON(!i915->wopcm.size); i915 272 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c err = i915_inject_load_error(i915, -ENXIO); i915 276 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c __force_fw_fetch_failures(uc_fw, i915, -EINVAL); i915 277 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c __force_fw_fetch_failures(uc_fw, i915, -ESTALE); i915 331 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c if (unlikely(size >= i915->wopcm.size)) { i915 334 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c size, (size_t)i915->wopcm.size); i915 372 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size); i915 448 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c ret = i915_inject_load_error(gt->i915, -ETIMEDOUT); i915 478 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c dev_err(gt->i915->drm.dev, "DMA for %s fw failed, DMA_CTRL=%u\n", i915 509 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c err = i915_inject_load_error(gt->i915, -ENOEXEC); i915 527 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c i915_probe_error(gt->i915, "Failed to load %s firmware %s (%d)\n", i915 232 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw, struct drm_i915_private *i915); i915 61 drivers/gpu/drm/i915/gvt/debugfs.c struct drm_i915_private *i915 = gvt->dev_priv; i915 66 drivers/gpu/drm/i915/gvt/debugfs.c preg = intel_uncore_read_notrace(&i915->uncore, _MMIO(offset)); i915 71 drivers/gpu/drm/i915/gvt/firmware.c struct drm_i915_private *i915 = gvt->dev_priv; i915 73 drivers/gpu/drm/i915/gvt/firmware.c *(u32 *)(data + offset) = intel_uncore_read_notrace(&i915->uncore, i915 346 drivers/gpu/drm/i915/gvt/gvt.h static inline struct intel_gvt *to_gvt(struct drm_i915_private *i915) i915 348 drivers/gpu/drm/i915/gvt/gvt.h return i915->gvt; i915 309 drivers/gpu/drm/i915/gvt/scheduler.c if (IS_GEN(req->i915, 9) && is_inhibit_context(req->hw_context)) i915 1236 drivers/gpu/drm/i915/gvt/scheduler.c struct drm_i915_private *i915 = vgpu->gvt->dev_priv; i915 1243 drivers/gpu/drm/i915/gvt/scheduler.c mutex_lock(&i915->drm.struct_mutex); i915 1245 drivers/gpu/drm/i915/gvt/scheduler.c ctx = i915_gem_context_create_kernel(i915, I915_PRIORITY_MAX); i915 1255 drivers/gpu/drm/i915/gvt/scheduler.c for_each_engine(engine, i915, i) { i915 1267 drivers/gpu/drm/i915/gvt/scheduler.c if (!USES_GUC_SUBMISSION(i915)) { /* Max ring buffer size */ i915 1299 drivers/gpu/drm/i915/gvt/scheduler.c mutex_unlock(&i915->drm.struct_mutex); i915 1304 drivers/gpu/drm/i915/gvt/scheduler.c for_each_engine(engine, i915, i) { i915 1313 drivers/gpu/drm/i915/gvt/scheduler.c mutex_unlock(&i915->drm.struct_mutex); i915 15 drivers/gpu/drm/i915/i915_active.c #define BKL(ref) (&(ref)->i915->drm.struct_mutex) i915 240 drivers/gpu/drm/i915/i915_active.c void __i915_active_init(struct drm_i915_private *i915, i915 248 drivers/gpu/drm/i915/i915_active.c ref->i915 = i915; i915 455 drivers/gpu/drm/i915/i915_active.c i915_active_request_raw(active, &rq->i915->drm.struct_mutex); i915 588 drivers/gpu/drm/i915/i915_active.c struct drm_i915_private *i915 = engine->i915; i915 601 drivers/gpu/drm/i915/i915_active.c for_each_engine_masked(engine, i915, mask, tmp) { i915 361 drivers/gpu/drm/i915/i915_active.h void __i915_active_init(struct drm_i915_private *i915, i915 366 drivers/gpu/drm/i915/i915_active.h #define i915_active_init(i915, ref, active, retire) do { \ i915 369 drivers/gpu/drm/i915/i915_active.h __i915_active_init(i915, ref, active, retire, &__key); \ i915 47 drivers/gpu/drm/i915/i915_active_types.h struct drm_i915_private *i915; i915 942 drivers/gpu/drm/i915/i915_cmd_parser.c if (!IS_GEN(engine->i915, 7) && !(IS_GEN(engine->i915, 9) && i915 948 drivers/gpu/drm/i915/i915_cmd_parser.c if (IS_HASWELL(engine->i915)) { i915 957 drivers/gpu/drm/i915/i915_cmd_parser.c if (IS_HASWELL(engine->i915)) { i915 973 drivers/gpu/drm/i915/i915_cmd_parser.c if (IS_GEN(engine->i915, 9)) { i915 981 drivers/gpu/drm/i915/i915_cmd_parser.c } else if (IS_HASWELL(engine->i915)) { i915 989 drivers/gpu/drm/i915/i915_cmd_parser.c if (IS_GEN(engine->i915, 9)) { i915 993 drivers/gpu/drm/i915/i915_cmd_parser.c } else if (IS_HASWELL(engine->i915)) { i915 1319 drivers/gpu/drm/i915/i915_cmd_parser.c if (CMDPARSER_USES_GGTT(ctx->i915)) { i915 1374 drivers/gpu/drm/i915/i915_cmd_parser.c if (CMDPARSER_USES_GGTT(ctx->i915)) i915 309 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915) i915 314 drivers/gpu/drm/i915/i915_debugfs.c list_for_each_entry(ctx, &i915->contexts.list, link) { i915 356 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = node_to_i915(m->private); i915 360 drivers/gpu/drm/i915/i915_debugfs.c i915->mm.shrink_count, i915 361 drivers/gpu/drm/i915/i915_debugfs.c atomic_read(&i915->mm.free_count), i915 362 drivers/gpu/drm/i915/i915_debugfs.c i915->mm.shrink_memory); i915 366 drivers/gpu/drm/i915/i915_debugfs.c ret = mutex_lock_interruptible(&i915->drm.struct_mutex); i915 370 drivers/gpu/drm/i915/i915_debugfs.c print_context_stats(m, i915); i915 371 drivers/gpu/drm/i915/i915_debugfs.c mutex_unlock(&i915->drm.struct_mutex); i915 648 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = node_to_i915(m->private); i915 651 drivers/gpu/drm/i915/i915_debugfs.c seq_printf(m, "Total fences = %d\n", i915->ggtt.num_fences); i915 654 drivers/gpu/drm/i915/i915_debugfs.c for (i = 0; i < i915->ggtt.num_fences; i++) { i915 655 drivers/gpu/drm/i915/i915_debugfs.c struct i915_fence_reg *reg = &i915->ggtt.fence_regs[i]; i915 710 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = inode->i_private; i915 715 drivers/gpu/drm/i915/i915_debugfs.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) i915 716 drivers/gpu/drm/i915/i915_debugfs.c gpu = i915_capture_gpu_state(i915); i915 744 drivers/gpu/drm/i915/i915_debugfs.c i915_reset_error_state(error->i915); i915 1025 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = node_to_i915(m->private); i915 1026 drivers/gpu/drm/i915/i915_debugfs.c struct intel_gt *gt = &i915->gt; i915 1053 drivers/gpu/drm/i915/i915_debugfs.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) { i915 1054 drivers/gpu/drm/i915/i915_debugfs.c for_each_engine(engine, i915, id) { i915 1069 drivers/gpu/drm/i915/i915_debugfs.c i915_instdone_info(i915, m, &instdone); i915 1072 drivers/gpu/drm/i915/i915_debugfs.c i915_instdone_info(i915, m, i915 1082 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = node_to_i915(m->private); i915 1083 drivers/gpu/drm/i915/i915_debugfs.c struct intel_uncore *uncore = &i915->uncore; i915 1140 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = node_to_i915(m->private); i915 1141 drivers/gpu/drm/i915/i915_debugfs.c struct intel_uncore *uncore = &i915->uncore; i915 2032 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = inode->i_private; i915 2033 drivers/gpu/drm/i915/i915_debugfs.c struct intel_guc *guc = &i915->gt.uc.guc; i915 2058 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = inode->i_private; i915 2059 drivers/gpu/drm/i915/i915_debugfs.c struct intel_guc *guc = &i915->gt.uc.guc; i915 2816 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = node_to_i915(m->private); i915 2818 drivers/gpu/drm/i915/i915_debugfs.c seq_printf(m, "seeks = %d\n", i915->mm.shrinker.seeks); i915 2819 drivers/gpu/drm/i915/i915_debugfs.c seq_printf(m, "batch = %lu\n", i915->mm.shrinker.batch); i915 2875 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = node_to_i915(m->private); i915 2878 drivers/gpu/drm/i915/i915_debugfs.c for_each_uabi_engine(engine, i915) { i915 3543 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = data; i915 3544 drivers/gpu/drm/i915/i915_debugfs.c int ret = intel_gt_terminally_wedged(&i915->gt); i915 3561 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = data; i915 3564 drivers/gpu/drm/i915/i915_debugfs.c wait_event(i915->gt.reset.queue, i915 3565 drivers/gpu/drm/i915/i915_debugfs.c !test_bit(I915_RESET_BACKOFF, &i915->gt.reset.flags)); i915 3567 drivers/gpu/drm/i915/i915_debugfs.c intel_gt_handle_error(&i915->gt, val, I915_ERROR_CAPTURE, i915 3605 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = data; i915 3611 drivers/gpu/drm/i915/i915_debugfs.c wait_for(intel_engines_are_idle(&i915->gt), i915 3613 drivers/gpu/drm/i915/i915_debugfs.c intel_gt_set_wedged(&i915->gt); i915 3620 drivers/gpu/drm/i915/i915_debugfs.c ret = mutex_lock_interruptible(&i915->drm.struct_mutex); i915 3631 drivers/gpu/drm/i915/i915_debugfs.c ret = i915_gem_wait_for_idle(i915, i915 3637 drivers/gpu/drm/i915/i915_debugfs.c ret = i915_gem_wait_for_idle(i915, i915 3643 drivers/gpu/drm/i915/i915_debugfs.c i915_retire_requests(i915); i915 3645 drivers/gpu/drm/i915/i915_debugfs.c mutex_unlock(&i915->drm.struct_mutex); i915 3648 drivers/gpu/drm/i915/i915_debugfs.c ret = intel_gt_pm_wait_for_idle(&i915->gt); i915 3651 drivers/gpu/drm/i915/i915_debugfs.c if (val & DROP_RESET_ACTIVE && intel_gt_terminally_wedged(&i915->gt)) i915 3652 drivers/gpu/drm/i915/i915_debugfs.c intel_gt_handle_error(&i915->gt, ALL_ENGINES, 0, NULL); i915 3656 drivers/gpu/drm/i915/i915_debugfs.c i915_gem_shrink(i915, LONG_MAX, NULL, I915_SHRINK_BOUND); i915 3659 drivers/gpu/drm/i915/i915_debugfs.c i915_gem_shrink(i915, LONG_MAX, NULL, I915_SHRINK_UNBOUND); i915 3662 drivers/gpu/drm/i915/i915_debugfs.c i915_gem_shrink_all(i915); i915 3666 drivers/gpu/drm/i915/i915_debugfs.c flush_delayed_work(&i915->gem.retire_work); i915 3667 drivers/gpu/drm/i915/i915_debugfs.c flush_work(&i915->gem.idle_work); i915 3671 drivers/gpu/drm/i915/i915_debugfs.c i915_gem_drain_freed_objects(i915); i915 3975 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = inode->i_private; i915 3977 drivers/gpu/drm/i915/i915_debugfs.c if (INTEL_GEN(i915) < 6) i915 3981 drivers/gpu/drm/i915/i915_debugfs.c (void *)(uintptr_t)intel_runtime_pm_get(&i915->runtime_pm); i915 3982 drivers/gpu/drm/i915/i915_debugfs.c intel_uncore_forcewake_user_get(&i915->uncore); i915 3989 drivers/gpu/drm/i915/i915_debugfs.c struct drm_i915_private *i915 = inode->i_private; i915 3991 drivers/gpu/drm/i915/i915_debugfs.c if (INTEL_GEN(i915) < 6) i915 3994 drivers/gpu/drm/i915/i915_debugfs.c intel_uncore_forcewake_user_put(&i915->uncore); i915 3995 drivers/gpu/drm/i915/i915_debugfs.c intel_runtime_pm_put(&i915->runtime_pm, i915 285 drivers/gpu/drm/i915/i915_drv.c static int i915_resume_switcheroo(struct drm_i915_private *i915); i915 286 drivers/gpu/drm/i915/i915_drv.c static int i915_suspend_switcheroo(struct drm_i915_private *i915, i915 291 drivers/gpu/drm/i915/i915_drv.c struct drm_i915_private *i915 = pdev_to_i915(pdev); i915 294 drivers/gpu/drm/i915/i915_drv.c if (!i915) { i915 301 drivers/gpu/drm/i915/i915_drv.c i915->drm.switch_power_state = DRM_SWITCH_POWER_CHANGING; i915 304 drivers/gpu/drm/i915/i915_drv.c i915_resume_switcheroo(i915); i915 305 drivers/gpu/drm/i915/i915_drv.c i915->drm.switch_power_state = DRM_SWITCH_POWER_ON; i915 308 drivers/gpu/drm/i915/i915_drv.c i915->drm.switch_power_state = DRM_SWITCH_POWER_CHANGING; i915 309 drivers/gpu/drm/i915/i915_drv.c i915_suspend_switcheroo(i915, pmm); i915 310 drivers/gpu/drm/i915/i915_drv.c i915->drm.switch_power_state = DRM_SWITCH_POWER_OFF; i915 316 drivers/gpu/drm/i915/i915_drv.c struct drm_i915_private *i915 = pdev_to_i915(pdev); i915 323 drivers/gpu/drm/i915/i915_drv.c return i915 && i915->drm.open_count == 0; i915 528 drivers/gpu/drm/i915/i915_drv.c static int vlv_alloc_s0ix_state(struct drm_i915_private *i915) i915 530 drivers/gpu/drm/i915/i915_drv.c if (!IS_VALLEYVIEW(i915)) i915 534 drivers/gpu/drm/i915/i915_drv.c i915->vlv_s0ix_state = kmalloc(sizeof(*i915->vlv_s0ix_state), i915 536 drivers/gpu/drm/i915/i915_drv.c if (!i915->vlv_s0ix_state) i915 542 drivers/gpu/drm/i915/i915_drv.c static void vlv_free_s0ix_state(struct drm_i915_private *i915) i915 544 drivers/gpu/drm/i915/i915_drv.c if (!i915->vlv_s0ix_state) i915 547 drivers/gpu/drm/i915/i915_drv.c kfree(i915->vlv_s0ix_state); i915 548 drivers/gpu/drm/i915/i915_drv.c i915->vlv_s0ix_state = NULL; i915 1512 drivers/gpu/drm/i915/i915_drv.c struct drm_i915_private *i915; i915 1515 drivers/gpu/drm/i915/i915_drv.c i915 = kzalloc(sizeof(*i915), GFP_KERNEL); i915 1516 drivers/gpu/drm/i915/i915_drv.c if (!i915) i915 1519 drivers/gpu/drm/i915/i915_drv.c err = drm_dev_init(&i915->drm, &driver, &pdev->dev); i915 1521 drivers/gpu/drm/i915/i915_drv.c kfree(i915); i915 1525 drivers/gpu/drm/i915/i915_drv.c i915->drm.dev_private = i915; i915 1527 drivers/gpu/drm/i915/i915_drv.c i915->drm.pdev = pdev; i915 1528 drivers/gpu/drm/i915/i915_drv.c pci_set_drvdata(pdev, i915); i915 1531 drivers/gpu/drm/i915/i915_drv.c device_info = mkwrite_device_info(i915); i915 1533 drivers/gpu/drm/i915/i915_drv.c RUNTIME_INFO(i915)->device_id = pdev->device; i915 1537 drivers/gpu/drm/i915/i915_drv.c return i915; i915 1540 drivers/gpu/drm/i915/i915_drv.c static void i915_driver_destroy(struct drm_i915_private *i915) i915 1542 drivers/gpu/drm/i915/i915_drv.c struct pci_dev *pdev = i915->drm.pdev; i915 1544 drivers/gpu/drm/i915/i915_drv.c drm_dev_fini(&i915->drm); i915 1545 drivers/gpu/drm/i915/i915_drv.c kfree(i915); i915 1628 drivers/gpu/drm/i915/i915_drv.c void i915_driver_remove(struct drm_i915_private *i915) i915 1630 drivers/gpu/drm/i915/i915_drv.c struct pci_dev *pdev = i915->drm.pdev; i915 1632 drivers/gpu/drm/i915/i915_drv.c disable_rpm_wakeref_asserts(&i915->runtime_pm); i915 1634 drivers/gpu/drm/i915/i915_drv.c i915_driver_unregister(i915); i915 1641 drivers/gpu/drm/i915/i915_drv.c intel_gt_set_wedged(&i915->gt); i915 1646 drivers/gpu/drm/i915/i915_drv.c i915_gem_suspend(i915); i915 1648 drivers/gpu/drm/i915/i915_drv.c drm_atomic_helper_shutdown(&i915->drm); i915 1650 drivers/gpu/drm/i915/i915_drv.c intel_gvt_driver_remove(i915); i915 1652 drivers/gpu/drm/i915/i915_drv.c intel_modeset_driver_remove(&i915->drm); i915 1654 drivers/gpu/drm/i915/i915_drv.c intel_bios_driver_remove(i915); i915 1659 drivers/gpu/drm/i915/i915_drv.c intel_csr_ucode_fini(i915); i915 1662 drivers/gpu/drm/i915/i915_drv.c cancel_delayed_work_sync(&i915->gt.hangcheck.work); i915 1663 drivers/gpu/drm/i915/i915_drv.c i915_reset_error_state(i915); i915 1665 drivers/gpu/drm/i915/i915_drv.c i915_gem_driver_remove(i915); i915 1667 drivers/gpu/drm/i915/i915_drv.c intel_power_domains_driver_remove(i915); i915 1669 drivers/gpu/drm/i915/i915_drv.c i915_driver_hw_remove(i915); i915 1671 drivers/gpu/drm/i915/i915_drv.c enable_rpm_wakeref_asserts(&i915->runtime_pm); i915 1699 drivers/gpu/drm/i915/i915_drv.c struct drm_i915_private *i915 = to_i915(dev); i915 1702 drivers/gpu/drm/i915/i915_drv.c ret = i915_gem_open(i915, file); i915 1769 drivers/gpu/drm/i915/i915_drv.c struct drm_i915_private *i915 = to_i915(dev); i915 1777 drivers/gpu/drm/i915/i915_drv.c i915_gem_suspend(i915); i915 1894 drivers/gpu/drm/i915/i915_drv.c i915_suspend_switcheroo(struct drm_i915_private *i915, pm_message_t state) i915 1902 drivers/gpu/drm/i915/i915_drv.c if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) i915 1905 drivers/gpu/drm/i915/i915_drv.c error = i915_drm_suspend(&i915->drm); i915 1909 drivers/gpu/drm/i915/i915_drv.c return i915_drm_suspend_late(&i915->drm, false); i915 2064 drivers/gpu/drm/i915/i915_drv.c static int i915_resume_switcheroo(struct drm_i915_private *i915) i915 2068 drivers/gpu/drm/i915/i915_drv.c if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) i915 2071 drivers/gpu/drm/i915/i915_drv.c ret = i915_drm_resume_early(&i915->drm); i915 2075 drivers/gpu/drm/i915/i915_drv.c return i915_drm_resume(&i915->drm); i915 2080 drivers/gpu/drm/i915/i915_drv.c struct drm_i915_private *i915 = kdev_to_i915(kdev); i915 2082 drivers/gpu/drm/i915/i915_drv.c if (!i915) { i915 2087 drivers/gpu/drm/i915/i915_drv.c if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) i915 2090 drivers/gpu/drm/i915/i915_drv.c return i915_drm_prepare(&i915->drm); i915 2095 drivers/gpu/drm/i915/i915_drv.c struct drm_i915_private *i915 = kdev_to_i915(kdev); i915 2097 drivers/gpu/drm/i915/i915_drv.c if (!i915) { i915 2102 drivers/gpu/drm/i915/i915_drv.c if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) i915 2105 drivers/gpu/drm/i915/i915_drv.c return i915_drm_suspend(&i915->drm); i915 2110 drivers/gpu/drm/i915/i915_drv.c struct drm_i915_private *i915 = kdev_to_i915(kdev); i915 2121 drivers/gpu/drm/i915/i915_drv.c if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) i915 2124 drivers/gpu/drm/i915/i915_drv.c return i915_drm_suspend_late(&i915->drm, false); i915 2129 drivers/gpu/drm/i915/i915_drv.c struct drm_i915_private *i915 = kdev_to_i915(kdev); i915 2131 drivers/gpu/drm/i915/i915_drv.c if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) i915 2134 drivers/gpu/drm/i915/i915_drv.c return i915_drm_suspend_late(&i915->drm, true); i915 2139 drivers/gpu/drm/i915/i915_drv.c struct drm_i915_private *i915 = kdev_to_i915(kdev); i915 2141 drivers/gpu/drm/i915/i915_drv.c if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) i915 2144 drivers/gpu/drm/i915/i915_drv.c return i915_drm_resume_early(&i915->drm); i915 2149 drivers/gpu/drm/i915/i915_drv.c struct drm_i915_private *i915 = kdev_to_i915(kdev); i915 2151 drivers/gpu/drm/i915/i915_drv.c if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) i915 2154 drivers/gpu/drm/i915/i915_drv.c return i915_drm_resume(&i915->drm); i915 2160 drivers/gpu/drm/i915/i915_drv.c struct drm_i915_private *i915 = kdev_to_i915(kdev); i915 2163 drivers/gpu/drm/i915/i915_drv.c if (i915->drm.switch_power_state != DRM_SWITCH_POWER_OFF) { i915 2164 drivers/gpu/drm/i915/i915_drv.c ret = i915_drm_suspend(&i915->drm); i915 2169 drivers/gpu/drm/i915/i915_drv.c ret = i915_gem_freeze(i915); i915 2178 drivers/gpu/drm/i915/i915_drv.c struct drm_i915_private *i915 = kdev_to_i915(kdev); i915 2181 drivers/gpu/drm/i915/i915_drv.c if (i915->drm.switch_power_state != DRM_SWITCH_POWER_OFF) { i915 2182 drivers/gpu/drm/i915/i915_drv.c ret = i915_drm_suspend_late(&i915->drm, true); i915 2187 drivers/gpu/drm/i915/i915_drv.c ret = i915_gem_freeze_late(i915); i915 2416 drivers/gpu/drm/i915/i915_drv.c static int vlv_wait_for_pw_status(struct drm_i915_private *i915, i915 2431 drivers/gpu/drm/i915/i915_drv.c intel_uncore_read_notrace(&i915->uncore, reg)) & mask) i915 1899 drivers/gpu/drm/i915/i915_drv.h IS_PLATFORM(const struct drm_i915_private *i915, enum intel_platform p) i915 1901 drivers/gpu/drm/i915/i915_drv.h const struct intel_runtime_info *info = RUNTIME_INFO(i915); i915 1911 drivers/gpu/drm/i915/i915_drv.h IS_SUBPLATFORM(const struct drm_i915_private *i915, i915 1914 drivers/gpu/drm/i915/i915_drv.h const struct intel_runtime_info *info = RUNTIME_INFO(i915); i915 2223 drivers/gpu/drm/i915/i915_drv.h void i915_driver_remove(struct drm_i915_private *i915); i915 2244 drivers/gpu/drm/i915/i915_drv.h void i915_gem_sanitize(struct drm_i915_private *i915); i915 2250 drivers/gpu/drm/i915/i915_drv.h static inline void i915_gem_drain_freed_objects(struct drm_i915_private *i915) i915 2259 drivers/gpu/drm/i915/i915_drv.h while (atomic_read(&i915->mm.free_count)) { i915 2260 drivers/gpu/drm/i915/i915_drv.h flush_work(&i915->mm.free_work); i915 2265 drivers/gpu/drm/i915/i915_drv.h static inline void i915_gem_drain_workqueue(struct drm_i915_private *i915) i915 2280 drivers/gpu/drm/i915/i915_drv.h flush_workqueue(i915->wq); i915 2282 drivers/gpu/drm/i915/i915_drv.h i915_gem_drain_freed_objects(i915); i915 2284 drivers/gpu/drm/i915/i915_drv.h drain_workqueue(i915->wq); i915 2334 drivers/gpu/drm/i915/i915_drv.h void i915_gem_init_mmio(struct drm_i915_private *i915); i915 2337 drivers/gpu/drm/i915/i915_drv.h void i915_gem_driver_register(struct drm_i915_private *i915); i915 2338 drivers/gpu/drm/i915/i915_drv.h void i915_gem_driver_unregister(struct drm_i915_private *i915); i915 2348 drivers/gpu/drm/i915/i915_drv.h int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file); i915 2409 drivers/gpu/drm/i915/i915_drv.h const char *i915_cache_level_str(struct drm_i915_private *i915, int type); i915 2490 drivers/gpu/drm/i915/i915_drv.h static inline int intel_hws_csb_write_index(struct drm_i915_private *i915) i915 2492 drivers/gpu/drm/i915/i915_drv.h if (INTEL_GEN(i915) >= 10) i915 2499 drivers/gpu/drm/i915/i915_drv.h i915_coherent_map_type(struct drm_i915_private *i915) i915 2501 drivers/gpu/drm/i915/i915_drv.h return HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC; i915 331 drivers/gpu/drm/i915/i915_gem.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 332 drivers/gpu/drm/i915/i915_gem.c struct i915_ggtt *ggtt = &i915->ggtt; i915 341 drivers/gpu/drm/i915/i915_gem.c ret = mutex_lock_interruptible(&i915->drm.struct_mutex); i915 345 drivers/gpu/drm/i915/i915_gem.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 362 drivers/gpu/drm/i915/i915_gem.c mutex_unlock(&i915->drm.struct_mutex); i915 417 drivers/gpu/drm/i915/i915_gem.c mutex_lock(&i915->drm.struct_mutex); i915 425 drivers/gpu/drm/i915/i915_gem.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 426 drivers/gpu/drm/i915/i915_gem.c mutex_unlock(&i915->drm.struct_mutex); i915 523 drivers/gpu/drm/i915/i915_gem.c struct drm_i915_private *i915 = to_i915(obj->base.dev); i915 524 drivers/gpu/drm/i915/i915_gem.c struct i915_ggtt *ggtt = &i915->ggtt; i915 525 drivers/gpu/drm/i915/i915_gem.c struct intel_runtime_pm *rpm = &i915->runtime_pm; i915 534 drivers/gpu/drm/i915/i915_gem.c ret = mutex_lock_interruptible(&i915->drm.struct_mutex); i915 572 drivers/gpu/drm/i915/i915_gem.c mutex_unlock(&i915->drm.struct_mutex); i915 637 drivers/gpu/drm/i915/i915_gem.c mutex_lock(&i915->drm.struct_mutex); i915 648 drivers/gpu/drm/i915/i915_gem.c mutex_unlock(&i915->drm.struct_mutex); i915 846 drivers/gpu/drm/i915/i915_gem.c void i915_gem_runtime_suspend(struct drm_i915_private *i915) i915 859 drivers/gpu/drm/i915/i915_gem.c &i915->ggtt.userfault_list, userfault_link) i915 867 drivers/gpu/drm/i915/i915_gem.c for (i = 0; i < i915->ggtt.num_fences; i++) { i915 868 drivers/gpu/drm/i915/i915_gem.c struct i915_fence_reg *reg = &i915->ggtt.fence_regs[i]; i915 891 drivers/gpu/drm/i915/i915_gem.c wait_for_timelines(struct drm_i915_private *i915, i915 894 drivers/gpu/drm/i915/i915_gem.c struct intel_gt_timelines *timelines = &i915->gt.timelines; i915 934 drivers/gpu/drm/i915/i915_gem.c int i915_gem_wait_for_idle(struct drm_i915_private *i915, i915 938 drivers/gpu/drm/i915/i915_gem.c if (!intel_gt_pm_is_awake(&i915->gt)) i915 945 drivers/gpu/drm/i915/i915_gem.c timeout = wait_for_timelines(i915, flags, timeout); i915 950 drivers/gpu/drm/i915/i915_gem.c lockdep_assert_held(&i915->drm.struct_mutex); i915 952 drivers/gpu/drm/i915/i915_gem.c i915_retire_requests(i915); i915 1066 drivers/gpu/drm/i915/i915_gem.c struct drm_i915_private *i915 = to_i915(dev); i915 1089 drivers/gpu/drm/i915/i915_gem.c i915->quirks & QUIRK_PIN_SWIZZLED_PAGES) { i915 1111 drivers/gpu/drm/i915/i915_gem.c spin_lock_irqsave(&i915->mm.obj_lock, flags); i915 1114 drivers/gpu/drm/i915/i915_gem.c list = &i915->mm.purge_list; i915 1116 drivers/gpu/drm/i915/i915_gem.c list = &i915->mm.shrink_list; i915 1119 drivers/gpu/drm/i915/i915_gem.c spin_unlock_irqrestore(&i915->mm.obj_lock, flags); i915 1136 drivers/gpu/drm/i915/i915_gem.c void i915_gem_sanitize(struct drm_i915_private *i915) i915 1142 drivers/gpu/drm/i915/i915_gem.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 1143 drivers/gpu/drm/i915/i915_gem.c intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL); i915 1151 drivers/gpu/drm/i915/i915_gem.c if (intel_gt_is_wedged(&i915->gt)) i915 1152 drivers/gpu/drm/i915/i915_gem.c intel_gt_unset_wedged(&i915->gt); i915 1162 drivers/gpu/drm/i915/i915_gem.c intel_gt_sanitize(&i915->gt, false); i915 1164 drivers/gpu/drm/i915/i915_gem.c intel_uncore_forcewake_put(&i915->uncore, FORCEWAKE_ALL); i915 1165 drivers/gpu/drm/i915/i915_gem.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 1180 drivers/gpu/drm/i915/i915_gem.c struct drm_i915_private *i915 = gt->i915; i915 1182 drivers/gpu/drm/i915/i915_gem.c if (IS_I830(i915)) { i915 1188 drivers/gpu/drm/i915/i915_gem.c } else if (IS_GEN(i915, 2)) { i915 1191 drivers/gpu/drm/i915/i915_gem.c } else if (IS_GEN(i915, 3)) { i915 1197 drivers/gpu/drm/i915/i915_gem.c int i915_gem_init_hw(struct drm_i915_private *i915) i915 1199 drivers/gpu/drm/i915/i915_gem.c struct intel_uncore *uncore = &i915->uncore; i915 1200 drivers/gpu/drm/i915/i915_gem.c struct intel_gt *gt = &i915->gt; i915 1203 drivers/gpu/drm/i915/i915_gem.c BUG_ON(!i915->kernel_context); i915 1213 drivers/gpu/drm/i915/i915_gem.c if (HAS_EDRAM(i915) && INTEL_GEN(i915) < 9) i915 1216 drivers/gpu/drm/i915/i915_gem.c if (IS_HASWELL(i915)) i915 1219 drivers/gpu/drm/i915/i915_gem.c IS_HSW_GT3(i915) ? i915 1246 drivers/gpu/drm/i915/i915_gem.c i915_probe_error(i915, "Enabling uc failed (%d)\n", ret); i915 1257 drivers/gpu/drm/i915/i915_gem.c static int __intel_engines_record_defaults(struct drm_i915_private *i915) i915 1273 drivers/gpu/drm/i915/i915_gem.c for_each_engine(engine, i915, id) { i915 1281 drivers/gpu/drm/i915/i915_gem.c ce = intel_context_create(i915->kernel_context, engine); i915 1304 drivers/gpu/drm/i915/i915_gem.c dev_notice(i915->drm.dev, i915 1319 drivers/gpu/drm/i915/i915_gem.c if (!i915_gem_load_power_context(i915)) { i915 1378 drivers/gpu/drm/i915/i915_gem.c intel_gt_set_wedged(&i915->gt); i915 1396 drivers/gpu/drm/i915/i915_gem.c i915_gem_init_scratch(struct drm_i915_private *i915, unsigned int size) i915 1398 drivers/gpu/drm/i915/i915_gem.c return intel_gt_init_scratch(&i915->gt, size); i915 1401 drivers/gpu/drm/i915/i915_gem.c static void i915_gem_fini_scratch(struct drm_i915_private *i915) i915 1403 drivers/gpu/drm/i915/i915_gem.c intel_gt_fini_scratch(&i915->gt); i915 1406 drivers/gpu/drm/i915/i915_gem.c static int intel_engines_verify_workarounds(struct drm_i915_private *i915) i915 1415 drivers/gpu/drm/i915/i915_gem.c for_each_engine(engine, i915, id) { i915 1593 drivers/gpu/drm/i915/i915_gem.c void i915_gem_driver_register(struct drm_i915_private *i915) i915 1595 drivers/gpu/drm/i915/i915_gem.c i915_gem_driver_register__shrinker(i915); i915 1597 drivers/gpu/drm/i915/i915_gem.c intel_engines_driver_register(i915); i915 1600 drivers/gpu/drm/i915/i915_gem.c void i915_gem_driver_unregister(struct drm_i915_private *i915) i915 1602 drivers/gpu/drm/i915/i915_gem.c i915_gem_driver_unregister__shrinker(i915); i915 1646 drivers/gpu/drm/i915/i915_gem.c void i915_gem_init_mmio(struct drm_i915_private *i915) i915 1648 drivers/gpu/drm/i915/i915_gem.c i915_gem_sanitize(i915); i915 1651 drivers/gpu/drm/i915/i915_gem.c static void i915_gem_init__mm(struct drm_i915_private *i915) i915 1653 drivers/gpu/drm/i915/i915_gem.c spin_lock_init(&i915->mm.obj_lock); i915 1655 drivers/gpu/drm/i915/i915_gem.c init_llist_head(&i915->mm.free_list); i915 1657 drivers/gpu/drm/i915/i915_gem.c INIT_LIST_HEAD(&i915->mm.purge_list); i915 1658 drivers/gpu/drm/i915/i915_gem.c INIT_LIST_HEAD(&i915->mm.shrink_list); i915 1660 drivers/gpu/drm/i915/i915_gem.c i915_gem_init__objects(i915); i915 1699 drivers/gpu/drm/i915/i915_gem.c int i915_gem_freeze_late(struct drm_i915_private *i915) i915 1719 drivers/gpu/drm/i915/i915_gem.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 1721 drivers/gpu/drm/i915/i915_gem.c i915_gem_shrink(i915, -1UL, NULL, ~0); i915 1722 drivers/gpu/drm/i915/i915_gem.c i915_gem_drain_freed_objects(i915); i915 1724 drivers/gpu/drm/i915/i915_gem.c list_for_each_entry(obj, &i915->mm.shrink_list, mm.link) { i915 1730 drivers/gpu/drm/i915/i915_gem.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 1750 drivers/gpu/drm/i915/i915_gem.c int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file) i915 1762 drivers/gpu/drm/i915/i915_gem.c file_priv->dev_priv = i915; i915 1771 drivers/gpu/drm/i915/i915_gem.c ret = i915_gem_context_open(i915, file); i915 40 drivers/gpu/drm/i915/i915_gem_evict.c static int ggtt_flush(struct drm_i915_private *i915) i915 49 drivers/gpu/drm/i915/i915_gem_evict.c return i915_gem_wait_for_idle(i915, i915 98 drivers/gpu/drm/i915/i915_gem_evict.c struct drm_i915_private *dev_priv = vm->i915; i915 107 drivers/gpu/drm/i915/i915_gem_evict.c lockdep_assert_held(&vm->i915->drm.struct_mutex); i915 272 drivers/gpu/drm/i915/i915_gem_evict.c lockdep_assert_held(&vm->i915->drm.struct_mutex); i915 284 drivers/gpu/drm/i915/i915_gem_evict.c i915_retire_requests(vm->i915); i915 378 drivers/gpu/drm/i915/i915_gem_evict.c lockdep_assert_held(&vm->i915->drm.struct_mutex); i915 387 drivers/gpu/drm/i915/i915_gem_evict.c ret = ggtt_flush(vm->i915); i915 69 drivers/gpu/drm/i915/i915_gem_fence_reg.c if (INTEL_GEN(fence->i915) >= 6) { i915 98 drivers/gpu/drm/i915/i915_gem_fence_reg.c struct intel_uncore *uncore = &fence->i915->uncore; i915 135 drivers/gpu/drm/i915/i915_gem_fence_reg.c if (is_y_tiled && HAS_128_BYTE_Y_TILING(fence->i915)) i915 151 drivers/gpu/drm/i915/i915_gem_fence_reg.c struct intel_uncore *uncore = &fence->i915->uncore; i915 183 drivers/gpu/drm/i915/i915_gem_fence_reg.c struct intel_uncore *uncore = &fence->i915->uncore; i915 200 drivers/gpu/drm/i915/i915_gem_fence_reg.c if (IS_GEN(fence->i915, 2)) i915 202 drivers/gpu/drm/i915/i915_gem_fence_reg.c else if (IS_GEN(fence->i915, 3)) i915 258 drivers/gpu/drm/i915/i915_gem_fence_reg.c list_move(&fence->link, &fence->i915->ggtt.fence_list); i915 271 drivers/gpu/drm/i915/i915_gem_fence_reg.c wakeref = intel_runtime_pm_get_if_in_use(&fence->i915->runtime_pm); i915 282 drivers/gpu/drm/i915/i915_gem_fence_reg.c list_move_tail(&fence->link, &fence->i915->ggtt.fence_list); i915 285 drivers/gpu/drm/i915/i915_gem_fence_reg.c intel_runtime_pm_put(&fence->i915->runtime_pm, wakeref); i915 314 drivers/gpu/drm/i915/i915_gem_fence_reg.c static struct i915_fence_reg *fence_find(struct drm_i915_private *i915) i915 318 drivers/gpu/drm/i915/i915_gem_fence_reg.c list_for_each_entry(fence, &i915->ggtt.fence_list, link) { i915 328 drivers/gpu/drm/i915/i915_gem_fence_reg.c if (intel_has_pending_fb_unpin(i915)) i915 351 drivers/gpu/drm/i915/i915_gem_fence_reg.c fence = fence_find(vma->vm->i915); i915 402 drivers/gpu/drm/i915/i915_gem_fence_reg.c assert_rpm_wakelock_held(&vma->vm->i915->runtime_pm); i915 423 drivers/gpu/drm/i915/i915_gem_fence_reg.c struct i915_fence_reg *i915_reserve_fence(struct drm_i915_private *i915) i915 425 drivers/gpu/drm/i915/i915_gem_fence_reg.c struct i915_ggtt *ggtt = &i915->ggtt; i915 439 drivers/gpu/drm/i915/i915_gem_fence_reg.c fence = fence_find(i915); i915 463 drivers/gpu/drm/i915/i915_gem_fence_reg.c struct i915_ggtt *ggtt = &fence->i915->ggtt; i915 478 drivers/gpu/drm/i915/i915_gem_fence_reg.c void i915_gem_restore_fences(struct drm_i915_private *i915) i915 483 drivers/gpu/drm/i915/i915_gem_fence_reg.c for (i = 0; i < i915->ggtt.num_fences; i++) { i915 484 drivers/gpu/drm/i915/i915_gem_fence_reg.c struct i915_fence_reg *reg = &i915->ggtt.fence_regs[i]; i915 556 drivers/gpu/drm/i915/i915_gem_fence_reg.c static void detect_bit_6_swizzle(struct drm_i915_private *i915) i915 558 drivers/gpu/drm/i915/i915_gem_fence_reg.c struct intel_uncore *uncore = &i915->uncore; i915 562 drivers/gpu/drm/i915/i915_gem_fence_reg.c if (INTEL_GEN(i915) >= 8 || IS_VALLEYVIEW(i915)) { i915 572 drivers/gpu/drm/i915/i915_gem_fence_reg.c } else if (INTEL_GEN(i915) >= 6) { i915 573 drivers/gpu/drm/i915/i915_gem_fence_reg.c if (i915->preserve_bios_swizzle) { i915 603 drivers/gpu/drm/i915/i915_gem_fence_reg.c } else if (IS_GEN(i915, 5)) { i915 610 drivers/gpu/drm/i915/i915_gem_fence_reg.c } else if (IS_GEN(i915, 2)) { i915 617 drivers/gpu/drm/i915/i915_gem_fence_reg.c } else if (IS_G45(i915) || IS_I965G(i915) || IS_G33(i915)) { i915 689 drivers/gpu/drm/i915/i915_gem_fence_reg.c if (IS_GEN(i915, 4) && i915 715 drivers/gpu/drm/i915/i915_gem_fence_reg.c i915->quirks |= QUIRK_PIN_SWIZZLED_PAGES; i915 720 drivers/gpu/drm/i915/i915_gem_fence_reg.c i915->mm.bit_6_swizzle_x = swizzle_x; i915 721 drivers/gpu/drm/i915/i915_gem_fence_reg.c i915->mm.bit_6_swizzle_y = swizzle_y; i915 821 drivers/gpu/drm/i915/i915_gem_fence_reg.c struct drm_i915_private *i915 = ggtt->vm.i915; i915 827 drivers/gpu/drm/i915/i915_gem_fence_reg.c intel_wakeref_auto_init(&ggtt->userfault_wakeref, &i915->runtime_pm); i915 829 drivers/gpu/drm/i915/i915_gem_fence_reg.c detect_bit_6_swizzle(i915); i915 831 drivers/gpu/drm/i915/i915_gem_fence_reg.c if (INTEL_GEN(i915) >= 7 && i915 832 drivers/gpu/drm/i915/i915_gem_fence_reg.c !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))) i915 834 drivers/gpu/drm/i915/i915_gem_fence_reg.c else if (INTEL_GEN(i915) >= 4 || i915 835 drivers/gpu/drm/i915/i915_gem_fence_reg.c IS_I945G(i915) || IS_I945GM(i915) || i915 836 drivers/gpu/drm/i915/i915_gem_fence_reg.c IS_G33(i915) || IS_PINEVIEW(i915)) i915 841 drivers/gpu/drm/i915/i915_gem_fence_reg.c if (intel_vgpu_active(i915)) i915 842 drivers/gpu/drm/i915/i915_gem_fence_reg.c num_fences = intel_uncore_read(&i915->uncore, i915 849 drivers/gpu/drm/i915/i915_gem_fence_reg.c fence->i915 = i915; i915 855 drivers/gpu/drm/i915/i915_gem_fence_reg.c i915_gem_restore_fences(i915); i915 860 drivers/gpu/drm/i915/i915_gem_fence_reg.c struct drm_i915_private *i915 = gt->i915; i915 863 drivers/gpu/drm/i915/i915_gem_fence_reg.c if (INTEL_GEN(i915) < 5 || i915 864 drivers/gpu/drm/i915/i915_gem_fence_reg.c i915->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE) i915 869 drivers/gpu/drm/i915/i915_gem_fence_reg.c if (IS_GEN(i915, 5)) i915 874 drivers/gpu/drm/i915/i915_gem_fence_reg.c if (IS_GEN(i915, 6)) i915 878 drivers/gpu/drm/i915/i915_gem_fence_reg.c else if (IS_GEN(i915, 7)) i915 882 drivers/gpu/drm/i915/i915_gem_fence_reg.c else if (IS_GEN(i915, 8)) i915 887 drivers/gpu/drm/i915/i915_gem_fence_reg.c MISSING_CASE(INTEL_GEN(i915)); i915 42 drivers/gpu/drm/i915/i915_gem_fence_reg.h struct drm_i915_private *i915; i915 58 drivers/gpu/drm/i915/i915_gem_fence_reg.h struct i915_fence_reg *i915_reserve_fence(struct drm_i915_private *i915); i915 61 drivers/gpu/drm/i915/i915_gem_fence_reg.h void i915_gem_restore_fences(struct drm_i915_private *i915); i915 371 drivers/gpu/drm/i915/i915_gem_gtt.c i915_gem_shrink_all(vm->i915); i915 381 drivers/gpu/drm/i915/i915_gem_gtt.c page = stash_pop_page(&vm->i915->mm.wc_stash); i915 409 drivers/gpu/drm/i915/i915_gem_gtt.c stash_push_pagevec(&vm->i915->mm.wc_stash, &stack); i915 439 drivers/gpu/drm/i915/i915_gem_gtt.c stash_push_pagevec(&vm->i915->mm.wc_stash, pvec); i915 507 drivers/gpu/drm/i915/i915_gem_gtt.c mutex_lock(&vm->i915->drm.struct_mutex); i915 514 drivers/gpu/drm/i915/i915_gem_gtt.c mutex_unlock(&vm->i915->drm.struct_mutex); i915 542 drivers/gpu/drm/i915/i915_gem_gtt.c queue_rcu_work(vm->i915->wq, &vm->rcu); i915 557 drivers/gpu/drm/i915/i915_gem_gtt.c i915_gem_shrinker_taints_mutex(vm->i915, &vm->mutex); i915 635 drivers/gpu/drm/i915/i915_gem_gtt.c HAS_PAGE_SIZES(vm->i915, I915_GTT_PAGE_SIZE_64K)) { i915 832 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *dev_priv = ppgtt->vm.i915; i915 956 drivers/gpu/drm/i915/i915_gem_gtt.c if (intel_vgpu_active(vm->i915)) i915 1085 drivers/gpu/drm/i915/i915_gem_gtt.c if (intel_vgpu_active(vm->i915) || i915 1369 drivers/gpu/drm/i915/i915_gem_gtt.c vm->i915->kernel_context && i915 1370 drivers/gpu/drm/i915/i915_gem_gtt.c vm->i915->kernel_context->vm) { i915 1371 drivers/gpu/drm/i915/i915_gem_gtt.c struct i915_address_space *clone = vm->i915->kernel_context->vm; i915 1432 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = gt->i915; i915 1435 drivers/gpu/drm/i915/i915_gem_gtt.c ppgtt->vm.i915 = i915; i915 1436 drivers/gpu/drm/i915/i915_gem_gtt.c ppgtt->vm.dma = &i915->drm.pdev->dev; i915 1437 drivers/gpu/drm/i915/i915_gem_gtt.c ppgtt->vm.total = BIT_ULL(INTEL_INFO(i915)->ppgtt_size); i915 1476 drivers/gpu/drm/i915/i915_gem_gtt.c static struct i915_ppgtt *gen8_ppgtt_create(struct drm_i915_private *i915) i915 1485 drivers/gpu/drm/i915/i915_gem_gtt.c ppgtt_init(ppgtt, &i915->gt); i915 1494 drivers/gpu/drm/i915/i915_gem_gtt.c ppgtt->vm.has_read_only = INTEL_GEN(i915) != 11; i915 1499 drivers/gpu/drm/i915/i915_gem_gtt.c if (IS_CHERRYVIEW(i915) || IS_BROXTON(i915)) i915 1513 drivers/gpu/drm/i915/i915_gem_gtt.c if (intel_vgpu_active(i915)) { i915 1524 drivers/gpu/drm/i915/i915_gem_gtt.c if (intel_vgpu_active(i915)) i915 1553 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = gt->i915; i915 1562 drivers/gpu/drm/i915/i915_gem_gtt.c if (IS_HASWELL(i915)) { i915 1570 drivers/gpu/drm/i915/i915_gem_gtt.c for_each_engine(engine, i915, id) { i915 1597 drivers/gpu/drm/i915/i915_gem_gtt.c if (HAS_PPGTT(uncore->i915)) /* may be disabled for VT-d */ i915 1697 drivers/gpu/drm/i915/i915_gem_gtt.c wakeref = intel_runtime_pm_get(&vm->i915->runtime_pm); i915 1746 drivers/gpu/drm/i915/i915_gem_gtt.c intel_runtime_pm_put(&vm->i915->runtime_pm, wakeref); i915 1791 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = vm->i915; i915 1794 drivers/gpu/drm/i915/i915_gem_gtt.c mutex_lock(&i915->drm.struct_mutex); i915 1796 drivers/gpu/drm/i915/i915_gem_gtt.c mutex_unlock(&i915->drm.struct_mutex); i915 1871 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = ppgtt->base.vm.i915; i915 1882 drivers/gpu/drm/i915/i915_gem_gtt.c i915_active_init(i915, &vma->active, NULL, NULL); i915 1959 drivers/gpu/drm/i915/i915_gem_gtt.c static struct i915_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915) i915 1961 drivers/gpu/drm/i915/i915_gem_gtt.c struct i915_ggtt * const ggtt = &i915->ggtt; i915 1969 drivers/gpu/drm/i915/i915_gem_gtt.c ppgtt_init(&ppgtt->base, &i915->gt); i915 2008 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = gt->i915; i915 2016 drivers/gpu/drm/i915/i915_gem_gtt.c if (IS_BROADWELL(i915)) i915 2020 drivers/gpu/drm/i915/i915_gem_gtt.c else if (IS_CHERRYVIEW(i915)) i915 2024 drivers/gpu/drm/i915/i915_gem_gtt.c else if (IS_GEN9_LP(i915)) i915 2028 drivers/gpu/drm/i915/i915_gem_gtt.c else if (INTEL_GEN(i915) >= 9) i915 2044 drivers/gpu/drm/i915/i915_gem_gtt.c if (HAS_PAGE_SIZES(i915, I915_GTT_PAGE_SIZE_64K) && i915 2045 drivers/gpu/drm/i915/i915_gem_gtt.c INTEL_GEN(i915) <= 10) i915 2051 drivers/gpu/drm/i915/i915_gem_gtt.c if (IS_GEN_RANGE(i915, 8, 11)) { i915 2060 drivers/gpu/drm/i915/i915_gem_gtt.c if (HAS_PAGE_SIZES(i915, I915_GTT_PAGE_SIZE_2M)) i915 2075 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = gt->i915; i915 2079 drivers/gpu/drm/i915/i915_gem_gtt.c if (IS_GEN(i915, 6)) i915 2081 drivers/gpu/drm/i915/i915_gem_gtt.c else if (IS_GEN(i915, 7)) i915 2088 drivers/gpu/drm/i915/i915_gem_gtt.c __ppgtt_create(struct drm_i915_private *i915) i915 2090 drivers/gpu/drm/i915/i915_gem_gtt.c if (INTEL_GEN(i915) < 8) i915 2091 drivers/gpu/drm/i915/i915_gem_gtt.c return gen6_ppgtt_create(i915); i915 2093 drivers/gpu/drm/i915/i915_gem_gtt.c return gen8_ppgtt_create(i915); i915 2097 drivers/gpu/drm/i915/i915_gem_gtt.c i915_ppgtt_create(struct drm_i915_private *i915) i915 2101 drivers/gpu/drm/i915/i915_gem_gtt.c ppgtt = __ppgtt_create(i915); i915 2123 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = ggtt->vm.i915; i915 2128 drivers/gpu/drm/i915/i915_gem_gtt.c if (INTEL_GEN(i915) < 6) i915 2138 drivers/gpu/drm/i915/i915_gem_gtt.c void i915_gem_suspend_gtt_mappings(struct drm_i915_private *i915) i915 2140 drivers/gpu/drm/i915/i915_gem_gtt.c ggtt_suspend_mappings(&i915->ggtt); i915 2286 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *dev_priv = vm->i915; i915 2433 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = vma->vm->i915; i915 2443 drivers/gpu/drm/i915/i915_gem_gtt.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) i915 2460 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = vma->vm->i915; i915 2463 drivers/gpu/drm/i915/i915_gem_gtt.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) i915 2471 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = vma->vm->i915; i915 2498 drivers/gpu/drm/i915/i915_gem_gtt.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) { i915 2509 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = vma->vm->i915; i915 2515 drivers/gpu/drm/i915/i915_gem_gtt.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) i915 2583 drivers/gpu/drm/i915/i915_gem_gtt.c ppgtt = i915_ppgtt_create(ggtt->vm.i915); i915 2619 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = ggtt->vm.i915; i915 2622 drivers/gpu/drm/i915/i915_gem_gtt.c mutex_lock(&i915->drm.struct_mutex); i915 2634 drivers/gpu/drm/i915/i915_gem_gtt.c mutex_unlock(&i915->drm.struct_mutex); i915 2642 drivers/gpu/drm/i915/i915_gem_gtt.c if (!USES_GUC(ggtt->vm.i915)) i915 2691 drivers/gpu/drm/i915/i915_gem_gtt.c intel_wopcm_guc_size(&ggtt->vm.i915->wopcm)); i915 2732 drivers/gpu/drm/i915/i915_gem_gtt.c int i915_init_ggtt(struct drm_i915_private *i915) i915 2736 drivers/gpu/drm/i915/i915_gem_gtt.c ret = init_ggtt(&i915->ggtt); i915 2740 drivers/gpu/drm/i915/i915_gem_gtt.c if (INTEL_PPGTT(i915) == INTEL_PPGTT_ALIASING) { i915 2741 drivers/gpu/drm/i915/i915_gem_gtt.c ret = init_aliasing_ppgtt(&i915->ggtt); i915 2743 drivers/gpu/drm/i915/i915_gem_gtt.c cleanup_init_ggtt(&i915->ggtt); i915 2751 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = ggtt->vm.i915; i915 2757 drivers/gpu/drm/i915/i915_gem_gtt.c flush_workqueue(i915->wq); i915 2759 drivers/gpu/drm/i915/i915_gem_gtt.c mutex_lock(&i915->drm.struct_mutex); i915 2776 drivers/gpu/drm/i915/i915_gem_gtt.c mutex_unlock(&i915->drm.struct_mutex); i915 2786 drivers/gpu/drm/i915/i915_gem_gtt.c void i915_ggtt_driver_release(struct drm_i915_private *i915) i915 2790 drivers/gpu/drm/i915/i915_gem_gtt.c fini_aliasing_ppgtt(&i915->ggtt); i915 2792 drivers/gpu/drm/i915/i915_gem_gtt.c ggtt_cleanup_hw(&i915->ggtt); i915 2794 drivers/gpu/drm/i915/i915_gem_gtt.c pvec = &i915->mm.wc_stash.pvec; i915 2800 drivers/gpu/drm/i915/i915_gem_gtt.c i915_gem_cleanup_stolen(i915); i915 2839 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *dev_priv = ggtt->vm.i915; i915 2983 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *dev_priv = ggtt->vm.i915; i915 3041 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *dev_priv = ggtt->vm.i915; i915 3105 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *dev_priv = ggtt->vm.i915; i915 3143 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = gt->i915; i915 3147 drivers/gpu/drm/i915/i915_gem_gtt.c ggtt->vm.i915 = i915; i915 3148 drivers/gpu/drm/i915/i915_gem_gtt.c ggtt->vm.dma = &i915->drm.pdev->dev; i915 3150 drivers/gpu/drm/i915/i915_gem_gtt.c if (INTEL_GEN(i915) <= 5) i915 3152 drivers/gpu/drm/i915/i915_gem_gtt.c else if (INTEL_GEN(i915) < 8) i915 3188 drivers/gpu/drm/i915/i915_gem_gtt.c int i915_ggtt_probe_hw(struct drm_i915_private *i915) i915 3192 drivers/gpu/drm/i915/i915_gem_gtt.c ret = ggtt_probe_hw(&i915->ggtt, &i915->gt); i915 3197 drivers/gpu/drm/i915/i915_gem_gtt.c dev_info(i915->drm.dev, "VT-d active for gfx access\n"); i915 3204 drivers/gpu/drm/i915/i915_gem_gtt.c struct drm_i915_private *i915 = ggtt->vm.i915; i915 3207 drivers/gpu/drm/i915/i915_gem_gtt.c mutex_lock(&i915->drm.struct_mutex); i915 3214 drivers/gpu/drm/i915/i915_gem_gtt.c ggtt->vm.has_read_only = IS_VALLEYVIEW(i915); i915 3216 drivers/gpu/drm/i915/i915_gem_gtt.c if (!HAS_LLC(i915) && !HAS_PPGTT(i915)) i915 3232 drivers/gpu/drm/i915/i915_gem_gtt.c mutex_unlock(&i915->drm.struct_mutex); i915 3348 drivers/gpu/drm/i915/i915_gem_gtt.c void i915_gem_restore_gtt_mappings(struct drm_i915_private *i915) i915 3350 drivers/gpu/drm/i915/i915_gem_gtt.c ggtt_restore_mappings(&i915->ggtt); i915 3352 drivers/gpu/drm/i915/i915_gem_gtt.c if (INTEL_GEN(i915) >= 8) i915 3353 drivers/gpu/drm/i915/i915_gem_gtt.c setup_private_pat(i915); i915 3642 drivers/gpu/drm/i915/i915_gem_gtt.c GEM_BUG_ON(vm == &vm->i915->ggtt.alias->vm); i915 3731 drivers/gpu/drm/i915/i915_gem_gtt.c lockdep_assert_held(&vm->i915->drm.struct_mutex); i915 3739 drivers/gpu/drm/i915/i915_gem_gtt.c GEM_BUG_ON(vm == &vm->i915->ggtt.alias->vm); i915 294 drivers/gpu/drm/i915/i915_gem_gtt.h struct drm_i915_private *i915; i915 12 drivers/gpu/drm/i915/i915_getparam.c struct drm_i915_private *i915 = to_i915(dev); i915 13 drivers/gpu/drm/i915/i915_getparam.c const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu; i915 25 drivers/gpu/drm/i915/i915_getparam.c value = i915->drm.pdev->device; i915 28 drivers/gpu/drm/i915/i915_getparam.c value = i915->drm.pdev->revision; i915 31 drivers/gpu/drm/i915/i915_getparam.c value = i915->ggtt.num_fences; i915 34 drivers/gpu/drm/i915/i915_getparam.c value = !!i915->overlay; i915 37 drivers/gpu/drm/i915/i915_getparam.c value = !!intel_engine_lookup_user(i915, i915 41 drivers/gpu/drm/i915/i915_getparam.c value = !!intel_engine_lookup_user(i915, i915 45 drivers/gpu/drm/i915/i915_getparam.c value = !!intel_engine_lookup_user(i915, i915 49 drivers/gpu/drm/i915/i915_getparam.c value = !!intel_engine_lookup_user(i915, i915 53 drivers/gpu/drm/i915/i915_getparam.c value = HAS_LLC(i915); i915 56 drivers/gpu/drm/i915/i915_getparam.c value = HAS_WT(i915); i915 59 drivers/gpu/drm/i915/i915_getparam.c value = INTEL_PPGTT(i915); i915 62 drivers/gpu/drm/i915/i915_getparam.c value = !!(i915->caps.scheduler & I915_SCHEDULER_CAP_SEMAPHORES); i915 65 drivers/gpu/drm/i915/i915_getparam.c value = HAS_SECURE_BATCHES(i915) && capable(CAP_SYS_ADMIN); i915 68 drivers/gpu/drm/i915/i915_getparam.c value = i915_cmd_parser_get_version(i915); i915 82 drivers/gpu/drm/i915/i915_getparam.c intel_has_gpu_reset(i915); i915 83 drivers/gpu/drm/i915/i915_getparam.c if (value && intel_has_reset_engine(i915)) i915 90 drivers/gpu/drm/i915/i915_getparam.c value = HAS_POOLED_EU(i915); i915 96 drivers/gpu/drm/i915/i915_getparam.c value = intel_huc_check_status(&i915->gt.uc.huc); i915 108 drivers/gpu/drm/i915/i915_getparam.c value = i915->caps.scheduler; i915 141 drivers/gpu/drm/i915/i915_getparam.c value = intel_engines_has_context_isolation(i915); i915 154 drivers/gpu/drm/i915/i915_getparam.c value = 1000 * RUNTIME_INFO(i915)->cs_timestamp_frequency_khz; i915 157 drivers/gpu/drm/i915/i915_getparam.c value = INTEL_INFO(i915)->has_coherent_ggtt; i915 430 drivers/gpu/drm/i915/i915_gpu_error.c if (ee->engine->class != RENDER_CLASS || INTEL_GEN(m->i915) <= 3) i915 436 drivers/gpu/drm/i915/i915_gpu_error.c if (INTEL_GEN(m->i915) <= 6) i915 439 drivers/gpu/drm/i915/i915_gpu_error.c for_each_instdone_slice_subslice(m->i915, slice, subslice) i915 444 drivers/gpu/drm/i915/i915_gpu_error.c for_each_instdone_slice_subslice(m->i915, slice, subslice) i915 508 drivers/gpu/drm/i915/i915_gpu_error.c if (INTEL_GEN(m->i915) >= 4) { i915 517 drivers/gpu/drm/i915/i915_gpu_error.c if (INTEL_GEN(m->i915) >= 6) { i915 521 drivers/gpu/drm/i915/i915_gpu_error.c if (HAS_PPGTT(m->i915)) { i915 524 drivers/gpu/drm/i915/i915_gpu_error.c if (INTEL_GEN(m->i915) >= 8) { i915 613 drivers/gpu/drm/i915/i915_gpu_error.c struct drm_i915_private *i915) i915 615 drivers/gpu/drm/i915/i915_gpu_error.c struct pci_dev *pdev = i915->drm.pdev; i915 696 drivers/gpu/drm/i915/i915_gpu_error.c err_print_pciid(m, m->i915); i915 700 drivers/gpu/drm/i915/i915_gpu_error.c if (HAS_CSR(m->i915)) { i915 701 drivers/gpu/drm/i915/i915_gpu_error.c struct intel_csr *csr = &m->i915->csr; i915 725 drivers/gpu/drm/i915/i915_gpu_error.c if (IS_GEN_RANGE(m->i915, 6, 11)) { i915 730 drivers/gpu/drm/i915/i915_gpu_error.c if (INTEL_GEN(m->i915) >= 8) i915 734 drivers/gpu/drm/i915/i915_gpu_error.c if (IS_GEN(m->i915, 7)) i915 802 drivers/gpu/drm/i915/i915_gpu_error.c m.i915 = error->i915; i915 957 drivers/gpu/drm/i915/i915_gpu_error.c i915_error_object_create(struct drm_i915_private *i915, i915 961 drivers/gpu/drm/i915/i915_gpu_error.c struct i915_ggtt *ggtt = &i915->ggtt; i915 1040 drivers/gpu/drm/i915/i915_gpu_error.c struct drm_i915_private *dev_priv = error->i915; i915 1066 drivers/gpu/drm/i915/i915_gpu_error.c struct drm_i915_private *dev_priv = engine->i915; i915 1128 drivers/gpu/drm/i915/i915_gpu_error.c } else if (IS_GEN(engine->i915, 6)) { i915 1365 drivers/gpu/drm/i915/i915_gpu_error.c struct drm_i915_private *i915 = error->i915; i915 1373 drivers/gpu/drm/i915/i915_gpu_error.c for_each_uabi_engine(engine, i915) { i915 1399 drivers/gpu/drm/i915/i915_gpu_error.c if (HAS_BROKEN_CS_TLB(i915)) i915 1432 drivers/gpu/drm/i915/i915_gpu_error.c i915_error_object_create(i915, vma, compress); i915 1442 drivers/gpu/drm/i915/i915_gpu_error.c i915_error_object_create(i915, i915 1447 drivers/gpu/drm/i915/i915_gpu_error.c i915_error_object_create(i915, i915 1452 drivers/gpu/drm/i915/i915_gpu_error.c capture_object(i915, engine->default_state, compress); i915 1470 drivers/gpu/drm/i915/i915_gpu_error.c struct drm_i915_private *i915 = error->i915; i915 1472 drivers/gpu/drm/i915/i915_gpu_error.c struct intel_uc *uc = &i915->gt.uc; i915 1487 drivers/gpu/drm/i915/i915_gpu_error.c error_uc->guc_log = i915_error_object_create(i915, i915 1495 drivers/gpu/drm/i915/i915_gpu_error.c struct drm_i915_private *i915 = error->i915; i915 1496 drivers/gpu/drm/i915/i915_gpu_error.c struct intel_uncore *uncore = &i915->uncore; i915 1508 drivers/gpu/drm/i915/i915_gpu_error.c if (IS_VALLEYVIEW(i915)) { i915 1514 drivers/gpu/drm/i915/i915_gpu_error.c if (IS_GEN(i915, 7)) i915 1517 drivers/gpu/drm/i915/i915_gpu_error.c if (INTEL_GEN(i915) >= 12) { i915 1522 drivers/gpu/drm/i915/i915_gpu_error.c } else if (INTEL_GEN(i915) >= 8) { i915 1529 drivers/gpu/drm/i915/i915_gpu_error.c if (IS_GEN(i915, 6)) { i915 1536 drivers/gpu/drm/i915/i915_gpu_error.c if (INTEL_GEN(i915) >= 7) i915 1539 drivers/gpu/drm/i915/i915_gpu_error.c if (INTEL_GEN(i915) >= 6) { i915 1541 drivers/gpu/drm/i915/i915_gpu_error.c if (INTEL_GEN(i915) < 12) { i915 1547 drivers/gpu/drm/i915/i915_gpu_error.c if (INTEL_GEN(i915) >= 5) i915 1551 drivers/gpu/drm/i915/i915_gpu_error.c if (IS_GEN_RANGE(i915, 6, 7)) { i915 1557 drivers/gpu/drm/i915/i915_gpu_error.c if (INTEL_GEN(i915) >= 11) { i915 1576 drivers/gpu/drm/i915/i915_gpu_error.c } else if (INTEL_GEN(i915) >= 8) { i915 1582 drivers/gpu/drm/i915/i915_gpu_error.c } else if (HAS_PCH_SPLIT(i915)) { i915 1586 drivers/gpu/drm/i915/i915_gpu_error.c } else if (IS_GEN(i915, 2)) { i915 1588 drivers/gpu/drm/i915/i915_gpu_error.c } else if (!IS_VALLEYVIEW(i915)) { i915 1603 drivers/gpu/drm/i915/i915_gpu_error.c INTEL_GEN(error->i915), engines, i915 1623 drivers/gpu/drm/i915/i915_gpu_error.c struct drm_i915_private *i915 = error->i915; i915 1625 drivers/gpu/drm/i915/i915_gpu_error.c error->awake = i915->gt.awake; i915 1626 drivers/gpu/drm/i915/i915_gpu_error.c error->wakelock = atomic_read(&i915->runtime_pm.wakeref_count); i915 1627 drivers/gpu/drm/i915/i915_gpu_error.c error->suspended = i915->runtime_pm.suspended; i915 1633 drivers/gpu/drm/i915/i915_gpu_error.c error->reset_count = i915_reset_count(&i915->gpu_error); i915 1634 drivers/gpu/drm/i915/i915_gpu_error.c error->suspend_count = i915->suspend_count; i915 1637 drivers/gpu/drm/i915/i915_gpu_error.c INTEL_INFO(i915), i915 1640 drivers/gpu/drm/i915/i915_gpu_error.c RUNTIME_INFO(i915), i915 1642 drivers/gpu/drm/i915/i915_gpu_error.c error->driver_caps = i915->caps; i915 1666 drivers/gpu/drm/i915/i915_gpu_error.c struct i915_ggtt *ggtt = &error->i915->ggtt; i915 1675 drivers/gpu/drm/i915/i915_gpu_error.c i915_capture_gpu_state(struct drm_i915_private *i915) i915 1681 drivers/gpu/drm/i915/i915_gpu_error.c error = READ_ONCE(i915->gpu_error.first_error); i915 1687 drivers/gpu/drm/i915/i915_gpu_error.c i915_disable_error_state(i915, -ENOMEM); i915 1693 drivers/gpu/drm/i915/i915_gpu_error.c i915_disable_error_state(i915, -ENOMEM); i915 1698 drivers/gpu/drm/i915/i915_gpu_error.c error->i915 = i915; i915 1702 drivers/gpu/drm/i915/i915_gpu_error.c error->uptime = ktime_sub(ktime_get(), i915->gt.last_init_time); i915 1712 drivers/gpu/drm/i915/i915_gpu_error.c error->overlay = intel_overlay_capture_error_state(i915); i915 1713 drivers/gpu/drm/i915/i915_gpu_error.c error->display = intel_display_capture_error_state(i915); i915 1734 drivers/gpu/drm/i915/i915_gpu_error.c void i915_capture_error_state(struct drm_i915_private *i915, i915 1745 drivers/gpu/drm/i915/i915_gpu_error.c if (READ_ONCE(i915->gpu_error.first_error)) i915 1748 drivers/gpu/drm/i915/i915_gpu_error.c error = i915_capture_gpu_state(i915); i915 1752 drivers/gpu/drm/i915/i915_gpu_error.c dev_info(i915->drm.dev, "%s\n", error_msg(error, engine_mask, msg)); i915 1755 drivers/gpu/drm/i915/i915_gpu_error.c spin_lock_irqsave(&i915->gpu_error.lock, flags); i915 1756 drivers/gpu/drm/i915/i915_gpu_error.c if (!i915->gpu_error.first_error) { i915 1757 drivers/gpu/drm/i915/i915_gpu_error.c i915->gpu_error.first_error = error; i915 1760 drivers/gpu/drm/i915/i915_gpu_error.c spin_unlock_irqrestore(&i915->gpu_error.lock, flags); i915 1776 drivers/gpu/drm/i915/i915_gpu_error.c i915->drm.primary->index); i915 1781 drivers/gpu/drm/i915/i915_gpu_error.c i915_first_error_state(struct drm_i915_private *i915) i915 1785 drivers/gpu/drm/i915/i915_gpu_error.c spin_lock_irq(&i915->gpu_error.lock); i915 1786 drivers/gpu/drm/i915/i915_gpu_error.c error = i915->gpu_error.first_error; i915 1789 drivers/gpu/drm/i915/i915_gpu_error.c spin_unlock_irq(&i915->gpu_error.lock); i915 1794 drivers/gpu/drm/i915/i915_gpu_error.c void i915_reset_error_state(struct drm_i915_private *i915) i915 1798 drivers/gpu/drm/i915/i915_gpu_error.c spin_lock_irq(&i915->gpu_error.lock); i915 1799 drivers/gpu/drm/i915/i915_gpu_error.c error = i915->gpu_error.first_error; i915 1801 drivers/gpu/drm/i915/i915_gpu_error.c i915->gpu_error.first_error = NULL; i915 1802 drivers/gpu/drm/i915/i915_gpu_error.c spin_unlock_irq(&i915->gpu_error.lock); i915 1808 drivers/gpu/drm/i915/i915_gpu_error.c void i915_disable_error_state(struct drm_i915_private *i915, int err) i915 1810 drivers/gpu/drm/i915/i915_gpu_error.c spin_lock_irq(&i915->gpu_error.lock); i915 1811 drivers/gpu/drm/i915/i915_gpu_error.c if (!i915->gpu_error.first_error) i915 1812 drivers/gpu/drm/i915/i915_gpu_error.c i915->gpu_error.first_error = ERR_PTR(err); i915 1813 drivers/gpu/drm/i915/i915_gpu_error.c spin_unlock_irq(&i915->gpu_error.lock); i915 39 drivers/gpu/drm/i915/i915_gpu_error.h struct drm_i915_private *i915; i915 185 drivers/gpu/drm/i915/i915_gpu_error.h struct drm_i915_private *i915; i915 201 drivers/gpu/drm/i915/i915_gpu_error.h struct i915_gpu_state *i915_capture_gpu_state(struct drm_i915_private *i915); i915 223 drivers/gpu/drm/i915/i915_gpu_error.h struct i915_gpu_state *i915_first_error_state(struct drm_i915_private *i915); i915 224 drivers/gpu/drm/i915/i915_gpu_error.h void i915_reset_error_state(struct drm_i915_private *i915); i915 225 drivers/gpu/drm/i915/i915_gpu_error.h void i915_disable_error_state(struct drm_i915_private *i915, int err); i915 236 drivers/gpu/drm/i915/i915_gpu_error.h i915_first_error_state(struct drm_i915_private *i915) i915 241 drivers/gpu/drm/i915/i915_gpu_error.h static inline void i915_reset_error_state(struct drm_i915_private *i915) i915 245 drivers/gpu/drm/i915/i915_gpu_error.h static inline void i915_disable_error_state(struct drm_i915_private *i915, i915 383 drivers/gpu/drm/i915/i915_irq.c u32 gen6_sanitize_rps_pm_mask(const struct drm_i915_private *i915, u32 mask) i915 385 drivers/gpu/drm/i915/i915_irq.c return mask & ~i915->gt_pm.rps.pm_intrmsk_mbz; i915 422 drivers/gpu/drm/i915/i915_irq.c assert_rpm_wakelock_held(>->i915->runtime_pm); i915 433 drivers/gpu/drm/i915/i915_irq.c assert_rpm_wakelock_held(>->i915->runtime_pm); i915 438 drivers/gpu/drm/i915/i915_irq.c gen6_pm_iir(gt->i915)) & i915 450 drivers/gpu/drm/i915/i915_irq.c assert_rpm_wakelock_held(>->i915->runtime_pm); i915 458 drivers/gpu/drm/i915/i915_irq.c intel_synchronize_irq(gt->i915); i915 499 drivers/gpu/drm/i915/i915_irq.c intel_synchronize_irq(gt->i915); i915 1660 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *i915 = gt->i915; i915 1661 drivers/gpu/drm/i915/i915_irq.c struct intel_rps *rps = &i915->gt_pm.rps; i915 1662 drivers/gpu/drm/i915/i915_irq.c const u32 events = i915->pm_rps_events & pm_iir; i915 2876 drivers/gpu/drm/i915/i915_irq.c intel_opregion_asle_intr(gt->i915); i915 2899 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private * const i915 = arg; i915 2900 drivers/gpu/drm/i915/i915_irq.c void __iomem * const regs = i915->uncore.regs; i915 2901 drivers/gpu/drm/i915/i915_irq.c struct intel_gt *gt = &i915->gt; i915 2905 drivers/gpu/drm/i915/i915_irq.c if (!intel_irqs_enabled(i915)) i915 2921 drivers/gpu/drm/i915/i915_irq.c disable_rpm_wakeref_asserts(&i915->runtime_pm); i915 2926 drivers/gpu/drm/i915/i915_irq.c gen8_de_irq_handler(i915, disp_ctl); i915 2927 drivers/gpu/drm/i915/i915_irq.c enable_rpm_wakeref_asserts(&i915->runtime_pm); i915 3936 drivers/gpu/drm/i915/i915_irq.c static void i8xx_error_irq_ack(struct drm_i915_private *i915, i915 3939 drivers/gpu/drm/i915/i915_irq.c struct intel_uncore *uncore = &i915->uncore; i915 4410 drivers/gpu/drm/i915/i915_irq.c void intel_irq_fini(struct drm_i915_private *i915) i915 4414 drivers/gpu/drm/i915/i915_irq.c if (IS_I945GM(i915)) i915 4415 drivers/gpu/drm/i915/i915_irq.c i945gm_vblank_work_fini(i915); i915 4418 drivers/gpu/drm/i915/i915_irq.c kfree(i915->l3_parity.remap_info[i]); i915 4596 drivers/gpu/drm/i915/i915_irq.c void intel_synchronize_irq(struct drm_i915_private *i915) i915 4598 drivers/gpu/drm/i915/i915_irq.c synchronize_irq(i915->drm.pdev->irq); i915 97 drivers/gpu/drm/i915/i915_irq.h u32 gen6_sanitize_rps_pm_mask(const struct drm_i915_private *i915, u32 mask); i915 102 drivers/gpu/drm/i915/i915_irq.h void intel_synchronize_irq(struct drm_i915_private *i915); i915 13 drivers/gpu/drm/i915/i915_memcpy.h void i915_memcpy_init_early(struct drm_i915_private *i915); i915 880 drivers/gpu/drm/i915/i915_pci.c struct drm_i915_private *i915; i915 882 drivers/gpu/drm/i915/i915_pci.c i915 = pci_get_drvdata(pdev); i915 883 drivers/gpu/drm/i915/i915_pci.c if (!i915) /* driver load aborted, nothing to cleanup */ i915 886 drivers/gpu/drm/i915/i915_pci.c i915_driver_remove(i915); i915 889 drivers/gpu/drm/i915/i915_pci.c drm_dev_put(&i915->drm); i915 1207 drivers/gpu/drm/i915/i915_perf.c struct drm_i915_private *i915 = stream->dev_priv; i915 1212 drivers/gpu/drm/i915/i915_perf.c err = i915_mutex_lock_interruptible(&i915->drm); i915 1232 drivers/gpu/drm/i915/i915_perf.c mutex_unlock(&i915->drm.struct_mutex); i915 1251 drivers/gpu/drm/i915/i915_perf.c struct drm_i915_private *i915 = stream->dev_priv; i915 1258 drivers/gpu/drm/i915/i915_perf.c switch (INTEL_GEN(i915)) { i915 1272 drivers/gpu/drm/i915/i915_perf.c if (USES_GUC_SUBMISSION(i915)) { i915 1314 drivers/gpu/drm/i915/i915_perf.c MISSING_CASE(INTEL_GEN(i915)); i915 1350 drivers/gpu/drm/i915/i915_perf.c struct drm_i915_private *i915 = stream->dev_priv; i915 1352 drivers/gpu/drm/i915/i915_perf.c mutex_lock(&i915->drm.struct_mutex); i915 1357 drivers/gpu/drm/i915/i915_perf.c mutex_unlock(&i915->drm.struct_mutex); i915 1680 drivers/gpu/drm/i915/i915_perf.c struct drm_i915_private *i915 = ce->engine->i915; i915 1681 drivers/gpu/drm/i915/i915_perf.c u32 ctx_oactxctrl = i915->perf.ctx_oactxctrl_offset; i915 1682 drivers/gpu/drm/i915/i915_perf.c u32 ctx_flexeu0 = i915->perf.ctx_flexeu0_offset; i915 1707 drivers/gpu/drm/i915/i915_perf.c intel_sseu_make_rpcs(i915, &ce->sseu)); i915 1820 drivers/gpu/drm/i915/i915_perf.c flex->value = intel_sseu_make_rpcs(ctx->i915, &ce->sseu); i915 1862 drivers/gpu/drm/i915/i915_perf.c struct drm_i915_private *i915 = stream->dev_priv; i915 1864 drivers/gpu/drm/i915/i915_perf.c const u32 ctx_flexeu0 = i915->perf.ctx_flexeu0_offset; i915 1873 drivers/gpu/drm/i915/i915_perf.c i915->perf.ctx_oactxctrl_offset, i915 1894 drivers/gpu/drm/i915/i915_perf.c lockdep_assert_held(&i915->drm.struct_mutex); i915 1912 drivers/gpu/drm/i915/i915_perf.c list_for_each_entry(ctx, &i915->contexts.list, link) { i915 1915 drivers/gpu/drm/i915/i915_perf.c if (ctx == i915->kernel_context) i915 1928 drivers/gpu/drm/i915/i915_perf.c for_each_uabi_engine(engine, i915) { i915 1935 drivers/gpu/drm/i915/i915_perf.c regs[0].value = intel_sseu_make_rpcs(i915, &ce->sseu); i915 2310 drivers/gpu/drm/i915/i915_perf.c stream = engine->i915->perf.exclusive_stream; i915 17 drivers/gpu/drm/i915/i915_perf.h void i915_perf_init(struct drm_i915_private *i915); i915 18 drivers/gpu/drm/i915/i915_perf.h void i915_perf_fini(struct drm_i915_private *i915); i915 19 drivers/gpu/drm/i915/i915_perf.h void i915_perf_register(struct drm_i915_private *i915); i915 20 drivers/gpu/drm/i915/i915_perf.h void i915_perf_unregister(struct drm_i915_private *i915); i915 82 drivers/gpu/drm/i915/i915_pmu.c struct drm_i915_private *i915 = container_of(pmu, typeof(*i915), pmu); i915 110 drivers/gpu/drm/i915/i915_pmu.c else if (i915->caps.scheduler & I915_SCHEDULER_CAP_ENGINE_BUSY_STATS) i915 119 drivers/gpu/drm/i915/i915_pmu.c void i915_pmu_gt_parked(struct drm_i915_private *i915) i915 121 drivers/gpu/drm/i915/i915_pmu.c struct i915_pmu *pmu = &i915->pmu; i915 146 drivers/gpu/drm/i915/i915_pmu.c void i915_pmu_gt_unparked(struct drm_i915_private *i915) i915 148 drivers/gpu/drm/i915/i915_pmu.c struct i915_pmu *pmu = &i915->pmu; i915 170 drivers/gpu/drm/i915/i915_pmu.c struct drm_i915_private *i915 = gt->i915; i915 174 drivers/gpu/drm/i915/i915_pmu.c if ((i915->pmu.enable & ENGINE_SAMPLE_MASK) == 0) i915 177 drivers/gpu/drm/i915/i915_pmu.c for_each_engine(engine, i915, id) { i915 227 drivers/gpu/drm/i915/i915_pmu.c struct drm_i915_private *i915 = gt->i915; i915 229 drivers/gpu/drm/i915/i915_pmu.c struct i915_pmu *pmu = &i915->pmu; i915 234 drivers/gpu/drm/i915/i915_pmu.c val = i915->gt_pm.rps.cur_freq; i915 237 drivers/gpu/drm/i915/i915_pmu.c val = intel_get_cagf(i915, val); i915 242 drivers/gpu/drm/i915/i915_pmu.c intel_gpu_freq(i915, val), i915 248 drivers/gpu/drm/i915/i915_pmu.c intel_gpu_freq(i915, i915->gt_pm.rps.cur_freq), i915 255 drivers/gpu/drm/i915/i915_pmu.c struct drm_i915_private *i915 = i915 257 drivers/gpu/drm/i915/i915_pmu.c struct i915_pmu *pmu = &i915->pmu; i915 258 drivers/gpu/drm/i915/i915_pmu.c struct intel_gt *gt = &i915->gt; i915 283 drivers/gpu/drm/i915/i915_pmu.c static u64 count_interrupts(struct drm_i915_private *i915) i915 286 drivers/gpu/drm/i915/i915_pmu.c struct irq_desc *desc = irq_to_desc(i915->drm.pdev->irq); i915 301 drivers/gpu/drm/i915/i915_pmu.c struct drm_i915_private *i915 = i915 302 drivers/gpu/drm/i915/i915_pmu.c container_of(event->pmu, typeof(*i915), pmu.base); i915 305 drivers/gpu/drm/i915/i915_pmu.c engine = intel_engine_lookup_user(i915, i915 333 drivers/gpu/drm/i915/i915_pmu.c if (INTEL_GEN(engine->i915) < 6) i915 344 drivers/gpu/drm/i915/i915_pmu.c config_status(struct drm_i915_private *i915, u64 config) i915 348 drivers/gpu/drm/i915/i915_pmu.c if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) i915 353 drivers/gpu/drm/i915/i915_pmu.c if (INTEL_GEN(i915) < 6) i915 359 drivers/gpu/drm/i915/i915_pmu.c if (!HAS_RC6(i915)) i915 371 drivers/gpu/drm/i915/i915_pmu.c struct drm_i915_private *i915 = i915 372 drivers/gpu/drm/i915/i915_pmu.c container_of(event->pmu, typeof(*i915), pmu.base); i915 377 drivers/gpu/drm/i915/i915_pmu.c engine = intel_engine_lookup_user(i915, engine_event_class(event), i915 395 drivers/gpu/drm/i915/i915_pmu.c struct drm_i915_private *i915 = i915 396 drivers/gpu/drm/i915/i915_pmu.c container_of(event->pmu, typeof(*i915), pmu.base); i915 419 drivers/gpu/drm/i915/i915_pmu.c ret = config_status(i915, event->attr.config); i915 431 drivers/gpu/drm/i915/i915_pmu.c struct drm_i915_private *i915 = gt->i915; i915 434 drivers/gpu/drm/i915/i915_pmu.c val = intel_rc6_residency_ns(i915, i915 435 drivers/gpu/drm/i915/i915_pmu.c IS_VALLEYVIEW(i915) ? i915 439 drivers/gpu/drm/i915/i915_pmu.c if (HAS_RC6p(i915)) i915 440 drivers/gpu/drm/i915/i915_pmu.c val += intel_rc6_residency_ns(i915, GEN6_GT_GFX_RC6p); i915 442 drivers/gpu/drm/i915/i915_pmu.c if (HAS_RC6pp(i915)) i915 443 drivers/gpu/drm/i915/i915_pmu.c val += intel_rc6_residency_ns(i915, GEN6_GT_GFX_RC6pp); i915 451 drivers/gpu/drm/i915/i915_pmu.c struct drm_i915_private *i915 = gt->i915; i915 452 drivers/gpu/drm/i915/i915_pmu.c struct intel_runtime_pm *rpm = &i915->runtime_pm; i915 453 drivers/gpu/drm/i915/i915_pmu.c struct i915_pmu *pmu = &i915->pmu; i915 529 drivers/gpu/drm/i915/i915_pmu.c struct drm_i915_private *i915 = i915 530 drivers/gpu/drm/i915/i915_pmu.c container_of(event->pmu, typeof(*i915), pmu.base); i915 531 drivers/gpu/drm/i915/i915_pmu.c struct i915_pmu *pmu = &i915->pmu; i915 538 drivers/gpu/drm/i915/i915_pmu.c engine = intel_engine_lookup_user(i915, i915 563 drivers/gpu/drm/i915/i915_pmu.c val = count_interrupts(i915); i915 566 drivers/gpu/drm/i915/i915_pmu.c val = get_rc6(&i915->gt); i915 591 drivers/gpu/drm/i915/i915_pmu.c struct drm_i915_private *i915 = i915 592 drivers/gpu/drm/i915/i915_pmu.c container_of(event->pmu, typeof(*i915), pmu.base); i915 594 drivers/gpu/drm/i915/i915_pmu.c struct i915_pmu *pmu = &i915->pmu; i915 622 drivers/gpu/drm/i915/i915_pmu.c engine = intel_engine_lookup_user(i915, i915 650 drivers/gpu/drm/i915/i915_pmu.c struct drm_i915_private *i915 = i915 651 drivers/gpu/drm/i915/i915_pmu.c container_of(event->pmu, typeof(*i915), pmu.base); i915 653 drivers/gpu/drm/i915/i915_pmu.c struct i915_pmu *pmu = &i915->pmu; i915 662 drivers/gpu/drm/i915/i915_pmu.c engine = intel_engine_lookup_user(i915, i915 840 drivers/gpu/drm/i915/i915_pmu.c struct drm_i915_private *i915 = container_of(pmu, typeof(*i915), pmu); i915 868 drivers/gpu/drm/i915/i915_pmu.c if (!config_status(i915, events[i].config)) i915 872 drivers/gpu/drm/i915/i915_pmu.c for_each_uabi_engine(engine, i915) { i915 902 drivers/gpu/drm/i915/i915_pmu.c if (config_status(i915, events[i].config)) i915 923 drivers/gpu/drm/i915/i915_pmu.c for_each_uabi_engine(engine, i915) { i915 1050 drivers/gpu/drm/i915/i915_pmu.c void i915_pmu_register(struct drm_i915_private *i915) i915 1052 drivers/gpu/drm/i915/i915_pmu.c struct i915_pmu *pmu = &i915->pmu; i915 1055 drivers/gpu/drm/i915/i915_pmu.c if (INTEL_GEN(i915) <= 2) { i915 1056 drivers/gpu/drm/i915/i915_pmu.c dev_info(i915->drm.dev, "PMU not supported for this GPU."); i915 1098 drivers/gpu/drm/i915/i915_pmu.c void i915_pmu_unregister(struct drm_i915_private *i915) i915 1100 drivers/gpu/drm/i915/i915_pmu.c struct i915_pmu *pmu = &i915->pmu; i915 114 drivers/gpu/drm/i915/i915_pmu.h void i915_pmu_register(struct drm_i915_private *i915); i915 115 drivers/gpu/drm/i915/i915_pmu.h void i915_pmu_unregister(struct drm_i915_private *i915); i915 116 drivers/gpu/drm/i915/i915_pmu.h void i915_pmu_gt_parked(struct drm_i915_private *i915); i915 117 drivers/gpu/drm/i915/i915_pmu.h void i915_pmu_gt_unparked(struct drm_i915_private *i915); i915 119 drivers/gpu/drm/i915/i915_pmu.h static inline void i915_pmu_register(struct drm_i915_private *i915) {} i915 120 drivers/gpu/drm/i915/i915_pmu.h static inline void i915_pmu_unregister(struct drm_i915_private *i915) {} i915 121 drivers/gpu/drm/i915/i915_pmu.h static inline void i915_pmu_gt_parked(struct drm_i915_private *i915) {} i915 122 drivers/gpu/drm/i915/i915_pmu.h static inline void i915_pmu_gt_unparked(struct drm_i915_private *i915) {} i915 99 drivers/gpu/drm/i915/i915_query.c query_engine_info(struct drm_i915_private *i915, i915 114 drivers/gpu/drm/i915/i915_query.c RUNTIME_INFO(i915)->num_engines * i915 127 drivers/gpu/drm/i915/i915_query.c for_each_uabi_engine(engine, i915) { i915 292 drivers/gpu/drm/i915/i915_request.c GEM_BUG_ON(!atomic_read(&rq->i915->gt_pm.rps.num_waiters)); i915 293 drivers/gpu/drm/i915/i915_request.c atomic_dec(&rq->i915->gt_pm.rps.num_waiters); i915 690 drivers/gpu/drm/i915/i915_request.c rq->i915 = ce->engine->i915; i915 841 drivers/gpu/drm/i915/i915_request.c GEM_BUG_ON(INTEL_GEN(to->i915) < 8); i915 1478 drivers/gpu/drm/i915/i915_request.c if (!i915_request_started(rq) && INTEL_GEN(rq->i915) >= 6) i915 1517 drivers/gpu/drm/i915/i915_request.c bool i915_retire_requests(struct drm_i915_private *i915) i915 1519 drivers/gpu/drm/i915/i915_request.c struct intel_gt_timelines *timelines = &i915->gt.timelines; i915 101 drivers/gpu/drm/i915/i915_request.h struct drm_i915_private *i915; i915 447 drivers/gpu/drm/i915/i915_request.h bool i915_retire_requests(struct drm_i915_private *i915); i915 62 drivers/gpu/drm/i915/i915_selftest.h #define selftest(name, func) int func(struct drm_i915_private *i915); i915 11 drivers/gpu/drm/i915/i915_suspend.h int i915_save_state(struct drm_i915_private *i915); i915 12 drivers/gpu/drm/i915/i915_suspend.h int i915_restore_state(struct drm_i915_private *i915); i915 517 drivers/gpu/drm/i915/i915_sysfs.c struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); i915 521 drivers/gpu/drm/i915/i915_sysfs.c gpu = i915_first_error_state(i915); i915 11 drivers/gpu/drm/i915/i915_sysfs.h void i915_setup_sysfs(struct drm_i915_private *i915); i915 12 drivers/gpu/drm/i915/i915_sysfs.h void i915_teardown_sysfs(struct drm_i915_private *i915); i915 18 drivers/gpu/drm/i915/i915_trace.h #define TRACE_SYSTEM i915 i915 435 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct drm_i915_private *i915, unsigned long target, unsigned flags), i915 436 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(i915, target, flags), i915 445 drivers/gpu/drm/i915/i915_trace.h __entry->dev = i915->drm.primary->index; i915 605 drivers/gpu/drm/i915/i915_trace.h __entry->dev = vm->i915->drm.primary->index; i915 631 drivers/gpu/drm/i915/i915_trace.h __entry->dev = vm->i915->drm.primary->index; i915 655 drivers/gpu/drm/i915/i915_trace.h __entry->dev = vm->i915->drm.primary->index; i915 677 drivers/gpu/drm/i915/i915_trace.h __entry->dev = rq->i915->drm.primary->index; i915 706 drivers/gpu/drm/i915/i915_trace.h __entry->dev = rq->i915->drm.primary->index; i915 751 drivers/gpu/drm/i915/i915_trace.h __entry->dev = rq->i915->drm.primary->index; i915 782 drivers/gpu/drm/i915/i915_trace.h __entry->dev = rq->i915->drm.primary->index; i915 847 drivers/gpu/drm/i915/i915_trace.h __entry->dev = rq->i915->drm.primary->index; i915 931 drivers/gpu/drm/i915/i915_trace.h __entry->dev = vm->i915->drm.primary->index; i915 966 drivers/gpu/drm/i915/i915_trace.h __entry->dev = ctx->i915->drm.primary->index; i915 990 drivers/gpu/drm/i915/i915_trace.h #define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/i915 i915 56 drivers/gpu/drm/i915/i915_utils.c int __i915_inject_load_error(struct drm_i915_private *i915, int err, i915 65 drivers/gpu/drm/i915/i915_utils.c __i915_printk(i915, KERN_INFO, i915 63 drivers/gpu/drm/i915/i915_utils.h int __i915_inject_load_error(struct drm_i915_private *i915, int err, i915 76 drivers/gpu/drm/i915/i915_utils.h #define i915_inject_probe_failure(i915) i915_inject_load_error((i915), -ENODEV) i915 78 drivers/gpu/drm/i915/i915_utils.h #define i915_probe_error(i915, fmt, ...) \ i915 79 drivers/gpu/drm/i915/i915_utils.h __i915_printk(i915, i915_error_injected() ? KERN_DEBUG : KERN_ERR, \ i915 146 drivers/gpu/drm/i915/i915_vgpu.c if (!intel_vgpu_active(ggtt->vm.i915)) i915 222 drivers/gpu/drm/i915/i915_vgpu.c struct intel_uncore *uncore = &ggtt->vm.i915->uncore; i915 229 drivers/gpu/drm/i915/i915_vgpu.c if (!intel_vgpu_active(ggtt->vm.i915)) i915 107 drivers/gpu/drm/i915/i915_vma.c GEM_BUG_ON(vm == &vm->i915->ggtt.alias->vm); i915 120 drivers/gpu/drm/i915/i915_vma.c i915_active_init(vm->i915, &vma->active, i915 160 drivers/gpu/drm/i915/i915_vma.c vma->fence_size = i915_gem_fence_size(vm->i915, vma->size, i915 169 drivers/gpu/drm/i915/i915_vma.c vma->fence_alignment = i915_gem_fence_alignment(vm->i915, vma->size, i915 353 drivers/gpu/drm/i915/i915_vma.c assert_rpm_wakelock_held(&vma->vm->i915->runtime_pm); i915 355 drivers/gpu/drm/i915/i915_vma.c lockdep_assert_held(&vma->vm->i915->drm.struct_mutex); i915 404 drivers/gpu/drm/i915/i915_vma.c lockdep_assert_held(&vma->vm->i915->drm.struct_mutex); i915 544 drivers/gpu/drm/i915/i915_vma.c struct drm_i915_private *dev_priv = vma->vm->i915; i915 718 drivers/gpu/drm/i915/i915_vma.c lockdep_assert_held(&vma->vm->i915->drm.struct_mutex); i915 759 drivers/gpu/drm/i915/i915_vma.c struct drm_i915_private *i915 = vma->vm->i915; i915 776 drivers/gpu/drm/i915/i915_vma.c spin_lock_irqsave(&i915->gt.closed_lock, flags); i915 777 drivers/gpu/drm/i915/i915_vma.c list_add(&vma->closed_link, &i915->gt.closed_vma); i915 778 drivers/gpu/drm/i915/i915_vma.c spin_unlock_irqrestore(&i915->gt.closed_lock, flags); i915 783 drivers/gpu/drm/i915/i915_vma.c struct drm_i915_private *i915 = vma->vm->i915; i915 788 drivers/gpu/drm/i915/i915_vma.c spin_lock_irq(&i915->gt.closed_lock); i915 790 drivers/gpu/drm/i915/i915_vma.c spin_unlock_irq(&i915->gt.closed_lock); i915 823 drivers/gpu/drm/i915/i915_vma.c lockdep_assert_held(&vma->vm->i915->drm.struct_mutex); i915 835 drivers/gpu/drm/i915/i915_vma.c void i915_vma_parked(struct drm_i915_private *i915) i915 839 drivers/gpu/drm/i915/i915_vma.c spin_lock_irq(&i915->gt.closed_lock); i915 840 drivers/gpu/drm/i915/i915_vma.c list_for_each_entry_safe(vma, next, &i915->gt.closed_vma, closed_link) { i915 842 drivers/gpu/drm/i915/i915_vma.c spin_unlock_irq(&i915->gt.closed_lock); i915 846 drivers/gpu/drm/i915/i915_vma.c spin_lock_irq(&i915->gt.closed_lock); i915 848 drivers/gpu/drm/i915/i915_vma.c spin_unlock_irq(&i915->gt.closed_lock); i915 876 drivers/gpu/drm/i915/i915_vma.c unmap_mapping_range(vma->vm->i915->drm.anon_inode->i_mapping, i915 937 drivers/gpu/drm/i915/i915_vma.c lockdep_assert_held(&vma->vm->i915->drm.struct_mutex); i915 449 drivers/gpu/drm/i915/i915_vma.h void i915_vma_parked(struct drm_i915_private *i915); i915 15 drivers/gpu/drm/i915/intel_csr.h void intel_csr_ucode_init(struct drm_i915_private *i915); i915 16 drivers/gpu/drm/i915/intel_csr.h void intel_csr_load_program(struct drm_i915_private *i915); i915 17 drivers/gpu/drm/i915/intel_csr.h void intel_csr_ucode_fini(struct drm_i915_private *i915); i915 18 drivers/gpu/drm/i915/intel_csr.h void intel_csr_ucode_suspend(struct drm_i915_private *i915); i915 19 drivers/gpu/drm/i915/intel_csr.h void intel_csr_ucode_resume(struct drm_i915_private *i915); i915 810 drivers/gpu/drm/i915/intel_device_info.c void intel_device_info_subplatform_init(struct drm_i915_private *i915) i915 812 drivers/gpu/drm/i915/intel_device_info.c const struct intel_device_info *info = INTEL_INFO(i915); i915 813 drivers/gpu/drm/i915/intel_device_info.c const struct intel_runtime_info *rinfo = RUNTIME_INFO(i915); i915 816 drivers/gpu/drm/i915/intel_device_info.c u16 devid = INTEL_DEVID(i915); i915 820 drivers/gpu/drm/i915/intel_device_info.c RUNTIME_INFO(i915)->platform_mask[pi] = BIT(pb); i915 829 drivers/gpu/drm/i915/intel_device_info.c if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { i915 840 drivers/gpu/drm/i915/intel_device_info.c RUNTIME_INFO(i915)->platform_mask[pi] |= mask; i915 6405 drivers/gpu/drm/i915/intel_pm.c bool ironlake_set_drps(struct drm_i915_private *i915, u8 val) i915 6407 drivers/gpu/drm/i915/intel_pm.c struct intel_uncore *uncore = &i915->uncore; i915 6504 drivers/gpu/drm/i915/intel_pm.c static void ironlake_disable_drps(struct drm_i915_private *i915) i915 6506 drivers/gpu/drm/i915/intel_pm.c struct intel_uncore *uncore = &i915->uncore; i915 6528 drivers/gpu/drm/i915/intel_pm.c ironlake_set_drps(i915, i915->ips.fstart); i915 6683 drivers/gpu/drm/i915/intel_pm.c void intel_rps_mark_interactive(struct drm_i915_private *i915, bool interactive) i915 6685 drivers/gpu/drm/i915/intel_pm.c struct intel_rps *rps = &i915->gt_pm.rps; i915 6687 drivers/gpu/drm/i915/intel_pm.c if (INTEL_GEN(i915) < 6) i915 6692 drivers/gpu/drm/i915/intel_pm.c if (!rps->power.interactive++ && READ_ONCE(i915->gt.awake)) i915 6693 drivers/gpu/drm/i915/intel_pm.c rps_set_power(i915, HIGH_POWER); i915 6873 drivers/gpu/drm/i915/intel_pm.c struct intel_rps *rps = &rq->i915->gt_pm.rps; i915 7034 drivers/gpu/drm/i915/intel_pm.c static bool sanitize_rc6(struct drm_i915_private *i915) i915 7036 drivers/gpu/drm/i915/intel_pm.c struct intel_device_info *info = mkwrite_device_info(i915); i915 7039 drivers/gpu/drm/i915/intel_pm.c if (intel_vgpu_active(i915)) { i915 7045 drivers/gpu/drm/i915/intel_pm.c IS_GEN9_LP(i915) && !bxt_check_bios_rc6_setup(i915)) { i915 8176 drivers/gpu/drm/i915/intel_pm.c unsigned long i915_mch_val(struct drm_i915_private *i915) i915 8181 drivers/gpu/drm/i915/intel_pm.c tsfs = intel_uncore_read(&i915->uncore, TSFS); i915 8184 drivers/gpu/drm/i915/intel_pm.c x = intel_uncore_read8(&i915->uncore, TR1); i915 8318 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *i915; i915 8321 drivers/gpu/drm/i915/intel_pm.c i915 = rcu_dereference(i915_mch_dev); i915 8322 drivers/gpu/drm/i915/intel_pm.c if (!kref_get_unless_zero(&i915->drm.ref)) i915 8323 drivers/gpu/drm/i915/intel_pm.c i915 = NULL; i915 8326 drivers/gpu/drm/i915/intel_pm.c return i915; i915 8337 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *i915; i915 8342 drivers/gpu/drm/i915/intel_pm.c i915 = mchdev_get(); i915 8343 drivers/gpu/drm/i915/intel_pm.c if (!i915) i915 8346 drivers/gpu/drm/i915/intel_pm.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) { i915 8348 drivers/gpu/drm/i915/intel_pm.c chipset_val = __i915_chipset_val(i915); i915 8349 drivers/gpu/drm/i915/intel_pm.c graphics_val = __i915_gfx_val(i915); i915 8353 drivers/gpu/drm/i915/intel_pm.c drm_dev_put(&i915->drm); i915 8365 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *i915; i915 8367 drivers/gpu/drm/i915/intel_pm.c i915 = mchdev_get(); i915 8368 drivers/gpu/drm/i915/intel_pm.c if (!i915) i915 8372 drivers/gpu/drm/i915/intel_pm.c if (i915->ips.max_delay > i915->ips.fmax) i915 8373 drivers/gpu/drm/i915/intel_pm.c i915->ips.max_delay--; i915 8376 drivers/gpu/drm/i915/intel_pm.c drm_dev_put(&i915->drm); i915 8389 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *i915; i915 8391 drivers/gpu/drm/i915/intel_pm.c i915 = mchdev_get(); i915 8392 drivers/gpu/drm/i915/intel_pm.c if (!i915) i915 8396 drivers/gpu/drm/i915/intel_pm.c if (i915->ips.max_delay < i915->ips.min_delay) i915 8397 drivers/gpu/drm/i915/intel_pm.c i915->ips.max_delay++; i915 8400 drivers/gpu/drm/i915/intel_pm.c drm_dev_put(&i915->drm); i915 8412 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *i915; i915 8415 drivers/gpu/drm/i915/intel_pm.c i915 = mchdev_get(); i915 8416 drivers/gpu/drm/i915/intel_pm.c if (!i915) i915 8419 drivers/gpu/drm/i915/intel_pm.c ret = i915->gt.awake; i915 8421 drivers/gpu/drm/i915/intel_pm.c drm_dev_put(&i915->drm); i915 8434 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *i915; i915 8437 drivers/gpu/drm/i915/intel_pm.c i915 = mchdev_get(); i915 8438 drivers/gpu/drm/i915/intel_pm.c if (!i915) i915 8442 drivers/gpu/drm/i915/intel_pm.c i915->ips.max_delay = i915->ips.fstart; i915 8443 drivers/gpu/drm/i915/intel_pm.c ret = ironlake_set_drps(i915, i915->ips.fstart); i915 8446 drivers/gpu/drm/i915/intel_pm.c drm_dev_put(&i915->drm); i915 8560 drivers/gpu/drm/i915/intel_pm.c static void i915_rc6_ctx_wa_init(struct drm_i915_private *i915) i915 8562 drivers/gpu/drm/i915/intel_pm.c if (!NEEDS_RC6_CTX_CORRUPTION_WA(i915)) i915 8565 drivers/gpu/drm/i915/intel_pm.c if (i915_rc6_ctx_corrupted(i915)) { i915 8567 drivers/gpu/drm/i915/intel_pm.c i915->gt_pm.rc6.ctx_corrupted = true; i915 8568 drivers/gpu/drm/i915/intel_pm.c i915->gt_pm.rc6.ctx_corrupted_wakeref = i915 8569 drivers/gpu/drm/i915/intel_pm.c intel_runtime_pm_get(&i915->runtime_pm); i915 8573 drivers/gpu/drm/i915/intel_pm.c static void i915_rc6_ctx_wa_cleanup(struct drm_i915_private *i915) i915 8575 drivers/gpu/drm/i915/intel_pm.c if (i915->gt_pm.rc6.ctx_corrupted) { i915 8576 drivers/gpu/drm/i915/intel_pm.c intel_runtime_pm_put(&i915->runtime_pm, i915 8577 drivers/gpu/drm/i915/intel_pm.c i915->gt_pm.rc6.ctx_corrupted_wakeref); i915 8578 drivers/gpu/drm/i915/intel_pm.c i915->gt_pm.rc6.ctx_corrupted = false; i915 8588 drivers/gpu/drm/i915/intel_pm.c void i915_rc6_ctx_wa_suspend(struct drm_i915_private *i915) i915 8590 drivers/gpu/drm/i915/intel_pm.c if (i915->gt_pm.rc6.ctx_corrupted) i915 8591 drivers/gpu/drm/i915/intel_pm.c intel_runtime_pm_put(&i915->runtime_pm, i915 8592 drivers/gpu/drm/i915/intel_pm.c i915->gt_pm.rc6.ctx_corrupted_wakeref); i915 8601 drivers/gpu/drm/i915/intel_pm.c void i915_rc6_ctx_wa_resume(struct drm_i915_private *i915) i915 8603 drivers/gpu/drm/i915/intel_pm.c if (!i915->gt_pm.rc6.ctx_corrupted) i915 8606 drivers/gpu/drm/i915/intel_pm.c if (i915_rc6_ctx_corrupted(i915)) { i915 8607 drivers/gpu/drm/i915/intel_pm.c i915->gt_pm.rc6.ctx_corrupted_wakeref = i915 8608 drivers/gpu/drm/i915/intel_pm.c intel_runtime_pm_get(&i915->runtime_pm); i915 8613 drivers/gpu/drm/i915/intel_pm.c i915->gt_pm.rc6.ctx_corrupted = false; i915 8628 drivers/gpu/drm/i915/intel_pm.c bool i915_rc6_ctx_wa_check(struct drm_i915_private *i915) i915 8630 drivers/gpu/drm/i915/intel_pm.c if (!NEEDS_RC6_CTX_CORRUPTION_WA(i915)) i915 8633 drivers/gpu/drm/i915/intel_pm.c if (i915->gt_pm.rc6.ctx_corrupted) i915 8636 drivers/gpu/drm/i915/intel_pm.c if (!i915_rc6_ctx_corrupted(i915)) i915 8641 drivers/gpu/drm/i915/intel_pm.c intel_disable_rc6(i915); i915 8642 drivers/gpu/drm/i915/intel_pm.c i915->gt_pm.rc6.ctx_corrupted = true; i915 8643 drivers/gpu/drm/i915/intel_pm.c i915->gt_pm.rc6.ctx_corrupted_wakeref = i915 8644 drivers/gpu/drm/i915/intel_pm.c intel_runtime_pm_get_noresume(&i915->runtime_pm); i915 8720 drivers/gpu/drm/i915/intel_pm.c static inline void intel_disable_llc_pstate(struct drm_i915_private *i915) i915 8722 drivers/gpu/drm/i915/intel_pm.c lockdep_assert_held(&i915->gt_pm.rps.lock); i915 8724 drivers/gpu/drm/i915/intel_pm.c if (!i915->gt_pm.llc_pstate.enabled) i915 8729 drivers/gpu/drm/i915/intel_pm.c i915->gt_pm.llc_pstate.enabled = false; i915 8793 drivers/gpu/drm/i915/intel_pm.c static inline void intel_enable_llc_pstate(struct drm_i915_private *i915) i915 8795 drivers/gpu/drm/i915/intel_pm.c lockdep_assert_held(&i915->gt_pm.rps.lock); i915 8797 drivers/gpu/drm/i915/intel_pm.c if (i915->gt_pm.llc_pstate.enabled) i915 8800 drivers/gpu/drm/i915/intel_pm.c gen6_update_ring_freq(i915); i915 8802 drivers/gpu/drm/i915/intel_pm.c i915->gt_pm.llc_pstate.enabled = true; i915 39 drivers/gpu/drm/i915/intel_pm.h bool i915_rc6_ctx_wa_check(struct drm_i915_private *i915); i915 40 drivers/gpu/drm/i915/intel_pm.h void i915_rc6_ctx_wa_suspend(struct drm_i915_private *i915); i915 41 drivers/gpu/drm/i915/intel_pm.h void i915_rc6_ctx_wa_resume(struct drm_i915_private *i915); i915 90 drivers/gpu/drm/i915/intel_pm.h void intel_rps_mark_interactive(struct drm_i915_private *i915, bool interactive); i915 610 drivers/gpu/drm/i915/intel_runtime_pm.c struct drm_i915_private *i915 = i915 612 drivers/gpu/drm/i915/intel_runtime_pm.c struct pci_dev *pdev = i915->drm.pdev; i915 616 drivers/gpu/drm/i915/intel_runtime_pm.c rpm->available = HAS_RUNTIME_PM(i915); i915 48 drivers/gpu/drm/i915/intel_sideband.c static void __vlv_punit_get(struct drm_i915_private *i915) i915 62 drivers/gpu/drm/i915/intel_sideband.c if (IS_VALLEYVIEW(i915)) { i915 63 drivers/gpu/drm/i915/intel_sideband.c pm_qos_update_request(&i915->sb_qos, 0); i915 68 drivers/gpu/drm/i915/intel_sideband.c static void __vlv_punit_put(struct drm_i915_private *i915) i915 70 drivers/gpu/drm/i915/intel_sideband.c if (IS_VALLEYVIEW(i915)) i915 71 drivers/gpu/drm/i915/intel_sideband.c pm_qos_update_request(&i915->sb_qos, PM_QOS_DEFAULT_VALUE); i915 76 drivers/gpu/drm/i915/intel_sideband.c void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports) i915 79 drivers/gpu/drm/i915/intel_sideband.c __vlv_punit_get(i915); i915 81 drivers/gpu/drm/i915/intel_sideband.c mutex_lock(&i915->sb_lock); i915 84 drivers/gpu/drm/i915/intel_sideband.c void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports) i915 86 drivers/gpu/drm/i915/intel_sideband.c mutex_unlock(&i915->sb_lock); i915 89 drivers/gpu/drm/i915/intel_sideband.c __vlv_punit_put(i915); i915 92 drivers/gpu/drm/i915/intel_sideband.c static int vlv_sideband_rw(struct drm_i915_private *i915, i915 96 drivers/gpu/drm/i915/intel_sideband.c struct intel_uncore *uncore = &i915->uncore; i915 100 drivers/gpu/drm/i915/intel_sideband.c lockdep_assert_held(&i915->sb_lock); i915 142 drivers/gpu/drm/i915/intel_sideband.c u32 vlv_punit_read(struct drm_i915_private *i915, u32 addr) i915 146 drivers/gpu/drm/i915/intel_sideband.c vlv_sideband_rw(i915, PCI_DEVFN(0, 0), IOSF_PORT_PUNIT, i915 152 drivers/gpu/drm/i915/intel_sideband.c int vlv_punit_write(struct drm_i915_private *i915, u32 addr, u32 val) i915 154 drivers/gpu/drm/i915/intel_sideband.c return vlv_sideband_rw(i915, PCI_DEVFN(0, 0), IOSF_PORT_PUNIT, i915 158 drivers/gpu/drm/i915/intel_sideband.c u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg) i915 162 drivers/gpu/drm/i915/intel_sideband.c vlv_sideband_rw(i915, PCI_DEVFN(0, 0), IOSF_PORT_BUNIT, i915 168 drivers/gpu/drm/i915/intel_sideband.c void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val) i915 170 drivers/gpu/drm/i915/intel_sideband.c vlv_sideband_rw(i915, PCI_DEVFN(0, 0), IOSF_PORT_BUNIT, i915 174 drivers/gpu/drm/i915/intel_sideband.c u32 vlv_nc_read(struct drm_i915_private *i915, u8 addr) i915 178 drivers/gpu/drm/i915/intel_sideband.c vlv_sideband_rw(i915, PCI_DEVFN(0, 0), IOSF_PORT_NC, i915 184 drivers/gpu/drm/i915/intel_sideband.c u32 vlv_iosf_sb_read(struct drm_i915_private *i915, u8 port, u32 reg) i915 188 drivers/gpu/drm/i915/intel_sideband.c vlv_sideband_rw(i915, PCI_DEVFN(0, 0), port, i915 194 drivers/gpu/drm/i915/intel_sideband.c void vlv_iosf_sb_write(struct drm_i915_private *i915, i915 197 drivers/gpu/drm/i915/intel_sideband.c vlv_sideband_rw(i915, PCI_DEVFN(0, 0), port, i915 201 drivers/gpu/drm/i915/intel_sideband.c u32 vlv_cck_read(struct drm_i915_private *i915, u32 reg) i915 205 drivers/gpu/drm/i915/intel_sideband.c vlv_sideband_rw(i915, PCI_DEVFN(0, 0), IOSF_PORT_CCK, i915 211 drivers/gpu/drm/i915/intel_sideband.c void vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val) i915 213 drivers/gpu/drm/i915/intel_sideband.c vlv_sideband_rw(i915, PCI_DEVFN(0, 0), IOSF_PORT_CCK, i915 217 drivers/gpu/drm/i915/intel_sideband.c u32 vlv_ccu_read(struct drm_i915_private *i915, u32 reg) i915 221 drivers/gpu/drm/i915/intel_sideband.c vlv_sideband_rw(i915, PCI_DEVFN(0, 0), IOSF_PORT_CCU, i915 227 drivers/gpu/drm/i915/intel_sideband.c void vlv_ccu_write(struct drm_i915_private *i915, u32 reg, u32 val) i915 229 drivers/gpu/drm/i915/intel_sideband.c vlv_sideband_rw(i915, PCI_DEVFN(0, 0), IOSF_PORT_CCU, i915 233 drivers/gpu/drm/i915/intel_sideband.c u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg) i915 235 drivers/gpu/drm/i915/intel_sideband.c int port = i915->dpio_phy_iosf_port[DPIO_PHY(pipe)]; i915 238 drivers/gpu/drm/i915/intel_sideband.c vlv_sideband_rw(i915, DPIO_DEVFN, port, SB_MRD_NP, reg, &val); i915 250 drivers/gpu/drm/i915/intel_sideband.c void vlv_dpio_write(struct drm_i915_private *i915, i915 253 drivers/gpu/drm/i915/intel_sideband.c int port = i915->dpio_phy_iosf_port[DPIO_PHY(pipe)]; i915 255 drivers/gpu/drm/i915/intel_sideband.c vlv_sideband_rw(i915, DPIO_DEVFN, port, SB_MWR_NP, reg, &val); i915 258 drivers/gpu/drm/i915/intel_sideband.c u32 vlv_flisdsi_read(struct drm_i915_private *i915, u32 reg) i915 262 drivers/gpu/drm/i915/intel_sideband.c vlv_sideband_rw(i915, DPIO_DEVFN, IOSF_PORT_FLISDSI, SB_CRRDDA_NP, i915 267 drivers/gpu/drm/i915/intel_sideband.c void vlv_flisdsi_write(struct drm_i915_private *i915, u32 reg, u32 val) i915 269 drivers/gpu/drm/i915/intel_sideband.c vlv_sideband_rw(i915, DPIO_DEVFN, IOSF_PORT_FLISDSI, SB_CRWRDA_NP, i915 274 drivers/gpu/drm/i915/intel_sideband.c static int intel_sbi_rw(struct drm_i915_private *i915, u16 reg, i915 278 drivers/gpu/drm/i915/intel_sideband.c struct intel_uncore *uncore = &i915->uncore; i915 281 drivers/gpu/drm/i915/intel_sideband.c lockdep_assert_held(&i915->sb_lock); i915 319 drivers/gpu/drm/i915/intel_sideband.c u32 intel_sbi_read(struct drm_i915_private *i915, u16 reg, i915 324 drivers/gpu/drm/i915/intel_sideband.c intel_sbi_rw(i915, reg, destination, &result, true); i915 329 drivers/gpu/drm/i915/intel_sideband.c void intel_sbi_write(struct drm_i915_private *i915, u16 reg, u32 value, i915 332 drivers/gpu/drm/i915/intel_sideband.c intel_sbi_rw(i915, reg, destination, &value, false); i915 374 drivers/gpu/drm/i915/intel_sideband.c static int __sandybridge_pcode_rw(struct drm_i915_private *i915, i915 380 drivers/gpu/drm/i915/intel_sideband.c struct intel_uncore *uncore = &i915->uncore; i915 382 drivers/gpu/drm/i915/intel_sideband.c lockdep_assert_held(&i915->sb_lock); i915 411 drivers/gpu/drm/i915/intel_sideband.c if (INTEL_GEN(i915) > 6) i915 417 drivers/gpu/drm/i915/intel_sideband.c int sandybridge_pcode_read(struct drm_i915_private *i915, u32 mbox, i915 422 drivers/gpu/drm/i915/intel_sideband.c mutex_lock(&i915->sb_lock); i915 423 drivers/gpu/drm/i915/intel_sideband.c err = __sandybridge_pcode_rw(i915, mbox, val, val1, i915 426 drivers/gpu/drm/i915/intel_sideband.c mutex_unlock(&i915->sb_lock); i915 436 drivers/gpu/drm/i915/intel_sideband.c int sandybridge_pcode_write_timeout(struct drm_i915_private *i915, i915 443 drivers/gpu/drm/i915/intel_sideband.c mutex_lock(&i915->sb_lock); i915 444 drivers/gpu/drm/i915/intel_sideband.c err = __sandybridge_pcode_rw(i915, mbox, &val, NULL, i915 447 drivers/gpu/drm/i915/intel_sideband.c mutex_unlock(&i915->sb_lock); i915 457 drivers/gpu/drm/i915/intel_sideband.c static bool skl_pcode_try_request(struct drm_i915_private *i915, u32 mbox, i915 461 drivers/gpu/drm/i915/intel_sideband.c *status = __sandybridge_pcode_rw(i915, mbox, &request, NULL, i915 487 drivers/gpu/drm/i915/intel_sideband.c int skl_pcode_request(struct drm_i915_private *i915, u32 mbox, u32 request, i915 493 drivers/gpu/drm/i915/intel_sideband.c mutex_lock(&i915->sb_lock); i915 496 drivers/gpu/drm/i915/intel_sideband.c skl_pcode_try_request(i915, mbox, request, reply_mask, reply, &status) i915 529 drivers/gpu/drm/i915/intel_sideband.c mutex_unlock(&i915->sb_lock); i915 28 drivers/gpu/drm/i915/intel_sideband.h void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports); i915 29 drivers/gpu/drm/i915/intel_sideband.h u32 vlv_iosf_sb_read(struct drm_i915_private *i915, u8 port, u32 reg); i915 30 drivers/gpu/drm/i915/intel_sideband.h void vlv_iosf_sb_write(struct drm_i915_private *i915, i915 32 drivers/gpu/drm/i915/intel_sideband.h void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports); i915 34 drivers/gpu/drm/i915/intel_sideband.h static inline void vlv_bunit_get(struct drm_i915_private *i915) i915 36 drivers/gpu/drm/i915/intel_sideband.h vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_BUNIT)); i915 39 drivers/gpu/drm/i915/intel_sideband.h u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg); i915 40 drivers/gpu/drm/i915/intel_sideband.h void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val); i915 42 drivers/gpu/drm/i915/intel_sideband.h static inline void vlv_bunit_put(struct drm_i915_private *i915) i915 44 drivers/gpu/drm/i915/intel_sideband.h vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_BUNIT)); i915 47 drivers/gpu/drm/i915/intel_sideband.h static inline void vlv_cck_get(struct drm_i915_private *i915) i915 49 drivers/gpu/drm/i915/intel_sideband.h vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCK)); i915 52 drivers/gpu/drm/i915/intel_sideband.h u32 vlv_cck_read(struct drm_i915_private *i915, u32 reg); i915 53 drivers/gpu/drm/i915/intel_sideband.h void vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val); i915 55 drivers/gpu/drm/i915/intel_sideband.h static inline void vlv_cck_put(struct drm_i915_private *i915) i915 57 drivers/gpu/drm/i915/intel_sideband.h vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCK)); i915 60 drivers/gpu/drm/i915/intel_sideband.h static inline void vlv_ccu_get(struct drm_i915_private *i915) i915 62 drivers/gpu/drm/i915/intel_sideband.h vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCU)); i915 65 drivers/gpu/drm/i915/intel_sideband.h u32 vlv_ccu_read(struct drm_i915_private *i915, u32 reg); i915 66 drivers/gpu/drm/i915/intel_sideband.h void vlv_ccu_write(struct drm_i915_private *i915, u32 reg, u32 val); i915 68 drivers/gpu/drm/i915/intel_sideband.h static inline void vlv_ccu_put(struct drm_i915_private *i915) i915 70 drivers/gpu/drm/i915/intel_sideband.h vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCU)); i915 73 drivers/gpu/drm/i915/intel_sideband.h static inline void vlv_dpio_get(struct drm_i915_private *i915) i915 75 drivers/gpu/drm/i915/intel_sideband.h vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_DPIO)); i915 78 drivers/gpu/drm/i915/intel_sideband.h u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg); i915 79 drivers/gpu/drm/i915/intel_sideband.h void vlv_dpio_write(struct drm_i915_private *i915, i915 82 drivers/gpu/drm/i915/intel_sideband.h static inline void vlv_dpio_put(struct drm_i915_private *i915) i915 84 drivers/gpu/drm/i915/intel_sideband.h vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_DPIO)); i915 87 drivers/gpu/drm/i915/intel_sideband.h static inline void vlv_flisdsi_get(struct drm_i915_private *i915) i915 89 drivers/gpu/drm/i915/intel_sideband.h vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_FLISDSI)); i915 92 drivers/gpu/drm/i915/intel_sideband.h u32 vlv_flisdsi_read(struct drm_i915_private *i915, u32 reg); i915 93 drivers/gpu/drm/i915/intel_sideband.h void vlv_flisdsi_write(struct drm_i915_private *i915, u32 reg, u32 val); i915 95 drivers/gpu/drm/i915/intel_sideband.h static inline void vlv_flisdsi_put(struct drm_i915_private *i915) i915 97 drivers/gpu/drm/i915/intel_sideband.h vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_FLISDSI)); i915 100 drivers/gpu/drm/i915/intel_sideband.h static inline void vlv_nc_get(struct drm_i915_private *i915) i915 102 drivers/gpu/drm/i915/intel_sideband.h vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_NC)); i915 105 drivers/gpu/drm/i915/intel_sideband.h u32 vlv_nc_read(struct drm_i915_private *i915, u8 addr); i915 107 drivers/gpu/drm/i915/intel_sideband.h static inline void vlv_nc_put(struct drm_i915_private *i915) i915 109 drivers/gpu/drm/i915/intel_sideband.h vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_NC)); i915 112 drivers/gpu/drm/i915/intel_sideband.h static inline void vlv_punit_get(struct drm_i915_private *i915) i915 114 drivers/gpu/drm/i915/intel_sideband.h vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_PUNIT)); i915 117 drivers/gpu/drm/i915/intel_sideband.h u32 vlv_punit_read(struct drm_i915_private *i915, u32 addr); i915 118 drivers/gpu/drm/i915/intel_sideband.h int vlv_punit_write(struct drm_i915_private *i915, u32 addr, u32 val); i915 120 drivers/gpu/drm/i915/intel_sideband.h static inline void vlv_punit_put(struct drm_i915_private *i915) i915 122 drivers/gpu/drm/i915/intel_sideband.h vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_PUNIT)); i915 125 drivers/gpu/drm/i915/intel_sideband.h u32 intel_sbi_read(struct drm_i915_private *i915, u16 reg, i915 127 drivers/gpu/drm/i915/intel_sideband.h void intel_sbi_write(struct drm_i915_private *i915, u16 reg, u32 value, i915 130 drivers/gpu/drm/i915/intel_sideband.h int sandybridge_pcode_read(struct drm_i915_private *i915, u32 mbox, i915 132 drivers/gpu/drm/i915/intel_sideband.h int sandybridge_pcode_write_timeout(struct drm_i915_private *i915, u32 mbox, i915 135 drivers/gpu/drm/i915/intel_sideband.h #define sandybridge_pcode_write(i915, mbox, val) \ i915 136 drivers/gpu/drm/i915/intel_sideband.h sandybridge_pcode_write_timeout(i915, mbox, val, 500, 0) i915 138 drivers/gpu/drm/i915/intel_sideband.h int skl_pcode_request(struct drm_i915_private *i915, u32 mbox, u32 request, i915 353 drivers/gpu/drm/i915/intel_uncore.c if (IS_VALLEYVIEW(uncore->i915)) i915 528 drivers/gpu/drm/i915/intel_uncore.c if (IS_CHERRYVIEW(uncore->i915)) { i915 666 drivers/gpu/drm/i915/intel_uncore.c dev_info(uncore->i915->drm.dev, i915 1367 drivers/gpu/drm/i915/intel_uncore.c if (i915_inject_probe_failure(uncore->i915)) i915 1436 drivers/gpu/drm/i915/intel_uncore.c struct drm_i915_private *i915 = uncore->i915; i915 1444 drivers/gpu/drm/i915/intel_uncore.c if (INTEL_GEN(i915) >= 11) { i915 1457 drivers/gpu/drm/i915/intel_uncore.c if (!HAS_ENGINE(i915, _VCS(i))) i915 1465 drivers/gpu/drm/i915/intel_uncore.c if (!HAS_ENGINE(i915, _VECS(i))) i915 1472 drivers/gpu/drm/i915/intel_uncore.c } else if (IS_GEN_RANGE(i915, 9, 10)) { i915 1483 drivers/gpu/drm/i915/intel_uncore.c } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { i915 1490 drivers/gpu/drm/i915/intel_uncore.c } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { i915 1496 drivers/gpu/drm/i915/intel_uncore.c } else if (IS_IVYBRIDGE(i915)) { i915 1540 drivers/gpu/drm/i915/intel_uncore.c } else if (IS_GEN(i915, 6)) { i915 1602 drivers/gpu/drm/i915/intel_uncore.c struct drm_i915_private *i915 = uncore->i915; i915 1603 drivers/gpu/drm/i915/intel_uncore.c struct pci_dev *pdev = i915->drm.pdev; i915 1607 drivers/gpu/drm/i915/intel_uncore.c mmio_bar = IS_GEN(i915, 2) ? 1 : 0; i915 1616 drivers/gpu/drm/i915/intel_uncore.c if (INTEL_GEN(i915) < 5) i915 1632 drivers/gpu/drm/i915/intel_uncore.c struct pci_dev *pdev = uncore->i915->drm.pdev; i915 1638 drivers/gpu/drm/i915/intel_uncore.c struct drm_i915_private *i915) i915 1641 drivers/gpu/drm/i915/intel_uncore.c uncore->i915 = i915; i915 1642 drivers/gpu/drm/i915/intel_uncore.c uncore->rpm = &i915->runtime_pm; i915 1643 drivers/gpu/drm/i915/intel_uncore.c uncore->debug = &i915->mmio_debug; i915 1650 drivers/gpu/drm/i915/intel_uncore.c if (IS_GEN(uncore->i915, 5)) { i915 1661 drivers/gpu/drm/i915/intel_uncore.c struct drm_i915_private *i915 = uncore->i915; i915 1671 drivers/gpu/drm/i915/intel_uncore.c if (IS_GEN_RANGE(i915, 6, 7)) { i915 1674 drivers/gpu/drm/i915/intel_uncore.c if (IS_VALLEYVIEW(i915)) { i915 1680 drivers/gpu/drm/i915/intel_uncore.c } else if (IS_GEN(i915, 8)) { i915 1681 drivers/gpu/drm/i915/intel_uncore.c if (IS_CHERRYVIEW(i915)) { i915 1689 drivers/gpu/drm/i915/intel_uncore.c } else if (IS_GEN_RANGE(i915, 9, 10)) { i915 1707 drivers/gpu/drm/i915/intel_uncore.c struct drm_i915_private *i915 = uncore->i915; i915 1714 drivers/gpu/drm/i915/intel_uncore.c if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915)) i915 1731 drivers/gpu/drm/i915/intel_uncore.c if (HAS_FPGA_DBG_UNCLAIMED(i915)) i915 1734 drivers/gpu/drm/i915/intel_uncore.c if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) i915 1737 drivers/gpu/drm/i915/intel_uncore.c if (IS_GEN_RANGE(i915, 6, 7)) i915 1759 drivers/gpu/drm/i915/intel_uncore.c struct drm_i915_private *i915 = uncore->i915; i915 1764 drivers/gpu/drm/i915/intel_uncore.c if (!intel_uncore_has_forcewake(uncore) || INTEL_GEN(i915) < 11) i915 1770 drivers/gpu/drm/i915/intel_uncore.c if (HAS_ENGINE(i915, _VCS(i))) i915 1780 drivers/gpu/drm/i915/intel_uncore.c if (HAS_ENGINE(i915, _VECS(i))) i915 1817 drivers/gpu/drm/i915/intel_uncore.c struct drm_i915_private *i915 = to_i915(dev); i915 1818 drivers/gpu/drm/i915/intel_uncore.c struct intel_uncore *uncore = &i915->uncore; i915 1835 drivers/gpu/drm/i915/intel_uncore.c if (INTEL_INFO(i915)->gen_mask & entry->gen_mask && i915 1847 drivers/gpu/drm/i915/intel_uncore.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) { i915 112 drivers/gpu/drm/i915/intel_uncore.h struct drm_i915_private *i915; i915 187 drivers/gpu/drm/i915/intel_uncore.h struct drm_i915_private *i915); i915 79 drivers/gpu/drm/i915/intel_wopcm.c struct drm_i915_private *i915 = wopcm_to_i915(wopcm); i915 81 drivers/gpu/drm/i915/intel_wopcm.c if (!HAS_GT_UC(i915)) i915 84 drivers/gpu/drm/i915/intel_wopcm.c if (INTEL_GEN(i915) >= 11) i915 89 drivers/gpu/drm/i915/intel_wopcm.c DRM_DEV_DEBUG_DRIVER(i915->drm.dev, "WOPCM: %uK\n", wopcm->size / 1024); i915 92 drivers/gpu/drm/i915/intel_wopcm.c static inline u32 context_reserved_size(struct drm_i915_private *i915) i915 94 drivers/gpu/drm/i915/intel_wopcm.c if (IS_GEN9_LP(i915)) i915 96 drivers/gpu/drm/i915/intel_wopcm.c else if (INTEL_GEN(i915) >= 10) i915 102 drivers/gpu/drm/i915/intel_wopcm.c static inline bool gen9_check_dword_gap(struct drm_i915_private *i915, i915 115 drivers/gpu/drm/i915/intel_wopcm.c dev_err(i915->drm.dev, i915 125 drivers/gpu/drm/i915/intel_wopcm.c static inline bool gen9_check_huc_fw_fits(struct drm_i915_private *i915, i915 134 drivers/gpu/drm/i915/intel_wopcm.c dev_err(i915->drm.dev, "WOPCM: no space for %s: %uK < %uK\n", i915 144 drivers/gpu/drm/i915/intel_wopcm.c static inline bool check_hw_restrictions(struct drm_i915_private *i915, i915 148 drivers/gpu/drm/i915/intel_wopcm.c if (IS_GEN(i915, 9) && !gen9_check_dword_gap(i915, guc_wopcm_base, i915 152 drivers/gpu/drm/i915/intel_wopcm.c if ((IS_GEN(i915, 9) || i915 153 drivers/gpu/drm/i915/intel_wopcm.c IS_CNL_REVID(i915, CNL_REVID_A0, CNL_REVID_A0)) && i915 154 drivers/gpu/drm/i915/intel_wopcm.c !gen9_check_huc_fw_fits(i915, guc_wopcm_size, huc_fw_size)) i915 160 drivers/gpu/drm/i915/intel_wopcm.c static inline bool __check_layout(struct drm_i915_private *i915, u32 wopcm_size, i915 164 drivers/gpu/drm/i915/intel_wopcm.c const u32 ctx_rsvd = context_reserved_size(i915); i915 169 drivers/gpu/drm/i915/intel_wopcm.c dev_err(i915->drm.dev, i915 178 drivers/gpu/drm/i915/intel_wopcm.c dev_err(i915->drm.dev, "WOPCM: no space for %s: %uK < %uK\n", i915 186 drivers/gpu/drm/i915/intel_wopcm.c dev_err(i915->drm.dev, "WOPCM: no space for %s: %uK < %uK\n", i915 192 drivers/gpu/drm/i915/intel_wopcm.c return check_hw_restrictions(i915, guc_wopcm_base, guc_wopcm_size, i915 223 drivers/gpu/drm/i915/intel_wopcm.c struct drm_i915_private *i915 = wopcm_to_i915(wopcm); i915 224 drivers/gpu/drm/i915/intel_wopcm.c struct intel_gt *gt = &i915->gt; i915 227 drivers/gpu/drm/i915/intel_wopcm.c u32 ctx_rsvd = context_reserved_size(i915); i915 241 drivers/gpu/drm/i915/intel_wopcm.c if (i915_inject_probe_failure(i915)) i915 245 drivers/gpu/drm/i915/intel_wopcm.c DRM_DEV_DEBUG_DRIVER(i915->drm.dev, i915 269 drivers/gpu/drm/i915/intel_wopcm.c DRM_DEV_DEBUG_DRIVER(i915->drm.dev, "Calculated GuC WOPCM [%uK, %uK)\n", i915 273 drivers/gpu/drm/i915/intel_wopcm.c if (__check_layout(i915, wopcm->size, guc_wopcm_base, guc_wopcm_size, i915 62 drivers/gpu/drm/i915/selftests/i915_active.c static struct live_active *__live_alloc(struct drm_i915_private *i915) i915 71 drivers/gpu/drm/i915/selftests/i915_active.c i915_active_init(i915, &active->base, __live_active, __live_retire); i915 77 drivers/gpu/drm/i915/selftests/i915_active.c __live_active_setup(struct drm_i915_private *i915) i915 86 drivers/gpu/drm/i915/selftests/i915_active.c active = __live_alloc(i915); i915 100 drivers/gpu/drm/i915/selftests/i915_active.c for_each_engine(engine, i915, id) { i915 147 drivers/gpu/drm/i915/selftests/i915_active.c struct drm_i915_private *i915 = arg; i915 154 drivers/gpu/drm/i915/selftests/i915_active.c mutex_lock(&i915->drm.struct_mutex); i915 155 drivers/gpu/drm/i915/selftests/i915_active.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 157 drivers/gpu/drm/i915/selftests/i915_active.c active = __live_active_setup(i915); i915 171 drivers/gpu/drm/i915/selftests/i915_active.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 175 drivers/gpu/drm/i915/selftests/i915_active.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 176 drivers/gpu/drm/i915/selftests/i915_active.c mutex_unlock(&i915->drm.struct_mutex); i915 183 drivers/gpu/drm/i915/selftests/i915_active.c struct drm_i915_private *i915 = arg; i915 190 drivers/gpu/drm/i915/selftests/i915_active.c mutex_lock(&i915->drm.struct_mutex); i915 191 drivers/gpu/drm/i915/selftests/i915_active.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 193 drivers/gpu/drm/i915/selftests/i915_active.c active = __live_active_setup(i915); i915 200 drivers/gpu/drm/i915/selftests/i915_active.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 211 drivers/gpu/drm/i915/selftests/i915_active.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 212 drivers/gpu/drm/i915/selftests/i915_active.c mutex_unlock(&i915->drm.struct_mutex); i915 217 drivers/gpu/drm/i915/selftests/i915_active.c int i915_active_live_selftests(struct drm_i915_private *i915) i915 224 drivers/gpu/drm/i915/selftests/i915_active.c if (intel_gt_is_wedged(&i915->gt)) i915 227 drivers/gpu/drm/i915/selftests/i915_active.c return i915_subtests(tests, i915); i915 18 drivers/gpu/drm/i915/selftests/i915_gem.c static int switch_to_context(struct drm_i915_private *i915, i915 24 drivers/gpu/drm/i915/selftests/i915_gem.c for_each_engine(engine, i915, id) { i915 37 drivers/gpu/drm/i915/selftests/i915_gem.c static void trash_stolen(struct drm_i915_private *i915) i915 39 drivers/gpu/drm/i915/selftests/i915_gem.c struct i915_ggtt *ggtt = &i915->ggtt; i915 41 drivers/gpu/drm/i915/selftests/i915_gem.c const resource_size_t size = resource_size(&i915->dsm); i915 46 drivers/gpu/drm/i915/selftests/i915_gem.c const dma_addr_t dma = i915->dsm.start + page; i915 63 drivers/gpu/drm/i915/selftests/i915_gem.c static void simulate_hibernate(struct drm_i915_private *i915) i915 67 drivers/gpu/drm/i915/selftests/i915_gem.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 76 drivers/gpu/drm/i915/selftests/i915_gem.c trash_stolen(i915); i915 78 drivers/gpu/drm/i915/selftests/i915_gem.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 81 drivers/gpu/drm/i915/selftests/i915_gem.c static int pm_prepare(struct drm_i915_private *i915) i915 83 drivers/gpu/drm/i915/selftests/i915_gem.c i915_gem_suspend(i915); i915 88 drivers/gpu/drm/i915/selftests/i915_gem.c static void pm_suspend(struct drm_i915_private *i915) i915 92 drivers/gpu/drm/i915/selftests/i915_gem.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) { i915 93 drivers/gpu/drm/i915/selftests/i915_gem.c i915_gem_suspend_gtt_mappings(i915); i915 94 drivers/gpu/drm/i915/selftests/i915_gem.c i915_gem_suspend_late(i915); i915 98 drivers/gpu/drm/i915/selftests/i915_gem.c static void pm_hibernate(struct drm_i915_private *i915) i915 102 drivers/gpu/drm/i915/selftests/i915_gem.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) { i915 103 drivers/gpu/drm/i915/selftests/i915_gem.c i915_gem_suspend_gtt_mappings(i915); i915 105 drivers/gpu/drm/i915/selftests/i915_gem.c i915_gem_freeze(i915); i915 106 drivers/gpu/drm/i915/selftests/i915_gem.c i915_gem_freeze_late(i915); i915 110 drivers/gpu/drm/i915/selftests/i915_gem.c static void pm_resume(struct drm_i915_private *i915) i915 118 drivers/gpu/drm/i915/selftests/i915_gem.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) { i915 119 drivers/gpu/drm/i915/selftests/i915_gem.c intel_gt_sanitize(&i915->gt, false); i915 120 drivers/gpu/drm/i915/selftests/i915_gem.c i915_gem_sanitize(i915); i915 122 drivers/gpu/drm/i915/selftests/i915_gem.c mutex_lock(&i915->drm.struct_mutex); i915 123 drivers/gpu/drm/i915/selftests/i915_gem.c i915_gem_restore_gtt_mappings(i915); i915 124 drivers/gpu/drm/i915/selftests/i915_gem.c i915_gem_restore_fences(i915); i915 125 drivers/gpu/drm/i915/selftests/i915_gem.c mutex_unlock(&i915->drm.struct_mutex); i915 127 drivers/gpu/drm/i915/selftests/i915_gem.c i915_gem_resume(i915); i915 133 drivers/gpu/drm/i915/selftests/i915_gem.c struct drm_i915_private *i915 = arg; i915 138 drivers/gpu/drm/i915/selftests/i915_gem.c file = mock_file(i915); i915 143 drivers/gpu/drm/i915/selftests/i915_gem.c mutex_lock(&i915->drm.struct_mutex); i915 144 drivers/gpu/drm/i915/selftests/i915_gem.c ctx = live_context(i915, file); i915 146 drivers/gpu/drm/i915/selftests/i915_gem.c err = switch_to_context(i915, ctx); i915 147 drivers/gpu/drm/i915/selftests/i915_gem.c mutex_unlock(&i915->drm.struct_mutex); i915 151 drivers/gpu/drm/i915/selftests/i915_gem.c err = pm_prepare(i915); i915 155 drivers/gpu/drm/i915/selftests/i915_gem.c pm_suspend(i915); i915 158 drivers/gpu/drm/i915/selftests/i915_gem.c simulate_hibernate(i915); i915 160 drivers/gpu/drm/i915/selftests/i915_gem.c pm_resume(i915); i915 162 drivers/gpu/drm/i915/selftests/i915_gem.c mutex_lock(&i915->drm.struct_mutex); i915 163 drivers/gpu/drm/i915/selftests/i915_gem.c err = switch_to_context(i915, ctx); i915 164 drivers/gpu/drm/i915/selftests/i915_gem.c mutex_unlock(&i915->drm.struct_mutex); i915 166 drivers/gpu/drm/i915/selftests/i915_gem.c mock_file_free(i915, file); i915 172 drivers/gpu/drm/i915/selftests/i915_gem.c struct drm_i915_private *i915 = arg; i915 177 drivers/gpu/drm/i915/selftests/i915_gem.c file = mock_file(i915); i915 182 drivers/gpu/drm/i915/selftests/i915_gem.c mutex_lock(&i915->drm.struct_mutex); i915 183 drivers/gpu/drm/i915/selftests/i915_gem.c ctx = live_context(i915, file); i915 185 drivers/gpu/drm/i915/selftests/i915_gem.c err = switch_to_context(i915, ctx); i915 186 drivers/gpu/drm/i915/selftests/i915_gem.c mutex_unlock(&i915->drm.struct_mutex); i915 190 drivers/gpu/drm/i915/selftests/i915_gem.c err = pm_prepare(i915); i915 194 drivers/gpu/drm/i915/selftests/i915_gem.c pm_hibernate(i915); i915 197 drivers/gpu/drm/i915/selftests/i915_gem.c simulate_hibernate(i915); i915 199 drivers/gpu/drm/i915/selftests/i915_gem.c pm_resume(i915); i915 201 drivers/gpu/drm/i915/selftests/i915_gem.c mutex_lock(&i915->drm.struct_mutex); i915 202 drivers/gpu/drm/i915/selftests/i915_gem.c err = switch_to_context(i915, ctx); i915 203 drivers/gpu/drm/i915/selftests/i915_gem.c mutex_unlock(&i915->drm.struct_mutex); i915 205 drivers/gpu/drm/i915/selftests/i915_gem.c mock_file_free(i915, file); i915 209 drivers/gpu/drm/i915/selftests/i915_gem.c int i915_gem_live_selftests(struct drm_i915_private *i915) i915 216 drivers/gpu/drm/i915/selftests/i915_gem.c if (intel_gt_is_wedged(&i915->gt)) i915 219 drivers/gpu/drm/i915/selftests/i915_gem.c return i915_live_subtests(tests, i915); i915 46 drivers/gpu/drm/i915/selftests/i915_gem_evict.c static int populate_ggtt(struct drm_i915_private *i915, i915 56 drivers/gpu/drm/i915/selftests/i915_gem_evict.c obj = i915_gem_object_create_internal(i915, I915_GTT_PAGE_SIZE); i915 73 drivers/gpu/drm/i915/selftests/i915_gem_evict.c count, i915->ggtt.vm.total / PAGE_SIZE); i915 99 drivers/gpu/drm/i915/selftests/i915_gem_evict.c if (list_empty(&i915->ggtt.vm.bound_list)) { i915 107 drivers/gpu/drm/i915/selftests/i915_gem_evict.c static void unpin_ggtt(struct drm_i915_private *i915) i915 109 drivers/gpu/drm/i915/selftests/i915_gem_evict.c struct i915_ggtt *ggtt = &i915->ggtt; i915 113 drivers/gpu/drm/i915/selftests/i915_gem_evict.c list_for_each_entry(vma, &i915->ggtt.vm.bound_list, vm_link) i915 119 drivers/gpu/drm/i915/selftests/i915_gem_evict.c static void cleanup_objects(struct drm_i915_private *i915, i915 130 drivers/gpu/drm/i915/selftests/i915_gem_evict.c mutex_unlock(&i915->drm.struct_mutex); i915 132 drivers/gpu/drm/i915/selftests/i915_gem_evict.c i915_gem_drain_freed_objects(i915); i915 134 drivers/gpu/drm/i915/selftests/i915_gem_evict.c mutex_lock(&i915->drm.struct_mutex); i915 139 drivers/gpu/drm/i915/selftests/i915_gem_evict.c struct drm_i915_private *i915 = arg; i915 140 drivers/gpu/drm/i915/selftests/i915_gem_evict.c struct i915_ggtt *ggtt = &i915->ggtt; i915 146 drivers/gpu/drm/i915/selftests/i915_gem_evict.c err = populate_ggtt(i915, &objects); i915 161 drivers/gpu/drm/i915/selftests/i915_gem_evict.c unpin_ggtt(i915); i915 175 drivers/gpu/drm/i915/selftests/i915_gem_evict.c cleanup_objects(i915, &objects); i915 181 drivers/gpu/drm/i915/selftests/i915_gem_evict.c struct drm_i915_private *i915 = arg; i915 191 drivers/gpu/drm/i915/selftests/i915_gem_evict.c err = populate_ggtt(i915, &objects); i915 195 drivers/gpu/drm/i915/selftests/i915_gem_evict.c obj = i915_gem_object_create_internal(i915, I915_GTT_PAGE_SIZE); i915 211 drivers/gpu/drm/i915/selftests/i915_gem_evict.c cleanup_objects(i915, &objects); i915 217 drivers/gpu/drm/i915/selftests/i915_gem_evict.c struct drm_i915_private *i915 = arg; i915 218 drivers/gpu/drm/i915/selftests/i915_gem_evict.c struct i915_ggtt *ggtt = &i915->ggtt; i915 228 drivers/gpu/drm/i915/selftests/i915_gem_evict.c err = populate_ggtt(i915, &objects); i915 240 drivers/gpu/drm/i915/selftests/i915_gem_evict.c unpin_ggtt(i915); i915 251 drivers/gpu/drm/i915/selftests/i915_gem_evict.c cleanup_objects(i915, &objects); i915 264 drivers/gpu/drm/i915/selftests/i915_gem_evict.c struct drm_i915_private *i915 = arg; i915 265 drivers/gpu/drm/i915/selftests/i915_gem_evict.c struct i915_ggtt *ggtt = &i915->ggtt; i915 284 drivers/gpu/drm/i915/selftests/i915_gem_evict.c obj = i915_gem_object_create_internal(i915, I915_GTT_PAGE_SIZE); i915 300 drivers/gpu/drm/i915/selftests/i915_gem_evict.c obj = i915_gem_object_create_internal(i915, I915_GTT_PAGE_SIZE); i915 341 drivers/gpu/drm/i915/selftests/i915_gem_evict.c unpin_ggtt(i915); i915 342 drivers/gpu/drm/i915/selftests/i915_gem_evict.c cleanup_objects(i915, &objects); i915 349 drivers/gpu/drm/i915/selftests/i915_gem_evict.c struct drm_i915_private *i915 = arg; i915 350 drivers/gpu/drm/i915/selftests/i915_gem_evict.c struct i915_ggtt *ggtt = &i915->ggtt; i915 356 drivers/gpu/drm/i915/selftests/i915_gem_evict.c err = populate_ggtt(i915, &objects); i915 368 drivers/gpu/drm/i915/selftests/i915_gem_evict.c unpin_ggtt(i915); i915 378 drivers/gpu/drm/i915/selftests/i915_gem_evict.c cleanup_objects(i915, &objects); i915 385 drivers/gpu/drm/i915/selftests/i915_gem_evict.c struct drm_i915_private *i915 = arg; i915 408 drivers/gpu/drm/i915/selftests/i915_gem_evict.c if (!HAS_FULL_PPGTT(i915)) i915 411 drivers/gpu/drm/i915/selftests/i915_gem_evict.c mutex_lock(&i915->drm.struct_mutex); i915 412 drivers/gpu/drm/i915/selftests/i915_gem_evict.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 416 drivers/gpu/drm/i915/selftests/i915_gem_evict.c err = i915_gem_gtt_insert(&i915->ggtt.vm, &hole, i915 418 drivers/gpu/drm/i915/selftests/i915_gem_evict.c 0, i915->ggtt.vm.total, i915 434 drivers/gpu/drm/i915/selftests/i915_gem_evict.c if (i915_gem_gtt_insert(&i915->ggtt.vm, &r->node, i915 436 drivers/gpu/drm/i915/selftests/i915_gem_evict.c 0, i915->ggtt.vm.total, i915 448 drivers/gpu/drm/i915/selftests/i915_gem_evict.c mutex_unlock(&i915->drm.struct_mutex); i915 452 drivers/gpu/drm/i915/selftests/i915_gem_evict.c for_each_engine(engine, i915, id) { i915 456 drivers/gpu/drm/i915/selftests/i915_gem_evict.c file = mock_file(i915); i915 463 drivers/gpu/drm/i915/selftests/i915_gem_evict.c mutex_lock(&i915->drm.struct_mutex); i915 469 drivers/gpu/drm/i915/selftests/i915_gem_evict.c ctx = live_context(i915, file); i915 500 drivers/gpu/drm/i915/selftests/i915_gem_evict.c mutex_unlock(&i915->drm.struct_mutex); i915 506 drivers/gpu/drm/i915/selftests/i915_gem_evict.c mock_file_free(i915, file); i915 511 drivers/gpu/drm/i915/selftests/i915_gem_evict.c mutex_lock(&i915->drm.struct_mutex); i915 513 drivers/gpu/drm/i915/selftests/i915_gem_evict.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 525 drivers/gpu/drm/i915/selftests/i915_gem_evict.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 526 drivers/gpu/drm/i915/selftests/i915_gem_evict.c mutex_unlock(&i915->drm.struct_mutex); i915 540 drivers/gpu/drm/i915/selftests/i915_gem_evict.c struct drm_i915_private *i915; i915 544 drivers/gpu/drm/i915/selftests/i915_gem_evict.c i915 = mock_gem_device(); i915 545 drivers/gpu/drm/i915/selftests/i915_gem_evict.c if (!i915) i915 548 drivers/gpu/drm/i915/selftests/i915_gem_evict.c mutex_lock(&i915->drm.struct_mutex); i915 549 drivers/gpu/drm/i915/selftests/i915_gem_evict.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) i915 550 drivers/gpu/drm/i915/selftests/i915_gem_evict.c err = i915_subtests(tests, i915); i915 552 drivers/gpu/drm/i915/selftests/i915_gem_evict.c mutex_unlock(&i915->drm.struct_mutex); i915 554 drivers/gpu/drm/i915/selftests/i915_gem_evict.c drm_dev_put(&i915->drm); i915 558 drivers/gpu/drm/i915/selftests/i915_gem_evict.c int i915_gem_evict_live_selftests(struct drm_i915_private *i915) i915 564 drivers/gpu/drm/i915/selftests/i915_gem_evict.c if (intel_gt_is_wedged(&i915->gt)) i915 567 drivers/gpu/drm/i915/selftests/i915_gem_evict.c return i915_subtests(tests, i915); i915 36 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c static void cleanup_freed_objects(struct drm_i915_private *i915) i915 43 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c mutex_unlock(&i915->drm.struct_mutex); i915 45 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c i915_gem_drain_freed_objects(i915); i915 47 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c mutex_lock(&i915->drm.struct_mutex); i915 114 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c fake_dma_object(struct drm_i915_private *i915, u64 size) i915 128 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c drm_gem_private_object_init(&i915->drm, &obj->base, size); i915 215 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c static int lowlevel_hole(struct drm_i915_private *i915, i915 261 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj = fake_dma_object(i915, BIT_ULL(size)); i915 296 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 298 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 315 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c cleanup_freed_objects(i915); i915 342 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c static int fill_hole(struct drm_i915_private *i915, i915 376 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj = fake_dma_object(i915, full_size); i915 544 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c cleanup_freed_objects(i915); i915 554 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c static int walk_hole(struct drm_i915_private *i915, i915 577 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj = fake_dma_object(i915, size << PAGE_SHIFT); i915 632 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c cleanup_freed_objects(i915); i915 638 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c static int pot_hole(struct drm_i915_private *i915, i915 653 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj = i915_gem_object_create_internal(i915, 2 * I915_GTT_PAGE_SIZE); i915 714 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c static int drunk_hole(struct drm_i915_private *i915, i915 760 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj = fake_dma_object(i915, BIT_ULL(size)); i915 818 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c cleanup_freed_objects(i915); i915 824 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c static int __shrink_hole(struct drm_i915_private *i915, i915 842 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj = fake_dma_object(i915, size); i915 887 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c cleanup_freed_objects(i915); i915 891 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c static int shrink_hole(struct drm_i915_private *i915, i915 904 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c err = __shrink_hole(i915, vm, hole_start, hole_end, end_time); i915 914 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c static int shrink_boom(struct drm_i915_private *i915, i915 937 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c purge = fake_dma_object(i915, size); i915 954 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c explode = fake_dma_object(i915, size); i915 980 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c cleanup_freed_objects(i915); i915 994 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c int (*func)(struct drm_i915_private *i915, i915 1076 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c static int exercise_ggtt(struct drm_i915_private *i915, i915 1077 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c int (*func)(struct drm_i915_private *i915, i915 1082 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c struct i915_ggtt *ggtt = &i915->ggtt; i915 1088 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c mutex_lock(&i915->drm.struct_mutex); i915 1101 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c err = func(i915, &ggtt->vm, hole_start, hole_end, end_time); i915 1109 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c mutex_unlock(&i915->drm.struct_mutex); i915 1143 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c struct drm_i915_private *i915 = arg; i915 1144 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c struct i915_ggtt *ggtt = &i915->ggtt; i915 1151 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c mutex_lock(&i915->drm.struct_mutex); i915 1153 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj = i915_gem_object_create_internal(i915, PAGE_SIZE); i915 1172 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 1219 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 1226 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c mutex_unlock(&i915->drm.struct_mutex); i915 1244 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c static int exercise_mock(struct drm_i915_private *i915, i915 1245 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c int (*func)(struct drm_i915_private *i915, i915 1255 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c ctx = mock_context(i915, "mock"); i915 1259 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c err = func(i915, ctx->vm, 0, min(ctx->vm->total, limit), end_time); i915 1269 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c return exercise_mock(ggtt->vm.i915, fill_hole); i915 1276 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c return exercise_mock(ggtt->vm.i915, walk_hole); i915 1283 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c return exercise_mock(ggtt->vm.i915, pot_hole); i915 1290 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c return exercise_mock(ggtt->vm.i915, drunk_hole); i915 1312 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj = i915_gem_object_create_internal(ggtt->vm.i915, i915 1362 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj = i915_gem_object_create_internal(ggtt->vm.i915, i915 1519 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj = i915_gem_object_create_internal(ggtt->vm.i915, i915 1624 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj = i915_gem_object_create_internal(ggtt->vm.i915, i915 1677 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c struct drm_i915_private *i915; i915 1681 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c i915 = mock_gem_device(); i915 1682 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c if (!i915) i915 1690 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c mock_init_ggtt(i915, ggtt); i915 1692 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c mutex_lock(&i915->drm.struct_mutex); i915 1694 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c mock_device_flush(i915); i915 1695 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c mutex_unlock(&i915->drm.struct_mutex); i915 1697 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c i915_gem_drain_freed_objects(i915); i915 1702 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c drm_dev_put(&i915->drm); i915 1706 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c int i915_gem_gtt_live_selftests(struct drm_i915_private *i915) i915 1725 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c GEM_BUG_ON(offset_in_page(i915->ggtt.vm.total)); i915 1727 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c return i915_subtests(tests, i915); i915 42 drivers/gpu/drm/i915/selftests/i915_request.c struct drm_i915_private *i915 = arg; i915 48 drivers/gpu/drm/i915/selftests/i915_request.c mutex_lock(&i915->drm.struct_mutex); i915 49 drivers/gpu/drm/i915/selftests/i915_request.c request = mock_request(i915->engine[RCS0]->kernel_context, HZ / 10); i915 57 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&i915->drm.struct_mutex); i915 64 drivers/gpu/drm/i915/selftests/i915_request.c struct drm_i915_private *i915 = arg; i915 70 drivers/gpu/drm/i915/selftests/i915_request.c mutex_lock(&i915->drm.struct_mutex); i915 71 drivers/gpu/drm/i915/selftests/i915_request.c request = mock_request(i915->engine[RCS0]->kernel_context, T); i915 129 drivers/gpu/drm/i915/selftests/i915_request.c mock_device_flush(i915); i915 130 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&i915->drm.struct_mutex); i915 137 drivers/gpu/drm/i915/selftests/i915_request.c struct drm_i915_private *i915 = arg; i915 143 drivers/gpu/drm/i915/selftests/i915_request.c mutex_lock(&i915->drm.struct_mutex); i915 144 drivers/gpu/drm/i915/selftests/i915_request.c request = mock_request(i915->engine[RCS0]->kernel_context, T); i915 156 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&i915->drm.struct_mutex); i915 185 drivers/gpu/drm/i915/selftests/i915_request.c mutex_lock(&i915->drm.struct_mutex); i915 187 drivers/gpu/drm/i915/selftests/i915_request.c mock_device_flush(i915); i915 188 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&i915->drm.struct_mutex); i915 194 drivers/gpu/drm/i915/selftests/i915_request.c struct drm_i915_private *i915 = arg; i915 200 drivers/gpu/drm/i915/selftests/i915_request.c mutex_lock(&i915->drm.struct_mutex); i915 201 drivers/gpu/drm/i915/selftests/i915_request.c ctx[0] = mock_context(i915, "A"); i915 214 drivers/gpu/drm/i915/selftests/i915_request.c ctx[1] = mock_context(i915, "B"); i915 236 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&i915->drm.struct_mutex); i915 251 drivers/gpu/drm/i915/selftests/i915_request.c mutex_lock(&i915->drm.struct_mutex); i915 257 drivers/gpu/drm/i915/selftests/i915_request.c mock_device_flush(i915); i915 258 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&i915->drm.struct_mutex); i915 285 drivers/gpu/drm/i915/selftests/i915_request.c struct mutex * const BKL = &t->engine->i915->drm.struct_mutex; i915 431 drivers/gpu/drm/i915/selftests/i915_request.c struct drm_i915_private *i915 = arg; i915 433 drivers/gpu/drm/i915/selftests/i915_request.c .engine = i915->engine[RCS0], i915 460 drivers/gpu/drm/i915/selftests/i915_request.c mutex_lock(&t.engine->i915->drm.struct_mutex); i915 462 drivers/gpu/drm/i915/selftests/i915_request.c t.contexts[n] = mock_context(t.engine->i915, "mock"); i915 468 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&t.engine->i915->drm.struct_mutex); i915 498 drivers/gpu/drm/i915/selftests/i915_request.c mutex_lock(&t.engine->i915->drm.struct_mutex); i915 505 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&t.engine->i915->drm.struct_mutex); i915 522 drivers/gpu/drm/i915/selftests/i915_request.c struct drm_i915_private *i915; i915 526 drivers/gpu/drm/i915/selftests/i915_request.c i915 = mock_gem_device(); i915 527 drivers/gpu/drm/i915/selftests/i915_request.c if (!i915) i915 530 drivers/gpu/drm/i915/selftests/i915_request.c with_intel_runtime_pm(&i915->runtime_pm, wakeref) i915 531 drivers/gpu/drm/i915/selftests/i915_request.c err = i915_subtests(tests, i915); i915 533 drivers/gpu/drm/i915/selftests/i915_request.c drm_dev_put(&i915->drm); i915 540 drivers/gpu/drm/i915/selftests/i915_request.c struct drm_i915_private *i915 = arg; i915 552 drivers/gpu/drm/i915/selftests/i915_request.c mutex_lock(&i915->drm.struct_mutex); i915 553 drivers/gpu/drm/i915/selftests/i915_request.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 555 drivers/gpu/drm/i915/selftests/i915_request.c for_each_engine(engine, i915, id) { i915 561 drivers/gpu/drm/i915/selftests/i915_request.c err = igt_live_test_begin(&t, i915, __func__, engine->name); i915 611 drivers/gpu/drm/i915/selftests/i915_request.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 612 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&i915->drm.struct_mutex); i915 616 drivers/gpu/drm/i915/selftests/i915_request.c static struct i915_vma *empty_batch(struct drm_i915_private *i915) i915 623 drivers/gpu/drm/i915/selftests/i915_request.c obj = i915_gem_object_create_internal(i915, PAGE_SIZE); i915 638 drivers/gpu/drm/i915/selftests/i915_request.c intel_gt_chipset_flush(&i915->gt); i915 640 drivers/gpu/drm/i915/selftests/i915_request.c vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL); i915 682 drivers/gpu/drm/i915/selftests/i915_request.c struct drm_i915_private *i915 = arg; i915 695 drivers/gpu/drm/i915/selftests/i915_request.c mutex_lock(&i915->drm.struct_mutex); i915 696 drivers/gpu/drm/i915/selftests/i915_request.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 698 drivers/gpu/drm/i915/selftests/i915_request.c batch = empty_batch(i915); i915 704 drivers/gpu/drm/i915/selftests/i915_request.c for_each_engine(engine, i915, id) { i915 710 drivers/gpu/drm/i915/selftests/i915_request.c err = igt_live_test_begin(&t, i915, __func__, engine->name); i915 756 drivers/gpu/drm/i915/selftests/i915_request.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 757 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&i915->drm.struct_mutex); i915 761 drivers/gpu/drm/i915/selftests/i915_request.c static struct i915_vma *recursive_batch(struct drm_i915_private *i915) i915 763 drivers/gpu/drm/i915/selftests/i915_request.c struct i915_gem_context *ctx = i915->kernel_context; i915 764 drivers/gpu/drm/i915/selftests/i915_request.c struct i915_address_space *vm = ctx->vm ?: &i915->ggtt.vm; i915 766 drivers/gpu/drm/i915/selftests/i915_request.c const int gen = INTEL_GEN(i915); i915 771 drivers/gpu/drm/i915/selftests/i915_request.c obj = i915_gem_object_create_internal(i915, PAGE_SIZE); i915 807 drivers/gpu/drm/i915/selftests/i915_request.c intel_gt_chipset_flush(&i915->gt); i915 834 drivers/gpu/drm/i915/selftests/i915_request.c struct drm_i915_private *i915 = arg; i915 848 drivers/gpu/drm/i915/selftests/i915_request.c mutex_lock(&i915->drm.struct_mutex); i915 849 drivers/gpu/drm/i915/selftests/i915_request.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 851 drivers/gpu/drm/i915/selftests/i915_request.c err = igt_live_test_begin(&t, i915, __func__, ""); i915 855 drivers/gpu/drm/i915/selftests/i915_request.c batch = recursive_batch(i915); i915 862 drivers/gpu/drm/i915/selftests/i915_request.c for_each_engine(engine, i915, id) { i915 889 drivers/gpu/drm/i915/selftests/i915_request.c for_each_engine(engine, i915, id) { i915 904 drivers/gpu/drm/i915/selftests/i915_request.c for_each_engine(engine, i915, id) { i915 924 drivers/gpu/drm/i915/selftests/i915_request.c for_each_engine(engine, i915, id) i915 930 drivers/gpu/drm/i915/selftests/i915_request.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 931 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&i915->drm.struct_mutex); i915 937 drivers/gpu/drm/i915/selftests/i915_request.c struct drm_i915_private *i915 = arg; i915 952 drivers/gpu/drm/i915/selftests/i915_request.c mutex_lock(&i915->drm.struct_mutex); i915 953 drivers/gpu/drm/i915/selftests/i915_request.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 955 drivers/gpu/drm/i915/selftests/i915_request.c err = igt_live_test_begin(&t, i915, __func__, ""); i915 959 drivers/gpu/drm/i915/selftests/i915_request.c for_each_engine(engine, i915, id) { i915 962 drivers/gpu/drm/i915/selftests/i915_request.c batch = recursive_batch(i915); i915 1009 drivers/gpu/drm/i915/selftests/i915_request.c for_each_engine(engine, i915, id) { i915 1041 drivers/gpu/drm/i915/selftests/i915_request.c for_each_engine(engine, i915, id) { i915 1060 drivers/gpu/drm/i915/selftests/i915_request.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 1061 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&i915->drm.struct_mutex); i915 1080 drivers/gpu/drm/i915/selftests/i915_request.c if (HAS_EXECLISTS(ctx->i915)) i915 1104 drivers/gpu/drm/i915/selftests/i915_request.c struct drm_i915_private *i915 = arg; i915 1125 drivers/gpu/drm/i915/selftests/i915_request.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 1127 drivers/gpu/drm/i915/selftests/i915_request.c file = mock_file(i915); i915 1152 drivers/gpu/drm/i915/selftests/i915_request.c mutex_lock(&i915->drm.struct_mutex); i915 1154 drivers/gpu/drm/i915/selftests/i915_request.c t[0].contexts[n] = live_context(i915, file); i915 1161 drivers/gpu/drm/i915/selftests/i915_request.c ret = igt_live_test_begin(&live, i915, __func__, ""); i915 1165 drivers/gpu/drm/i915/selftests/i915_request.c for_each_engine(engine, i915, id) { i915 1171 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&i915->drm.struct_mutex); i915 1186 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&i915->drm.struct_mutex); i915 1194 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&i915->drm.struct_mutex); i915 1201 drivers/gpu/drm/i915/selftests/i915_request.c for_each_engine(engine, i915, id) { i915 1220 drivers/gpu/drm/i915/selftests/i915_request.c num_waits, num_fences, RUNTIME_INFO(i915)->num_engines, ncpus); i915 1222 drivers/gpu/drm/i915/selftests/i915_request.c mutex_lock(&i915->drm.struct_mutex); i915 1225 drivers/gpu/drm/i915/selftests/i915_request.c mutex_unlock(&i915->drm.struct_mutex); i915 1230 drivers/gpu/drm/i915/selftests/i915_request.c mock_file_free(i915, file); i915 1232 drivers/gpu/drm/i915/selftests/i915_request.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 1237 drivers/gpu/drm/i915/selftests/i915_request.c int i915_request_live_selftests(struct drm_i915_private *i915) i915 1247 drivers/gpu/drm/i915/selftests/i915_request.c if (intel_gt_is_wedged(&i915->gt)) i915 1250 drivers/gpu/drm/i915/selftests/i915_request.c return i915_subtests(tests, i915); i915 41 drivers/gpu/drm/i915/selftests/i915_selftest.c int i915_live_sanitycheck(struct drm_i915_private *i915) i915 43 drivers/gpu/drm/i915/selftests/i915_selftest.c pr_info("%s: %s() - ok!\n", i915->drm.driver->name, __func__); i915 257 drivers/gpu/drm/i915/selftests/i915_selftest.c struct drm_i915_private *i915 = data; i915 259 drivers/gpu/drm/i915/selftests/i915_selftest.c return intel_gt_terminally_wedged(&i915->gt); i915 264 drivers/gpu/drm/i915/selftests/i915_selftest.c struct drm_i915_private *i915 = data; i915 266 drivers/gpu/drm/i915/selftests/i915_selftest.c mutex_lock(&i915->drm.struct_mutex); i915 267 drivers/gpu/drm/i915/selftests/i915_selftest.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 269 drivers/gpu/drm/i915/selftests/i915_selftest.c mutex_unlock(&i915->drm.struct_mutex); i915 271 drivers/gpu/drm/i915/selftests/i915_selftest.c i915_gem_drain_freed_objects(i915); i915 287 drivers/gpu/drm/i915/selftests/i915_selftest.c mutex_lock(>->i915->drm.struct_mutex); i915 288 drivers/gpu/drm/i915/selftests/i915_selftest.c if (igt_flush_test(gt->i915, I915_WAIT_LOCKED)) i915 290 drivers/gpu/drm/i915/selftests/i915_selftest.c mutex_unlock(>->i915->drm.struct_mutex); i915 292 drivers/gpu/drm/i915/selftests/i915_selftest.c i915_gem_drain_freed_objects(gt->i915); i915 105 drivers/gpu/drm/i915/selftests/i915_vma.c static int create_vmas(struct drm_i915_private *i915, i915 148 drivers/gpu/drm/i915/selftests/i915_vma.c struct drm_i915_private *i915 = ggtt->vm.i915; i915 165 drivers/gpu/drm/i915/selftests/i915_vma.c obj = i915_gem_object_create_internal(i915, PAGE_SIZE); i915 175 drivers/gpu/drm/i915/selftests/i915_vma.c ctx = mock_context(i915, "mock"); i915 182 drivers/gpu/drm/i915/selftests/i915_vma.c err = create_vmas(i915, &objects, &contexts); i915 202 drivers/gpu/drm/i915/selftests/i915_vma.c err = create_vmas(i915, &objects, &contexts); i915 317 drivers/gpu/drm/i915/selftests/i915_vma.c obj = i915_gem_object_create_internal(ggtt->vm.i915, PAGE_SIZE); i915 508 drivers/gpu/drm/i915/selftests/i915_vma.c obj = i915_gem_object_create_internal(vm->i915, max_pages * PAGE_SIZE); i915 716 drivers/gpu/drm/i915/selftests/i915_vma.c obj = i915_gem_object_create_internal(vm->i915, npages * PAGE_SIZE); i915 819 drivers/gpu/drm/i915/selftests/i915_vma.c struct drm_i915_private *i915; i915 823 drivers/gpu/drm/i915/selftests/i915_vma.c i915 = mock_gem_device(); i915 824 drivers/gpu/drm/i915/selftests/i915_vma.c if (!i915) i915 832 drivers/gpu/drm/i915/selftests/i915_vma.c mock_init_ggtt(i915, ggtt); i915 834 drivers/gpu/drm/i915/selftests/i915_vma.c mutex_lock(&i915->drm.struct_mutex); i915 836 drivers/gpu/drm/i915/selftests/i915_vma.c mock_device_flush(i915); i915 837 drivers/gpu/drm/i915/selftests/i915_vma.c mutex_unlock(&i915->drm.struct_mutex); i915 839 drivers/gpu/drm/i915/selftests/i915_vma.c i915_gem_drain_freed_objects(i915); i915 844 drivers/gpu/drm/i915/selftests/i915_vma.c drm_dev_put(&i915->drm); i915 850 drivers/gpu/drm/i915/selftests/i915_vma.c struct drm_i915_private *i915 = arg; i915 878 drivers/gpu/drm/i915/selftests/i915_vma.c obj = i915_gem_object_create_internal(i915, 10 * 10 * PAGE_SIZE); i915 882 drivers/gpu/drm/i915/selftests/i915_vma.c mutex_lock(&i915->drm.struct_mutex); i915 884 drivers/gpu/drm/i915/selftests/i915_vma.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 978 drivers/gpu/drm/i915/selftests/i915_vma.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 979 drivers/gpu/drm/i915/selftests/i915_vma.c mutex_unlock(&i915->drm.struct_mutex); i915 985 drivers/gpu/drm/i915/selftests/i915_vma.c int i915_vma_live_selftests(struct drm_i915_private *i915) i915 991 drivers/gpu/drm/i915/selftests/i915_vma.c return i915_subtests(tests, i915); i915 15 drivers/gpu/drm/i915/selftests/igt_flush_test.c int igt_flush_test(struct drm_i915_private *i915, unsigned int flags) i915 17 drivers/gpu/drm/i915/selftests/igt_flush_test.c int ret = intel_gt_is_wedged(&i915->gt) ? -EIO : 0; i915 23 drivers/gpu/drm/i915/selftests/igt_flush_test.c if (i915_gem_wait_for_idle(i915, flags, HZ / 5) == -ETIME) { i915 31 drivers/gpu/drm/i915/selftests/igt_flush_test.c intel_gt_set_wedged(&i915->gt); i915 38 drivers/gpu/drm/i915/selftests/igt_flush_test.c i915_retire_requests(i915); i915 12 drivers/gpu/drm/i915/selftests/igt_flush_test.h int igt_flush_test(struct drm_i915_private *i915, unsigned int flags); i915 14 drivers/gpu/drm/i915/selftests/igt_live_test.c struct drm_i915_private *i915, i915 22 drivers/gpu/drm/i915/selftests/igt_live_test.c lockdep_assert_held(&i915->drm.struct_mutex); i915 24 drivers/gpu/drm/i915/selftests/igt_live_test.c t->i915 = i915; i915 28 drivers/gpu/drm/i915/selftests/igt_live_test.c err = i915_gem_wait_for_idle(i915, i915 38 drivers/gpu/drm/i915/selftests/igt_live_test.c t->reset_global = i915_reset_count(&i915->gpu_error); i915 40 drivers/gpu/drm/i915/selftests/igt_live_test.c for_each_engine(engine, i915, id) i915 42 drivers/gpu/drm/i915/selftests/igt_live_test.c i915_reset_engine_count(&i915->gpu_error, engine); i915 49 drivers/gpu/drm/i915/selftests/igt_live_test.c struct drm_i915_private *i915 = t->i915; i915 53 drivers/gpu/drm/i915/selftests/igt_live_test.c lockdep_assert_held(&i915->drm.struct_mutex); i915 55 drivers/gpu/drm/i915/selftests/igt_live_test.c if (igt_flush_test(i915, I915_WAIT_LOCKED)) i915 58 drivers/gpu/drm/i915/selftests/igt_live_test.c if (t->reset_global != i915_reset_count(&i915->gpu_error)) { i915 61 drivers/gpu/drm/i915/selftests/igt_live_test.c i915_reset_count(&i915->gpu_error) - t->reset_global); i915 65 drivers/gpu/drm/i915/selftests/igt_live_test.c for_each_engine(engine, i915, id) { i915 67 drivers/gpu/drm/i915/selftests/igt_live_test.c i915_reset_engine_count(&i915->gpu_error, engine)) i915 72 drivers/gpu/drm/i915/selftests/igt_live_test.c i915_reset_engine_count(&i915->gpu_error, engine) - i915 15 drivers/gpu/drm/i915/selftests/igt_live_test.h struct drm_i915_private *i915; i915 30 drivers/gpu/drm/i915/selftests/igt_live_test.h struct drm_i915_private *i915, i915 25 drivers/gpu/drm/i915/selftests/igt_reset.c for_each_engine(engine, gt->i915, id) { i915 38 drivers/gpu/drm/i915/selftests/igt_reset.c for_each_engine(engine, gt->i915, id) i915 18 drivers/gpu/drm/i915/selftests/igt_spinner.c GEM_BUG_ON(INTEL_GEN(gt->i915) < 8); i915 23 drivers/gpu/drm/i915/selftests/igt_spinner.c spin->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); i915 29 drivers/gpu/drm/i915/selftests/igt_spinner.c spin->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); i915 43 drivers/gpu/drm/i915/selftests/igt_spinner.c mode = i915_coherent_map_type(gt->i915); i915 141 drivers/gpu/drm/i915/selftests/intel_uncore.c struct drm_i915_private *i915 = arg; i915 143 drivers/gpu/drm/i915/selftests/intel_uncore.c struct intel_uncore *uncore = &i915->uncore; i915 150 drivers/gpu/drm/i915/selftests/intel_uncore.c GEM_BUG_ON(i915->gt.awake); i915 153 drivers/gpu/drm/i915/selftests/intel_uncore.c if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { i915 171 drivers/gpu/drm/i915/selftests/intel_uncore.c if (r->platforms & INTEL_INFO(i915)->gen_mask) i915 175 drivers/gpu/drm/i915/selftests/intel_uncore.c intel_platform_name(INTEL_INFO(i915)->platform)); i915 179 drivers/gpu/drm/i915/selftests/intel_uncore.c wakeref = intel_runtime_pm_get(&i915->runtime_pm); i915 189 drivers/gpu/drm/i915/selftests/intel_uncore.c for_each_engine(engine, i915, id) { i915 250 drivers/gpu/drm/i915/selftests/intel_uncore.c intel_runtime_pm_put(&i915->runtime_pm, wakeref); i915 313 drivers/gpu/drm/i915/selftests/intel_uncore.c int intel_uncore_live_selftests(struct drm_i915_private *i915) i915 323 drivers/gpu/drm/i915/selftests/intel_uncore.c err = intel_fw_table_check(i915->uncore.fw_domains_table, i915 324 drivers/gpu/drm/i915/selftests/intel_uncore.c i915->uncore.fw_domains_table_entries, i915 325 drivers/gpu/drm/i915/selftests/intel_uncore.c INTEL_GEN(i915) >= 9); i915 329 drivers/gpu/drm/i915/selftests/intel_uncore.c return i915_subtests(tests, i915); i915 27 drivers/gpu/drm/i915/selftests/mock_drm.c struct drm_file *mock_file(struct drm_i915_private *i915) i915 40 drivers/gpu/drm/i915/selftests/mock_drm.c inode->i_rdev = i915->drm.primary->index; i915 68 drivers/gpu/drm/i915/selftests/mock_drm.c void mock_file_free(struct drm_i915_private *i915, struct drm_file *file) i915 28 drivers/gpu/drm/i915/selftests/mock_drm.h struct drm_file *mock_file(struct drm_i915_private *i915); i915 29 drivers/gpu/drm/i915/selftests/mock_drm.h void mock_file_free(struct drm_i915_private *i915, struct drm_file *file); i915 39 drivers/gpu/drm/i915/selftests/mock_gem_device.c void mock_device_flush(struct drm_i915_private *i915) i915 44 drivers/gpu/drm/i915/selftests/mock_gem_device.c lockdep_assert_held(&i915->drm.struct_mutex); i915 47 drivers/gpu/drm/i915/selftests/mock_gem_device.c for_each_engine(engine, i915, id) i915 49 drivers/gpu/drm/i915/selftests/mock_gem_device.c } while (i915_retire_requests(i915)); i915 54 drivers/gpu/drm/i915/selftests/mock_gem_device.c struct drm_i915_private *i915 = to_i915(dev); i915 58 drivers/gpu/drm/i915/selftests/mock_gem_device.c mutex_lock(&i915->drm.struct_mutex); i915 59 drivers/gpu/drm/i915/selftests/mock_gem_device.c mock_device_flush(i915); i915 60 drivers/gpu/drm/i915/selftests/mock_gem_device.c mutex_unlock(&i915->drm.struct_mutex); i915 62 drivers/gpu/drm/i915/selftests/mock_gem_device.c flush_work(&i915->gem.idle_work); i915 63 drivers/gpu/drm/i915/selftests/mock_gem_device.c i915_gem_drain_workqueue(i915); i915 65 drivers/gpu/drm/i915/selftests/mock_gem_device.c mutex_lock(&i915->drm.struct_mutex); i915 66 drivers/gpu/drm/i915/selftests/mock_gem_device.c for_each_engine(engine, i915, id) i915 68 drivers/gpu/drm/i915/selftests/mock_gem_device.c i915_gem_contexts_fini(i915); i915 69 drivers/gpu/drm/i915/selftests/mock_gem_device.c mutex_unlock(&i915->drm.struct_mutex); i915 71 drivers/gpu/drm/i915/selftests/mock_gem_device.c intel_timelines_fini(i915); i915 73 drivers/gpu/drm/i915/selftests/mock_gem_device.c drain_workqueue(i915->wq); i915 74 drivers/gpu/drm/i915/selftests/mock_gem_device.c i915_gem_drain_freed_objects(i915); i915 76 drivers/gpu/drm/i915/selftests/mock_gem_device.c mutex_lock(&i915->drm.struct_mutex); i915 77 drivers/gpu/drm/i915/selftests/mock_gem_device.c mock_fini_ggtt(&i915->ggtt); i915 78 drivers/gpu/drm/i915/selftests/mock_gem_device.c mutex_unlock(&i915->drm.struct_mutex); i915 80 drivers/gpu/drm/i915/selftests/mock_gem_device.c destroy_workqueue(i915->wq); i915 82 drivers/gpu/drm/i915/selftests/mock_gem_device.c i915_gemfs_fini(i915); i915 84 drivers/gpu/drm/i915/selftests/mock_gem_device.c drm_mode_config_cleanup(&i915->drm); i915 86 drivers/gpu/drm/i915/selftests/mock_gem_device.c drm_dev_fini(&i915->drm); i915 87 drivers/gpu/drm/i915/selftests/mock_gem_device.c put_device(&i915->drm.pdev->dev); i915 133 drivers/gpu/drm/i915/selftests/mock_gem_device.c struct drm_i915_private *i915; i915 137 drivers/gpu/drm/i915/selftests/mock_gem_device.c pdev = kzalloc(sizeof(*pdev) + sizeof(*i915), GFP_KERNEL); i915 152 drivers/gpu/drm/i915/selftests/mock_gem_device.c i915 = (struct drm_i915_private *)(pdev + 1); i915 153 drivers/gpu/drm/i915/selftests/mock_gem_device.c pci_set_drvdata(pdev, i915); i915 161 drivers/gpu/drm/i915/selftests/mock_gem_device.c err = drm_dev_init(&i915->drm, &mock_driver, &pdev->dev); i915 166 drivers/gpu/drm/i915/selftests/mock_gem_device.c i915->drm.pdev = pdev; i915 167 drivers/gpu/drm/i915/selftests/mock_gem_device.c i915->drm.dev_private = i915; i915 169 drivers/gpu/drm/i915/selftests/mock_gem_device.c intel_runtime_pm_init_early(&i915->runtime_pm); i915 172 drivers/gpu/drm/i915/selftests/mock_gem_device.c drm_mode_config_init(&i915->drm); i915 174 drivers/gpu/drm/i915/selftests/mock_gem_device.c mkwrite_device_info(i915)->gen = -1; i915 176 drivers/gpu/drm/i915/selftests/mock_gem_device.c mkwrite_device_info(i915)->page_sizes = i915 181 drivers/gpu/drm/i915/selftests/mock_gem_device.c mock_uncore_init(&i915->uncore); i915 182 drivers/gpu/drm/i915/selftests/mock_gem_device.c i915_gem_init__mm(i915); i915 183 drivers/gpu/drm/i915/selftests/mock_gem_device.c intel_gt_init_early(&i915->gt, i915); i915 184 drivers/gpu/drm/i915/selftests/mock_gem_device.c atomic_inc(&i915->gt.wakeref.count); /* disable; no hw support */ i915 186 drivers/gpu/drm/i915/selftests/mock_gem_device.c i915->wq = alloc_ordered_workqueue("mock", 0); i915 187 drivers/gpu/drm/i915/selftests/mock_gem_device.c if (!i915->wq) i915 190 drivers/gpu/drm/i915/selftests/mock_gem_device.c mock_init_contexts(i915); i915 192 drivers/gpu/drm/i915/selftests/mock_gem_device.c INIT_DELAYED_WORK(&i915->gem.retire_work, mock_retire_work_handler); i915 193 drivers/gpu/drm/i915/selftests/mock_gem_device.c INIT_WORK(&i915->gem.idle_work, mock_idle_work_handler); i915 195 drivers/gpu/drm/i915/selftests/mock_gem_device.c i915->gt.awake = true; i915 197 drivers/gpu/drm/i915/selftests/mock_gem_device.c intel_timelines_init(i915); i915 199 drivers/gpu/drm/i915/selftests/mock_gem_device.c mutex_lock(&i915->drm.struct_mutex); i915 201 drivers/gpu/drm/i915/selftests/mock_gem_device.c mock_init_ggtt(i915, &i915->ggtt); i915 203 drivers/gpu/drm/i915/selftests/mock_gem_device.c mkwrite_device_info(i915)->engine_mask = BIT(0); i915 205 drivers/gpu/drm/i915/selftests/mock_gem_device.c i915->engine[RCS0] = mock_engine(i915, "mock", RCS0); i915 206 drivers/gpu/drm/i915/selftests/mock_gem_device.c if (!i915->engine[RCS0]) i915 209 drivers/gpu/drm/i915/selftests/mock_gem_device.c i915->kernel_context = mock_context(i915, NULL); i915 210 drivers/gpu/drm/i915/selftests/mock_gem_device.c if (!i915->kernel_context) i915 213 drivers/gpu/drm/i915/selftests/mock_gem_device.c if (mock_engine_init(i915->engine[RCS0])) i915 216 drivers/gpu/drm/i915/selftests/mock_gem_device.c intel_engines_driver_register(i915); i915 217 drivers/gpu/drm/i915/selftests/mock_gem_device.c mutex_unlock(&i915->drm.struct_mutex); i915 219 drivers/gpu/drm/i915/selftests/mock_gem_device.c WARN_ON(i915_gemfs_init(i915)); i915 221 drivers/gpu/drm/i915/selftests/mock_gem_device.c return i915; i915 224 drivers/gpu/drm/i915/selftests/mock_gem_device.c i915_gem_contexts_fini(i915); i915 226 drivers/gpu/drm/i915/selftests/mock_gem_device.c mock_engine_free(i915->engine[RCS0]); i915 228 drivers/gpu/drm/i915/selftests/mock_gem_device.c mutex_unlock(&i915->drm.struct_mutex); i915 229 drivers/gpu/drm/i915/selftests/mock_gem_device.c intel_timelines_fini(i915); i915 230 drivers/gpu/drm/i915/selftests/mock_gem_device.c destroy_workqueue(i915->wq); i915 232 drivers/gpu/drm/i915/selftests/mock_gem_device.c drm_mode_config_cleanup(&i915->drm); i915 233 drivers/gpu/drm/i915/selftests/mock_gem_device.c drm_dev_fini(&i915->drm); i915 8 drivers/gpu/drm/i915/selftests/mock_gem_device.h void mock_device_flush(struct drm_i915_private *i915); i915 58 drivers/gpu/drm/i915/selftests/mock_gtt.c struct i915_ppgtt *mock_ppgtt(struct drm_i915_private *i915, const char *name) i915 66 drivers/gpu/drm/i915/selftests/mock_gtt.c ppgtt->vm.i915 = i915; i915 97 drivers/gpu/drm/i915/selftests/mock_gtt.c void mock_init_ggtt(struct drm_i915_private *i915, struct i915_ggtt *ggtt) i915 101 drivers/gpu/drm/i915/selftests/mock_gtt.c ggtt->vm.gt = &i915->gt; i915 102 drivers/gpu/drm/i915/selftests/mock_gtt.c ggtt->vm.i915 = i915; i915 121 drivers/gpu/drm/i915/selftests/mock_gtt.c intel_gt_init_hw(i915); i915 28 drivers/gpu/drm/i915/selftests/mock_gtt.h void mock_init_ggtt(struct drm_i915_private *i915, struct i915_ggtt *ggtt); i915 31 drivers/gpu/drm/i915/selftests/mock_gtt.h struct i915_ppgtt *mock_ppgtt(struct drm_i915_private *i915, const char *name);