i2s_config_reg    455 drivers/gpu/drm/bridge/sii902x.c static int sii902x_select_mclk_div(u8 *i2s_config_reg, unsigned int rate,
i2s_config_reg    474 drivers/gpu/drm/bridge/sii902x.c 	*i2s_config_reg |= nearest << 4;
i2s_config_reg    497 drivers/gpu/drm/bridge/sii902x.c 	u8 i2s_config_reg = SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST;
i2s_config_reg    513 drivers/gpu/drm/bridge/sii902x.c 		i2s_config_reg |= SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES |
i2s_config_reg    517 drivers/gpu/drm/bridge/sii902x.c 		i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_RIGHT;
i2s_config_reg    520 drivers/gpu/drm/bridge/sii902x.c 		i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
i2s_config_reg    529 drivers/gpu/drm/bridge/sii902x.c 		i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_FALLING;
i2s_config_reg    531 drivers/gpu/drm/bridge/sii902x.c 		i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_RISING;
i2s_config_reg    534 drivers/gpu/drm/bridge/sii902x.c 		i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_LOW;
i2s_config_reg    536 drivers/gpu/drm/bridge/sii902x.c 		i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_HIGH;
i2s_config_reg    575 drivers/gpu/drm/bridge/sii902x.c 		ret = sii902x_select_mclk_div(&i2s_config_reg,
i2s_config_reg    591 drivers/gpu/drm/bridge/sii902x.c 			   i2s_config_reg);