i2c_parents 1149 drivers/clk/clk-stm32f4.c static const char *i2c_parents[4] = { "apb1_div", "sys", "hsi", "no-clock" }; i2c_parents 1359 drivers/clk/clk-stm32f4.c i2c_parents, ARRAY_SIZE(i2c_parents), i2c_parents 1366 drivers/clk/clk-stm32f4.c i2c_parents, ARRAY_SIZE(i2c_parents), i2c_parents 1373 drivers/clk/clk-stm32f4.c i2c_parents, ARRAY_SIZE(i2c_parents), i2c_parents 1380 drivers/clk/clk-stm32f4.c i2c_parents, ARRAY_SIZE(i2c_parents), i2c_parents 1510 drivers/clk/clk-stm32f4.c i2c_parents, ARRAY_SIZE(i2c_parents), i2c_parents 1517 drivers/clk/clk-stm32f4.c i2c_parents, ARRAY_SIZE(i2c_parents), i2c_parents 1524 drivers/clk/clk-stm32f4.c i2c_parents, ARRAY_SIZE(i2c_parents), i2c_parents 1531 drivers/clk/clk-stm32f4.c i2c_parents, ARRAY_SIZE(i2c_parents), i2c_parents 677 drivers/clk/mediatek/clk-mt2712.c static const char * const i2c_parents[] = { i2c_parents 881 drivers/clk/mediatek/clk-mt2712.c i2c_parents, 0x560, 0, 3, 7), i2c_parents 465 drivers/clk/mediatek/clk-mt6779.c static const char * const i2c_parents[] = { i2c_parents 730 drivers/clk/mediatek/clk-mt6779.c MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C, "i2c_sel", i2c_parents, i2c_parents 448 drivers/clk/mediatek/clk-mt8183.c static const char * const i2c_parents[] = { i2c_parents 627 drivers/clk/mediatek/clk-mt8183.c i2c_parents, 0xc0, i2c_parents 296 drivers/clk/mediatek/clk-mt8516.c static const char * const i2c_parents[] __initconst = { i2c_parents 401 drivers/clk/mediatek/clk-mt8516.c MUX(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents, i2c_parents 379 drivers/clk/spear/spear1310_clock.c static const char *i2c_parents[] = { "ras_apb_clk", "gen_syn1_clk", }; i2c_parents 1002 drivers/clk/spear/spear1310_clock.c clk = clk_register_mux(NULL, "i2c1_mclk", i2c_parents, i2c_parents 1003 drivers/clk/spear/spear1310_clock.c ARRAY_SIZE(i2c_parents), CLK_SET_RATE_NO_REPARENT, i2c_parents 1013 drivers/clk/spear/spear1310_clock.c clk = clk_register_mux(NULL, "i2c2_mclk", i2c_parents, i2c_parents 1014 drivers/clk/spear/spear1310_clock.c ARRAY_SIZE(i2c_parents), CLK_SET_RATE_NO_REPARENT, i2c_parents 1024 drivers/clk/spear/spear1310_clock.c clk = clk_register_mux(NULL, "i2c3_mclk", i2c_parents, i2c_parents 1025 drivers/clk/spear/spear1310_clock.c ARRAY_SIZE(i2c_parents), CLK_SET_RATE_NO_REPARENT, i2c_parents 1035 drivers/clk/spear/spear1310_clock.c clk = clk_register_mux(NULL, "i2c4_mclk", i2c_parents, i2c_parents 1036 drivers/clk/spear/spear1310_clock.c ARRAY_SIZE(i2c_parents), CLK_SET_RATE_NO_REPARENT, i2c_parents 1046 drivers/clk/spear/spear1310_clock.c clk = clk_register_mux(NULL, "i2c5_mclk", i2c_parents, i2c_parents 1047 drivers/clk/spear/spear1310_clock.c ARRAY_SIZE(i2c_parents), CLK_SET_RATE_NO_REPARENT, i2c_parents 1057 drivers/clk/spear/spear1310_clock.c clk = clk_register_mux(NULL, "i2c6_mclk", i2c_parents, i2c_parents 1058 drivers/clk/spear/spear1310_clock.c ARRAY_SIZE(i2c_parents), CLK_SET_RATE_NO_REPARENT, i2c_parents 1068 drivers/clk/spear/spear1310_clock.c clk = clk_register_mux(NULL, "i2c7_mclk", i2c_parents, i2c_parents 1069 drivers/clk/spear/spear1310_clock.c ARRAY_SIZE(i2c_parents), CLK_SET_RATE_NO_REPARENT, i2c_parents 400 drivers/clk/sprd/sc9860-clk.c static const char * const i2c_parents[] = { "ext-26m", "twpll-48m", i2c_parents 402 drivers/clk/sprd/sc9860-clk.c static SPRD_COMP_CLK(i2c0_clk, "i2c0", i2c_parents, 0x44, i2c_parents 404 drivers/clk/sprd/sc9860-clk.c static SPRD_COMP_CLK(i2c1_clk, "i2c1", i2c_parents, 0x48, i2c_parents 406 drivers/clk/sprd/sc9860-clk.c static SPRD_COMP_CLK(i2c2_clk, "i2c2", i2c_parents, 0x4c, i2c_parents 408 drivers/clk/sprd/sc9860-clk.c static SPRD_COMP_CLK(i2c3_clk, "i2c3", i2c_parents, 0x50, i2c_parents 410 drivers/clk/sprd/sc9860-clk.c static SPRD_COMP_CLK(i2c4_clk, "i2c4", i2c_parents, 0x54, i2c_parents 412 drivers/clk/sprd/sc9860-clk.c static SPRD_COMP_CLK(i2c5_clk, "i2c5", i2c_parents, 0x58,