hwseq 149 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c if (dce121_xgmi_enabled(ctx->dc->hwseq)) hwseq 2317 drivers/gpu/drm/amd/display/dc/core/dc.c dc->hwss.init_sys_ctx(dc->hwseq, dc, &dc->vm_pa_config); hwseq 215 drivers/gpu/drm/amd/display/dc/core/dc_resource.c kfree(dc->hwseq); hwseq 312 drivers/gpu/drm/amd/display/dc/core/dc_resource.c dc->hwseq = create_funcs->create_hwseq(ctx); hwseq 43 drivers/gpu/drm/amd/display/dc/core/dc_vm_helper.c num_vmids = dc->hwss.init_sys_ctx(dc->hwseq, dc, pa_config); hwseq 57 drivers/gpu/drm/amd/display/dc/core/dc_vm_helper.c dc->hwss.init_vm_ctx(dc->hwseq, dc, va_config, vmid); hwseq 495 drivers/gpu/drm/amd/display/dc/dc.h struct dce_hwseq *hwseq; hwseq 53 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c struct dce_hwseq *hws = dc->hwseq; hwseq 807 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c struct dce_hwseq *hwseq = ctx->dc->hwseq; hwseq 818 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c if (power_up != is_panel_powered_on(hwseq)) { hwseq 889 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c struct dce_hwseq *hws = ctx->dc->hwseq; hwseq 2059 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c dce_crtc_switch_to_clk_src(dc->hwseq, hwseq 2177 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c dce_set_blender_mode(dc->hwseq, pipe_ctx->stream_res.tg->inst, blender_mode); hwseq 2390 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c dce_clock_gating_power_up(dc->hwseq, false); hwseq 2481 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c dce_enable_fe_clock(dc->hwseq, mi->inst, true); hwseq 88 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c struct dce_hwseq *hws = dc->hwseq; hwseq 619 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c struct dce_hwseq *hws = dc->hwseq; hwseq 639 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c struct dce_hwseq *hws = dc->hwseq; hwseq 710 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c if (!dc->hwseq->wa.false_optc_underflow) hwseq 1010 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c struct dce_hwseq *hws = dc->hwseq; hwseq 1180 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c struct dce_hwseq *hws = dc->hwseq; hwseq 1213 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c dc->hwss.disable_vga(dc->hwseq); hwseq 1302 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c dc->hwss.enable_power_gating_plane(dc->hwseq, true); hwseq 1830 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c struct dce_hwseq *hws = dc->hwseq; hwseq 1838 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c power_on_plane(dc->hwseq, hwseq 2665 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c if (dc->hwseq->wa.DEGVIDCN10_254) hwseq 133 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c struct dce_hwseq *hws = dc->hwseq; hwseq 933 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c dcn20_power_on_plane(dc->hwseq, pipe_ctx); hwseq 1431 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c struct dce_hwseq *hws = dc->hwseq; hwseq 1448 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c struct dce_hwseq *hws = dc->hwseq; hwseq 1996 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c struct dce_hwseq *hws = dc->hwseq;