hwbase            276 drivers/gpio/gpio-brcmstb.c 	int hwbase = bank->gc.base - priv->gpio_base;
hwbase            287 drivers/gpio/gpio-brcmstb.c 			irq = irq_linear_revmap(domain, hwbase + offset);
hwbase             40 drivers/net/ethernet/marvell/octeontx2/af/mbox.c 	mbox->hwbase = NULL;
hwbase             47 drivers/net/ethernet/marvell/octeontx2/af/mbox.c int otx2_mbox_init(struct otx2_mbox *mbox, void *hwbase, struct pci_dev *pdev,
hwbase            112 drivers/net/ethernet/marvell/octeontx2/af/mbox.c 	mbox->hwbase = hwbase;
hwbase            124 drivers/net/ethernet/marvell/octeontx2/af/mbox.c 		mdev->mbase = mbox->hwbase + (devid * MBOX_SIZE);
hwbase             64 drivers/net/ethernet/marvell/octeontx2/af/mbox.h 	void   *hwbase;  /* Mbox region advertised by HW */
hwbase             96 drivers/net/ethernet/marvell/octeontx2/af/mbox.h int otx2_mbox_init(struct otx2_mbox *mbox, void __force *hwbase,
hwbase           1586 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	void __iomem *hwbase = NULL, *reg_base;
hwbase           1635 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	hwbase = ioremap_wc(bar4_addr, MBOX_SIZE * num);
hwbase           1636 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	if (!hwbase) {
hwbase           1642 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	err = otx2_mbox_init(&mw->mbox, hwbase, rvu->pdev, reg_base, dir, num);
hwbase           1646 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	err = otx2_mbox_init(&mw->mbox_up, hwbase, rvu->pdev,
hwbase           1663 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	if (hwbase)
hwbase           1664 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 		iounmap((void __iomem *)hwbase);
hwbase           1677 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 	if (mw->mbox.hwbase)
hwbase           1678 drivers/net/ethernet/marvell/octeontx2/af/rvu.c 		iounmap((void __iomem *)mw->mbox.hwbase);