hw_ps 35 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.h struct pp_hw_power_state *hw_ps, hw_ps 89 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c static struct smu10_power_state *cast_smu10_ps(struct pp_hw_power_state *hw_ps) hw_ps 91 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c if (SMU10_Magic != hw_ps->magic) hw_ps 94 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c return (struct smu10_power_state *)hw_ps; hw_ps 98 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c const struct pp_hw_power_state *hw_ps) hw_ps 100 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c if (SMU10_Magic != hw_ps->magic) hw_ps 103 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c return (struct smu10_power_state *)hw_ps; hw_ps 742 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c struct pp_hw_power_state *hw_ps) hw_ps 749 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c struct pp_hw_power_state *hw_ps, hw_ps 753 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c struct smu10_power_state *smu10_ps = cast_smu10_ps(hw_ps); hw_ps 113 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct pp_hw_power_state *hw_ps) hw_ps 115 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c PP_ASSERT_WITH_CODE((PhwVIslands_Magic == hw_ps->magic), hw_ps 119 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c return (struct smu7_power_state *)hw_ps; hw_ps 123 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c const struct pp_hw_power_state *hw_ps) hw_ps 125 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c PP_ASSERT_WITH_CODE((PhwVIslands_Magic == hw_ps->magic), hw_ps 129 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c return (const struct smu7_power_state *)hw_ps; hw_ps 3059 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct pp_hw_power_state *hw_ps) hw_ps 3062 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct smu7_power_state *ps = (struct smu7_power_state *)hw_ps; hw_ps 51 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c static struct smu8_power_state *cast_smu8_power_state(struct pp_hw_power_state *hw_ps) hw_ps 53 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (smu8_magic != hw_ps->magic) hw_ps 56 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c return (struct smu8_power_state *)hw_ps; hw_ps 60 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c const struct pp_hw_power_state *hw_ps) hw_ps 62 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (smu8_magic != hw_ps->magic) hw_ps 65 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c return (struct smu8_power_state *)hw_ps; hw_ps 1320 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c struct pp_hw_power_state *hw_ps) hw_ps 1323 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c struct smu8_power_state *smu8_ps = cast_smu8_power_state(hw_ps); hw_ps 1335 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c struct pp_hw_power_state *hw_ps, hw_ps 1339 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c struct smu8_power_state *smu8_ps = cast_smu8_power_state(hw_ps); hw_ps 94 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct pp_hw_power_state *hw_ps) hw_ps 96 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c PP_ASSERT_WITH_CODE((PhwVega10_Magic == hw_ps->magic), hw_ps 100 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c return (struct vega10_power_state *)hw_ps; hw_ps 104 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c const struct pp_hw_power_state *hw_ps) hw_ps 106 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c PP_ASSERT_WITH_CODE((PhwVega10_Magic == hw_ps->magic), hw_ps 110 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c return (const struct vega10_power_state *)hw_ps; hw_ps 3125 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct pp_hw_power_state *hw_ps) hw_ps 994 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c struct pp_hw_power_state *hw_ps) hw_ps 255 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h struct pp_hw_power_state *hw_ps);