hw_lm 66 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_hw_mixer *lm = mixer->hw_lm; hw_lm 101 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_hw_mixer *hw_lm = crtc_state->mixers[lm_idx].hw_lm; hw_lm 111 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c hw_lm->ops.setup_mixer_out(hw_lm, &cfg); hw_lm 200 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (!mixer[i].hw_lm || !mixer[i].lm_ctl) { hw_lm 218 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c lm = mixer[i].hw_lm; hw_lm 223 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c mixer[i].hw_lm->idx); hw_lm 229 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c mixer[i].hw_lm->idx - LM_0, hw_lm 234 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c ctl->ops.setup_blendstage(ctl, mixer[i].hw_lm->idx, hw_lm 1107 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (!m->hw_lm) hw_lm 1113 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c m->hw_lm->idx - LM_0, m->lm_ctl->idx - CTL_0, hw_lm 80 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h struct dpu_hw_mixer *hw_lm; hw_lm 958 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c struct dpu_hw_mixer *hw_lm[MAX_CHANNELS_PER_ENC] = { NULL }; hw_lm 1023 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c hw_lm[i] = (struct dpu_hw_mixer *)hw_iter.hw; hw_lm 1032 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c cstate->mixers[i].hw_lm = hw_lm[i];