hw_intf          1060 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				struct dpu_hw_intf *hw_intf;
hw_intf          1065 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				hw_intf = (struct dpu_hw_intf *)hw_iter.hw;
hw_intf          1066 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				if (hw_intf->idx == phys->intf_idx)
hw_intf          1067 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 					phys->hw_intf = hw_intf;
hw_intf          1070 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			if (!phys->hw_intf) {
hw_intf           223 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h 	struct dpu_hw_intf *hw_intf;
hw_intf            15 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 		(e) && (e)->hw_intf ? \
hw_intf            16 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 		(e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__)
hw_intf            21 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 		(e) && (e)->hw_intf ? \
hw_intf            22 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 		(e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__)
hw_intf            87 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	if (phys_enc->hw_intf->cap->type == INTF_DSI) {
hw_intf           142 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	    phys_enc->hw_intf->cap->prog_fetch_lines_worst_case;
hw_intf           196 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	if (WARN_ON_ONCE(!phys_enc->hw_intf->ops.setup_prg_fetch))
hw_intf           214 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	phys_enc->hw_intf->ops.setup_prg_fetch(phys_enc->hw_intf, &f);
hw_intf           248 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	if (!phys_enc->hw_intf->ops.setup_timing_gen) {
hw_intf           274 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	intf_cfg.intf = phys_enc->hw_intf->idx;
hw_intf           280 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	phys_enc->hw_intf->ops.setup_timing_gen(phys_enc->hw_intf,
hw_intf           428 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 			  phys_enc->hw_intf->idx - INTF_0, ret, enable,
hw_intf           443 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	if (WARN_ON(!phys_enc->hw_intf->ops.enable_timing))
hw_intf           446 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	dpu_encoder_helper_split_config(phys_enc, phys_enc->hw_intf->idx);
hw_intf           459 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	ctl->ops.get_bitmask_intf(ctl, &flush_mask, phys_enc->hw_intf->idx);
hw_intf           580 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	if (!phys_enc->hw_intf || !phys_enc->hw_ctl) {
hw_intf           582 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 				phys_enc->hw_intf != 0, phys_enc->hw_ctl != 0);
hw_intf           586 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	if (WARN_ON(!phys_enc->hw_intf->ops.enable_timing))
hw_intf           595 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	phys_enc->hw_intf->ops.enable_timing(phys_enc->hw_intf, 0);
hw_intf           614 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 				  phys_enc->hw_intf->idx - INTF_0, ret);
hw_intf           632 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 				    phys_enc->hw_intf->idx - INTF_0);
hw_intf           634 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 		phys_enc->hw_intf->ops.enable_timing(phys_enc->hw_intf, 1);
hw_intf           649 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 			    phys_enc->hw_intf->idx - INTF_0,
hw_intf           674 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	if (!phys_enc->hw_intf || !phys_enc->hw_intf->ops.get_line_count)
hw_intf           677 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 	return phys_enc->hw_intf->ops.get_line_count(phys_enc->hw_intf);