hw_crtc_timing 294 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c struct dc_crtc_timing hw_crtc_timing = *crtc_timing; hw_crtc_timing 295 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c if (hw_crtc_timing.flags.INTERLACE) { hw_crtc_timing 297 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.v_total /= 2; hw_crtc_timing 298 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.v_border_top /= 2; hw_crtc_timing 299 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.v_addressable /= 2; hw_crtc_timing 300 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.v_border_bottom /= 2; hw_crtc_timing 301 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.v_front_porch /= 2; hw_crtc_timing 302 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.v_sync_width /= 2; hw_crtc_timing 305 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c switch (hw_crtc_timing.pixel_encoding) { hw_crtc_timing 314 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c if (hw_crtc_timing.flags.Y_ONLY) hw_crtc_timing 315 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c if (hw_crtc_timing.display_color_depth != COLOR_DEPTH_666) hw_crtc_timing 350 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c switch (hw_crtc_timing.display_color_depth) { hw_crtc_timing 378 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c switch (hw_crtc_timing.display_color_depth) { hw_crtc_timing 416 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR422) hw_crtc_timing 418 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c else if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR444) hw_crtc_timing 427 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR422) hw_crtc_timing 429 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c else if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR444) hw_crtc_timing 469 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c DP_MSA_HTOTAL, hw_crtc_timing.h_total, hw_crtc_timing 470 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c DP_MSA_VTOTAL, hw_crtc_timing.v_total); hw_crtc_timing 477 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c h_blank = hw_crtc_timing.h_total - hw_crtc_timing.h_border_left - hw_crtc_timing 478 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.h_addressable - hw_crtc_timing.h_border_right; hw_crtc_timing 480 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c h_back_porch = h_blank - hw_crtc_timing.h_front_porch - hw_crtc_timing 481 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.h_sync_width; hw_crtc_timing 484 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c h_active_start = hw_crtc_timing.h_sync_width + h_back_porch; hw_crtc_timing 487 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c v_active_start = hw_crtc_timing.v_total - hw_crtc_timing.v_border_top - hw_crtc_timing 488 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - hw_crtc_timing 489 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.v_front_porch; hw_crtc_timing 502 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.h_sync_width, hw_crtc_timing 504 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c !hw_crtc_timing.flags.HSYNC_POSITIVE_POLARITY, hw_crtc_timing 506 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.v_sync_width, hw_crtc_timing 508 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c !hw_crtc_timing.flags.VSYNC_POSITIVE_POLARITY); hw_crtc_timing 513 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c DP_MSA_HWIDTH, hw_crtc_timing.h_border_left + hw_crtc_timing 514 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.h_addressable + hw_crtc_timing.h_border_right, hw_crtc_timing 515 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c DP_MSA_VHEIGHT, hw_crtc_timing.v_border_top + hw_crtc_timing 516 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c hw_crtc_timing.v_addressable + hw_crtc_timing.v_border_bottom); hw_crtc_timing 1236 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c struct dc_crtc_timing hw_crtc_timing = {0}; hw_crtc_timing 1244 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c hw_crtc_timing.h_total = s.h_total + 1; hw_crtc_timing 1245 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c hw_crtc_timing.h_addressable = s.h_total - ((s.h_total - s.h_blank_start) + s.h_blank_end); hw_crtc_timing 1246 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c hw_crtc_timing.h_front_porch = s.h_total + 1 - s.h_blank_start; hw_crtc_timing 1247 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c hw_crtc_timing.h_sync_width = s.h_sync_a_end - s.h_sync_a_start; hw_crtc_timing 1249 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c hw_crtc_timing.v_total = s.v_total + 1; hw_crtc_timing 1250 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c hw_crtc_timing.v_addressable = s.v_total - ((s.v_total - s.v_blank_start) + s.v_blank_end); hw_crtc_timing 1251 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c hw_crtc_timing.v_front_porch = s.v_total + 1 - s.v_blank_start; hw_crtc_timing 1252 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c hw_crtc_timing.v_sync_width = s.v_sync_a_end - s.v_sync_a_start; hw_crtc_timing 1254 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c if (otg_timing->h_total != hw_crtc_timing.h_total) hw_crtc_timing 1257 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c if (otg_timing->h_border_left != hw_crtc_timing.h_border_left) hw_crtc_timing 1260 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c if (otg_timing->h_addressable != hw_crtc_timing.h_addressable) hw_crtc_timing 1263 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c if (otg_timing->h_border_right != hw_crtc_timing.h_border_right) hw_crtc_timing 1266 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c if (otg_timing->h_front_porch != hw_crtc_timing.h_front_porch) hw_crtc_timing 1269 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c if (otg_timing->h_sync_width != hw_crtc_timing.h_sync_width) hw_crtc_timing 1272 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c if (otg_timing->v_total != hw_crtc_timing.v_total) hw_crtc_timing 1275 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c if (otg_timing->v_border_top != hw_crtc_timing.v_border_top) hw_crtc_timing 1278 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c if (otg_timing->v_addressable != hw_crtc_timing.v_addressable) hw_crtc_timing 1281 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c if (otg_timing->v_border_bottom != hw_crtc_timing.v_border_bottom) hw_crtc_timing 1284 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c if (otg_timing->v_sync_width != hw_crtc_timing.v_sync_width) hw_crtc_timing 266 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dc_crtc_timing hw_crtc_timing = *crtc_timing; hw_crtc_timing 268 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c if (hw_crtc_timing.flags.INTERLACE) { hw_crtc_timing 270 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.v_total /= 2; hw_crtc_timing 271 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.v_border_top /= 2; hw_crtc_timing 272 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.v_addressable /= 2; hw_crtc_timing 273 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.v_border_bottom /= 2; hw_crtc_timing 274 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.v_front_porch /= 2; hw_crtc_timing 275 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.v_sync_width /= 2; hw_crtc_timing 280 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c switch (hw_crtc_timing.pixel_encoding) { hw_crtc_timing 287 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c if (hw_crtc_timing.flags.Y_ONLY) hw_crtc_timing 288 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c if (hw_crtc_timing.display_color_depth != COLOR_DEPTH_666) hw_crtc_timing 315 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c if ((hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR420) || hw_crtc_timing 324 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c switch (hw_crtc_timing.display_color_depth) { hw_crtc_timing 352 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c switch (hw_crtc_timing.display_color_depth) { hw_crtc_timing 388 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR422) hw_crtc_timing 390 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c else if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR444) hw_crtc_timing 398 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR422) hw_crtc_timing 400 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c else if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR444) hw_crtc_timing 431 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c DP_MSA_HTOTAL, hw_crtc_timing.h_total, hw_crtc_timing 432 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c DP_MSA_VTOTAL, hw_crtc_timing.v_total); hw_crtc_timing 438 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c h_blank = hw_crtc_timing.h_total - hw_crtc_timing.h_border_left - hw_crtc_timing 439 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.h_addressable - hw_crtc_timing.h_border_right; hw_crtc_timing 441 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c h_back_porch = h_blank - hw_crtc_timing.h_front_porch - hw_crtc_timing 442 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.h_sync_width; hw_crtc_timing 445 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c h_active_start = hw_crtc_timing.h_sync_width + h_back_porch; hw_crtc_timing 448 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c v_active_start = hw_crtc_timing.v_total - hw_crtc_timing.v_border_top - hw_crtc_timing 449 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - hw_crtc_timing 450 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.v_front_porch; hw_crtc_timing 460 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.h_sync_width, hw_crtc_timing 462 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c !hw_crtc_timing.flags.HSYNC_POSITIVE_POLARITY, hw_crtc_timing 464 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.v_sync_width, hw_crtc_timing 466 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c !hw_crtc_timing.flags.VSYNC_POSITIVE_POLARITY); hw_crtc_timing 470 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c DP_MSA_HWIDTH, hw_crtc_timing.h_border_left + hw_crtc_timing 471 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.h_addressable + hw_crtc_timing.h_border_right, hw_crtc_timing 472 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c DP_MSA_VHEIGHT, hw_crtc_timing.v_border_top + hw_crtc_timing 473 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c hw_crtc_timing.v_addressable + hw_crtc_timing.v_border_bottom);