huc 25 drivers/gpu/drm/i915/gt/intel_gt.h static inline struct intel_gt *huc_to_gt(struct intel_huc *huc) huc 27 drivers/gpu/drm/i915/gt/intel_gt.h return container_of(huc, struct intel_gt, uc.huc); huc 12 drivers/gpu/drm/i915/gt/uc/intel_huc.c void intel_huc_init_early(struct intel_huc *huc) huc 14 drivers/gpu/drm/i915/gt/uc/intel_huc.c struct drm_i915_private *i915 = huc_to_gt(huc)->i915; huc 16 drivers/gpu/drm/i915/gt/uc/intel_huc.c intel_huc_fw_init_early(huc); huc 19 drivers/gpu/drm/i915/gt/uc/intel_huc.c huc->status.reg = GEN11_HUC_KERNEL_LOAD_INFO; huc 20 drivers/gpu/drm/i915/gt/uc/intel_huc.c huc->status.mask = HUC_LOAD_SUCCESSFUL; huc 21 drivers/gpu/drm/i915/gt/uc/intel_huc.c huc->status.value = HUC_LOAD_SUCCESSFUL; huc 23 drivers/gpu/drm/i915/gt/uc/intel_huc.c huc->status.reg = HUC_STATUS2; huc 24 drivers/gpu/drm/i915/gt/uc/intel_huc.c huc->status.mask = HUC_FW_VERIFIED; huc 25 drivers/gpu/drm/i915/gt/uc/intel_huc.c huc->status.value = HUC_FW_VERIFIED; huc 29 drivers/gpu/drm/i915/gt/uc/intel_huc.c static int intel_huc_rsa_data_create(struct intel_huc *huc) huc 31 drivers/gpu/drm/i915/gt/uc/intel_huc.c struct intel_gt *gt = huc_to_gt(huc); huc 52 drivers/gpu/drm/i915/gt/uc/intel_huc.c GEM_BUG_ON(huc->fw.rsa_size > PAGE_SIZE); huc 63 drivers/gpu/drm/i915/gt/uc/intel_huc.c copied = intel_uc_fw_copy_rsa(&huc->fw, vaddr, vma->size); huc 64 drivers/gpu/drm/i915/gt/uc/intel_huc.c GEM_BUG_ON(copied < huc->fw.rsa_size); huc 68 drivers/gpu/drm/i915/gt/uc/intel_huc.c huc->rsa_data = vma; huc 73 drivers/gpu/drm/i915/gt/uc/intel_huc.c static void intel_huc_rsa_data_destroy(struct intel_huc *huc) huc 75 drivers/gpu/drm/i915/gt/uc/intel_huc.c i915_vma_unpin_and_release(&huc->rsa_data, 0); huc 78 drivers/gpu/drm/i915/gt/uc/intel_huc.c int intel_huc_init(struct intel_huc *huc) huc 80 drivers/gpu/drm/i915/gt/uc/intel_huc.c struct drm_i915_private *i915 = huc_to_gt(huc)->i915; huc 83 drivers/gpu/drm/i915/gt/uc/intel_huc.c err = intel_uc_fw_init(&huc->fw); huc 92 drivers/gpu/drm/i915/gt/uc/intel_huc.c err = intel_huc_rsa_data_create(huc); huc 99 drivers/gpu/drm/i915/gt/uc/intel_huc.c intel_uc_fw_fini(&huc->fw); huc 101 drivers/gpu/drm/i915/gt/uc/intel_huc.c intel_uc_fw_cleanup_fetch(&huc->fw); huc 106 drivers/gpu/drm/i915/gt/uc/intel_huc.c void intel_huc_fini(struct intel_huc *huc) huc 108 drivers/gpu/drm/i915/gt/uc/intel_huc.c if (!intel_uc_fw_is_available(&huc->fw)) huc 111 drivers/gpu/drm/i915/gt/uc/intel_huc.c intel_huc_rsa_data_destroy(huc); huc 112 drivers/gpu/drm/i915/gt/uc/intel_huc.c intel_uc_fw_fini(&huc->fw); huc 126 drivers/gpu/drm/i915/gt/uc/intel_huc.c int intel_huc_auth(struct intel_huc *huc) huc 128 drivers/gpu/drm/i915/gt/uc/intel_huc.c struct intel_gt *gt = huc_to_gt(huc); huc 132 drivers/gpu/drm/i915/gt/uc/intel_huc.c GEM_BUG_ON(intel_huc_is_authenticated(huc)); huc 134 drivers/gpu/drm/i915/gt/uc/intel_huc.c if (!intel_uc_fw_is_loaded(&huc->fw)) huc 142 drivers/gpu/drm/i915/gt/uc/intel_huc.c intel_guc_ggtt_offset(guc, huc->rsa_data)); huc 150 drivers/gpu/drm/i915/gt/uc/intel_huc.c huc->status.reg, huc 151 drivers/gpu/drm/i915/gt/uc/intel_huc.c huc->status.mask, huc 152 drivers/gpu/drm/i915/gt/uc/intel_huc.c huc->status.value, huc 159 drivers/gpu/drm/i915/gt/uc/intel_huc.c intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_RUNNING); huc 164 drivers/gpu/drm/i915/gt/uc/intel_huc.c intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_FAIL); huc 179 drivers/gpu/drm/i915/gt/uc/intel_huc.c int intel_huc_check_status(struct intel_huc *huc) huc 181 drivers/gpu/drm/i915/gt/uc/intel_huc.c struct intel_gt *gt = huc_to_gt(huc); huc 185 drivers/gpu/drm/i915/gt/uc/intel_huc.c if (!intel_huc_is_supported(huc)) huc 189 drivers/gpu/drm/i915/gt/uc/intel_huc.c status = intel_uncore_read(gt->uncore, huc->status.reg); huc 191 drivers/gpu/drm/i915/gt/uc/intel_huc.c return (status & huc->status.mask) == huc->status.value; huc 27 drivers/gpu/drm/i915/gt/uc/intel_huc.h void intel_huc_init_early(struct intel_huc *huc); huc 28 drivers/gpu/drm/i915/gt/uc/intel_huc.h int intel_huc_init(struct intel_huc *huc); huc 29 drivers/gpu/drm/i915/gt/uc/intel_huc.h void intel_huc_fini(struct intel_huc *huc); huc 30 drivers/gpu/drm/i915/gt/uc/intel_huc.h int intel_huc_auth(struct intel_huc *huc); huc 31 drivers/gpu/drm/i915/gt/uc/intel_huc.h int intel_huc_check_status(struct intel_huc *huc); huc 33 drivers/gpu/drm/i915/gt/uc/intel_huc.h static inline int intel_huc_sanitize(struct intel_huc *huc) huc 35 drivers/gpu/drm/i915/gt/uc/intel_huc.h intel_uc_fw_sanitize(&huc->fw); huc 39 drivers/gpu/drm/i915/gt/uc/intel_huc.h static inline bool intel_huc_is_supported(struct intel_huc *huc) huc 41 drivers/gpu/drm/i915/gt/uc/intel_huc.h return intel_uc_fw_is_supported(&huc->fw); huc 44 drivers/gpu/drm/i915/gt/uc/intel_huc.h static inline bool intel_huc_is_enabled(struct intel_huc *huc) huc 46 drivers/gpu/drm/i915/gt/uc/intel_huc.h return intel_uc_fw_is_enabled(&huc->fw); huc 49 drivers/gpu/drm/i915/gt/uc/intel_huc.h static inline bool intel_huc_is_authenticated(struct intel_huc *huc) huc 51 drivers/gpu/drm/i915/gt/uc/intel_huc.h return intel_uc_fw_is_running(&huc->fw); huc 31 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c void intel_huc_fw_init_early(struct intel_huc *huc) huc 33 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c struct intel_gt *gt = huc_to_gt(huc); huc 37 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c intel_uc_fw_init_early(&huc->fw, INTEL_UC_FW_TYPE_HUC, huc 54 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c int intel_huc_fw_upload(struct intel_huc *huc) huc 57 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c return intel_uc_fw_upload(&huc->fw, huc_to_gt(huc), 0, HUC_UKERNEL); huc 11 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.h void intel_huc_fw_init_early(struct intel_huc *huc); huc 12 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.h int intel_huc_fw_upload(struct intel_huc *huc); huc 89 drivers/gpu/drm/i915/gt/uc/intel_uc.c intel_huc_init_early(&uc->huc); huc 277 drivers/gpu/drm/i915/gt/uc/intel_uc.c intel_uc_fw_fetch(&uc->huc.fw, i915); huc 286 drivers/gpu/drm/i915/gt/uc/intel_uc.c intel_uc_fw_cleanup_fetch(&uc->huc.fw); huc 294 drivers/gpu/drm/i915/gt/uc/intel_uc.c struct intel_huc *huc = &uc->huc; huc 305 drivers/gpu/drm/i915/gt/uc/intel_uc.c intel_uc_fw_cleanup_fetch(&huc->fw); huc 310 drivers/gpu/drm/i915/gt/uc/intel_uc.c intel_huc_init(huc); huc 321 drivers/gpu/drm/i915/gt/uc/intel_uc.c intel_huc_fini(&uc->huc); huc 331 drivers/gpu/drm/i915/gt/uc/intel_uc.c struct intel_huc *huc = &uc->huc; huc 335 drivers/gpu/drm/i915/gt/uc/intel_uc.c intel_huc_sanitize(huc); huc 416 drivers/gpu/drm/i915/gt/uc/intel_uc.c struct intel_huc *huc = &uc->huc; huc 460 drivers/gpu/drm/i915/gt/uc/intel_uc.c intel_huc_fw_upload(huc); huc 479 drivers/gpu/drm/i915/gt/uc/intel_uc.c intel_huc_auth(huc); huc 500 drivers/gpu/drm/i915/gt/uc/intel_uc.c huc->fw.path, huc 501 drivers/gpu/drm/i915/gt/uc/intel_uc.c huc->fw.major_ver_found, huc->fw.minor_ver_found, huc 503 drivers/gpu/drm/i915/gt/uc/intel_uc.c yesno(intel_huc_is_authenticated(huc))); huc 15 drivers/gpu/drm/i915/gt/uc/intel_uc.h struct intel_huc huc; huc 64 drivers/gpu/drm/i915/gt/uc/intel_uc.h return intel_huc_is_enabled(&uc->huc); huc 22 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c return container_of(uc_fw, struct intel_gt, uc.huc.fw); huc 1799 drivers/gpu/drm/i915/i915_debugfs.c intel_uc_fw_dump(&dev_priv->gt.uc.huc.fw, &p); huc 96 drivers/gpu/drm/i915/i915_getparam.c value = intel_huc_check_status(&i915->gt.uc.huc); huc 1479 drivers/gpu/drm/i915/i915_gpu_error.c memcpy(&error_uc->huc_fw, &uc->huc.fw, sizeof(uc->huc.fw)); huc 1486 drivers/gpu/drm/i915/i915_gpu_error.c error_uc->huc_fw.path = kstrdup(uc->huc.fw.path, ALLOW_FAIL); huc 226 drivers/gpu/drm/i915/intel_wopcm.c u32 huc_fw_size = intel_uc_fw_get_upload_size(>->uc.huc.fw);