hubp2 34 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c hubp2->hubp_regs->reg hubp2 37 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c hubp2->base.ctx hubp2 41 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c hubp2->hubp_shift->field_name, hubp2->hubp_mask->field_name hubp2 46 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 82 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 172 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 194 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 245 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 306 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2, hubp2 328 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 371 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 404 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 417 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 526 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 529 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c hubp2_program_tiling(hubp2, tiling_info, format); hubp2 575 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 608 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 661 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 671 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 682 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 855 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 870 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 880 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 888 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 911 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 943 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 1024 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 1032 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 1039 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 1046 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 1047 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn_hubp_state *s = &hubp2->state; hubp2 1218 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); hubp2 1219 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn_hubp_state *s = &hubp2->state; hubp2 1273 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct dcn20_hubp *hubp2, hubp2 1280 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c hubp2->base.funcs = &dcn20_hubp_funcs; hubp2 1281 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c hubp2->base.ctx = ctx; hubp2 1282 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c hubp2->hubp_regs = hubp_regs; hubp2 1283 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c hubp2->hubp_shift = hubp_shift; hubp2 1284 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c hubp2->hubp_mask = hubp_mask; hubp2 1285 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c hubp2->base.inst = inst; hubp2 1286 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c hubp2->base.opp_id = OPP_ID_INVALID; hubp2 1287 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c hubp2->base.mpcc_id = 0xf; hubp2 233 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h struct dcn20_hubp *hubp2, hubp2 1419 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c struct dcn20_hubp *hubp2 = hubp2 1422 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (!hubp2) hubp2 1425 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (hubp2_construct(hubp2, ctx, inst, hubp2 1427 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c return &hubp2->base; hubp2 1430 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c kfree(hubp2);