hubp1              32 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	hubp1->hubp_regs->reg
hubp1              35 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	hubp1->base.ctx
hubp1              39 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	hubp1->hubp_shift->field_name, hubp1->hubp_mask->field_name
hubp1              43 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1              72 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1              83 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1              93 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             105 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             112 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             122 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             146 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             169 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             208 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             240 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             344 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             516 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             546 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             581 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             684 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             724 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             751 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             780 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             817 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             848 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1             849 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn_hubp_state *s = &hubp1->state;
hubp1            1020 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1            1021 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn_hubp_state *s = &hubp1->state;
hubp1            1095 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1            1128 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1            1201 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1            1209 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1            1254 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	struct dcn10_hubp *hubp1,
hubp1            1261 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	hubp1->base.funcs = &dcn10_hubp_funcs;
hubp1            1262 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	hubp1->base.ctx = ctx;
hubp1            1263 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	hubp1->hubp_regs = hubp_regs;
hubp1            1264 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	hubp1->hubp_shift = hubp_shift;
hubp1            1265 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	hubp1->hubp_mask = hubp_mask;
hubp1            1266 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	hubp1->base.inst = inst;
hubp1            1267 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	hubp1->base.opp_id = OPP_ID_INVALID;
hubp1            1268 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	hubp1->base.mpcc_id = 0xf;
hubp1             731 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h 	struct dcn10_hubp *hubp1,
hubp1            1742 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c static void mmhub_read_vm_system_aperture_settings(struct dcn10_hubp *hubp1,
hubp1            1767 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c static void mmhub_read_vm_context0_settings(struct dcn10_hubp *hubp1,
hubp1            1814 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
hubp1            1818 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	mmhub_read_vm_system_aperture_settings(hubp1, &apt, hws);
hubp1            1819 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	mmhub_read_vm_context0_settings(hubp1, &vm0, hws);
hubp1             974 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	struct dcn10_hubp *hubp1 =
hubp1             977 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	if (!hubp1)
hubp1             980 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	dcn10_hubp_construct(hubp1, ctx, inst,
hubp1             982 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	return &hubp1->base;