htotal_cntl       749 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 	uint32_t htotal_cntl = 0;
htotal_cntl       805 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 							htotal_cntl  = 0;
htotal_cntl       845 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		htotal_cntl    = mode->htotal & 0x7;
htotal_cntl       859 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 			radeon_legacy_tv_adjust_pll2(encoder, &htotal_cntl,
htotal_cntl       891 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL(RADEON_HTOTAL2_CNTL, htotal_cntl);
htotal_cntl       902 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 			  (unsigned)htotal_cntl,
htotal_cntl       923 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 			radeon_legacy_tv_adjust_pll1(encoder, &htotal_cntl, &pll_ref_div,
htotal_cntl       996 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL(RADEON_HTOTAL_CNTL, htotal_cntl);
htotal_cntl      1008 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 			  (unsigned)htotal_cntl,
htotal_cntl       878 drivers/gpu/drm/radeon/radeon_legacy_tv.c 				  uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
htotal_cntl       888 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	*htotal_cntl = (const_ptr->hor_total & 0x7) | RADEON_HTOT_CNTL_VGA_EN;
htotal_cntl       961 drivers/gpu/drm/radeon/radeon_mode.h 				  uint32_t *htotal_cntl, uint32_t *ppll_ref_div,