ICC_SRE_EL2       154 arch/arm/include/asm/arch_gicv3.h CPUIF_MAP(ICC_HSRE, ICC_SRE_EL2)
ICC_SRE_EL2       296 virt/kvm/arm/hyp/vgic-v3-sr.c 	write_gicreg(read_gicreg(ICC_SRE_EL2) & ~ICC_SRE_EL2_ENABLE,
ICC_SRE_EL2       297 virt/kvm/arm/hyp/vgic-v3-sr.c 		     ICC_SRE_EL2);
ICC_SRE_EL2       318 virt/kvm/arm/hyp/vgic-v3-sr.c 	val = read_gicreg(ICC_SRE_EL2);
ICC_SRE_EL2       319 virt/kvm/arm/hyp/vgic-v3-sr.c 	write_gicreg(val | ICC_SRE_EL2_ENABLE, ICC_SRE_EL2);