hsu 151 drivers/dma/hsu/hsu.c if (nr >= chip->hsu->nr_channels) hsu 154 drivers/dma/hsu/hsu.c hsuc = &chip->hsu->chan[nr]; hsu 209 drivers/dma/hsu/hsu.c if (nr >= chip->hsu->nr_channels) hsu 212 drivers/dma/hsu/hsu.c hsuc = &chip->hsu->chan[nr]; hsu 418 drivers/dma/hsu/hsu.c struct hsu_dma *hsu; hsu 423 drivers/dma/hsu/hsu.c hsu = devm_kzalloc(chip->dev, sizeof(*hsu), GFP_KERNEL); hsu 424 drivers/dma/hsu/hsu.c if (!hsu) hsu 427 drivers/dma/hsu/hsu.c chip->hsu = hsu; hsu 430 drivers/dma/hsu/hsu.c hsu->nr_channels = (chip->length - chip->offset) / HSU_DMA_CHAN_LENGTH; hsu 432 drivers/dma/hsu/hsu.c hsu->chan = devm_kcalloc(chip->dev, hsu->nr_channels, hsu 433 drivers/dma/hsu/hsu.c sizeof(*hsu->chan), GFP_KERNEL); hsu 434 drivers/dma/hsu/hsu.c if (!hsu->chan) hsu 437 drivers/dma/hsu/hsu.c INIT_LIST_HEAD(&hsu->dma.channels); hsu 438 drivers/dma/hsu/hsu.c for (i = 0; i < hsu->nr_channels; i++) { hsu 439 drivers/dma/hsu/hsu.c struct hsu_dma_chan *hsuc = &hsu->chan[i]; hsu 442 drivers/dma/hsu/hsu.c vchan_init(&hsuc->vchan, &hsu->dma); hsu 448 drivers/dma/hsu/hsu.c dma_cap_set(DMA_SLAVE, hsu->dma.cap_mask); hsu 449 drivers/dma/hsu/hsu.c dma_cap_set(DMA_PRIVATE, hsu->dma.cap_mask); hsu 451 drivers/dma/hsu/hsu.c hsu->dma.device_free_chan_resources = hsu_dma_free_chan_resources; hsu 453 drivers/dma/hsu/hsu.c hsu->dma.device_prep_slave_sg = hsu_dma_prep_slave_sg; hsu 455 drivers/dma/hsu/hsu.c hsu->dma.device_issue_pending = hsu_dma_issue_pending; hsu 456 drivers/dma/hsu/hsu.c hsu->dma.device_tx_status = hsu_dma_tx_status; hsu 458 drivers/dma/hsu/hsu.c hsu->dma.device_config = hsu_dma_slave_config; hsu 459 drivers/dma/hsu/hsu.c hsu->dma.device_pause = hsu_dma_pause; hsu 460 drivers/dma/hsu/hsu.c hsu->dma.device_resume = hsu_dma_resume; hsu 461 drivers/dma/hsu/hsu.c hsu->dma.device_terminate_all = hsu_dma_terminate_all; hsu 462 drivers/dma/hsu/hsu.c hsu->dma.device_synchronize = hsu_dma_synchronize; hsu 464 drivers/dma/hsu/hsu.c hsu->dma.src_addr_widths = HSU_DMA_BUSWIDTHS; hsu 465 drivers/dma/hsu/hsu.c hsu->dma.dst_addr_widths = HSU_DMA_BUSWIDTHS; hsu 466 drivers/dma/hsu/hsu.c hsu->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); hsu 467 drivers/dma/hsu/hsu.c hsu->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; hsu 469 drivers/dma/hsu/hsu.c hsu->dma.dev = chip->dev; hsu 471 drivers/dma/hsu/hsu.c dma_set_max_seg_size(hsu->dma.dev, HSU_CH_DxTSR_MASK); hsu 473 drivers/dma/hsu/hsu.c ret = dma_async_device_register(&hsu->dma); hsu 477 drivers/dma/hsu/hsu.c dev_info(chip->dev, "Found HSU DMA, %d channels\n", hsu->nr_channels); hsu 484 drivers/dma/hsu/hsu.c struct hsu_dma *hsu = chip->hsu; hsu 487 drivers/dma/hsu/hsu.c dma_async_device_unregister(&hsu->dma); hsu 489 drivers/dma/hsu/hsu.c for (i = 0; i < hsu->nr_channels; i++) { hsu 490 drivers/dma/hsu/hsu.c struct hsu_dma_chan *hsuc = &hsu->chan[i]; hsu 46 drivers/dma/hsu/pci.c for (i = 0; i < chip->hsu->nr_channels; i++) { hsu 34 include/linux/dma/hsu.h struct hsu_dma *hsu;