hqvdp             376 drivers/gpu/drm/sti/sti_hqvdp.c static int sti_hqvdp_get_free_cmd(struct sti_hqvdp *hqvdp)
hqvdp             379 drivers/gpu/drm/sti/sti_hqvdp.c 	u32 cmd = hqvdp->hqvdp_cmd_paddr;
hqvdp             382 drivers/gpu/drm/sti/sti_hqvdp.c 	curr_cmd = readl(hqvdp->regs + HQVDP_MBX_CURRENT_CMD);
hqvdp             383 drivers/gpu/drm/sti/sti_hqvdp.c 	next_cmd = readl(hqvdp->regs + HQVDP_MBX_NEXT_CMD);
hqvdp             404 drivers/gpu/drm/sti/sti_hqvdp.c static int sti_hqvdp_get_curr_cmd(struct sti_hqvdp *hqvdp)
hqvdp             407 drivers/gpu/drm/sti/sti_hqvdp.c 	u32 cmd = hqvdp->hqvdp_cmd_paddr;
hqvdp             410 drivers/gpu/drm/sti/sti_hqvdp.c 	curr_cmd = readl(hqvdp->regs + HQVDP_MBX_CURRENT_CMD);
hqvdp             432 drivers/gpu/drm/sti/sti_hqvdp.c static int sti_hqvdp_get_next_cmd(struct sti_hqvdp *hqvdp)
hqvdp             435 drivers/gpu/drm/sti/sti_hqvdp.c 	dma_addr_t cmd = hqvdp->hqvdp_cmd_paddr;
hqvdp             438 drivers/gpu/drm/sti/sti_hqvdp.c 	next_cmd = readl(hqvdp->regs + HQVDP_MBX_NEXT_CMD);
hqvdp             451 drivers/gpu/drm/sti/sti_hqvdp.c 				   readl(hqvdp->regs + reg))
hqvdp             566 drivers/gpu/drm/sti/sti_hqvdp.c 	struct sti_hqvdp *hqvdp = (struct sti_hqvdp *)node->info_ent->data;
hqvdp             571 drivers/gpu/drm/sti/sti_hqvdp.c 		   sti_plane_to_str(&hqvdp->plane), hqvdp->regs);
hqvdp             577 drivers/gpu/drm/sti/sti_hqvdp.c 	infoxp70 = readl(hqvdp->regs + HQVDP_MBX_INFO_XP70);
hqvdp             590 drivers/gpu/drm/sti/sti_hqvdp.c 	if (readl(hqvdp->regs + HQVDP_MBX_STARTUP_CTRL1)
hqvdp             596 drivers/gpu/drm/sti/sti_hqvdp.c 	if (readl(hqvdp->regs + HQVDP_MBX_STARTUP_CTRL2)
hqvdp             605 drivers/gpu/drm/sti/sti_hqvdp.c 	if (!(readl(hqvdp->regs + HQVDP_MBX_SOFT_VSYNC) & 3))
hqvdp             611 drivers/gpu/drm/sti/sti_hqvdp.c 	cmd = readl(hqvdp->regs + HQVDP_MBX_CURRENT_CMD);
hqvdp             612 drivers/gpu/drm/sti/sti_hqvdp.c 	cmd_offset = sti_hqvdp_get_curr_cmd(hqvdp);
hqvdp             616 drivers/gpu/drm/sti/sti_hqvdp.c 		virt = hqvdp->hqvdp_cmd + cmd_offset;
hqvdp             623 drivers/gpu/drm/sti/sti_hqvdp.c 	cmd = readl(hqvdp->regs + HQVDP_MBX_NEXT_CMD);
hqvdp             624 drivers/gpu/drm/sti/sti_hqvdp.c 	cmd_offset = sti_hqvdp_get_next_cmd(hqvdp);
hqvdp             628 drivers/gpu/drm/sti/sti_hqvdp.c 		virt = hqvdp->hqvdp_cmd + cmd_offset;
hqvdp             642 drivers/gpu/drm/sti/sti_hqvdp.c static int hqvdp_debugfs_init(struct sti_hqvdp *hqvdp, struct drm_minor *minor)
hqvdp             647 drivers/gpu/drm/sti/sti_hqvdp.c 		hqvdp_debugfs_files[i].data = hqvdp;
hqvdp             732 drivers/gpu/drm/sti/sti_hqvdp.c static bool sti_hqvdp_check_hw_scaling(struct sti_hqvdp *hqvdp,
hqvdp             740 drivers/gpu/drm/sti/sti_hqvdp.c 	lfw = mode->htotal * (clk_get_rate(hqvdp->clk) / 1000000);
hqvdp             754 drivers/gpu/drm/sti/sti_hqvdp.c static void sti_hqvdp_disable(struct sti_hqvdp *hqvdp)
hqvdp             758 drivers/gpu/drm/sti/sti_hqvdp.c 	DRM_DEBUG_DRIVER("%s\n", sti_plane_to_str(&hqvdp->plane));
hqvdp             761 drivers/gpu/drm/sti/sti_hqvdp.c 	if (sti_vtg_unregister_client(hqvdp->vtg, &hqvdp->vtg_nb))
hqvdp             765 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(0, hqvdp->regs + HQVDP_MBX_NEXT_CMD);
hqvdp             768 drivers/gpu/drm/sti/sti_hqvdp.c 		if (readl(hqvdp->regs + HQVDP_MBX_INFO_XP70)
hqvdp             775 drivers/gpu/drm/sti/sti_hqvdp.c 	clk_disable_unprepare(hqvdp->clk_pix_main);
hqvdp             780 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp->plane.status = STI_PLANE_DISABLED;
hqvdp             781 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp->vtg_registered = false;
hqvdp             797 drivers/gpu/drm/sti/sti_hqvdp.c 	struct sti_hqvdp *hqvdp = container_of(nb, struct sti_hqvdp, vtg_nb);
hqvdp             806 drivers/gpu/drm/sti/sti_hqvdp.c 	if (hqvdp->plane.status == STI_PLANE_FLUSHING) {
hqvdp             809 drivers/gpu/drm/sti/sti_hqvdp.c 				 sti_plane_to_str(&hqvdp->plane));
hqvdp             811 drivers/gpu/drm/sti/sti_hqvdp.c 		sti_hqvdp_disable(hqvdp);
hqvdp             814 drivers/gpu/drm/sti/sti_hqvdp.c 	if (hqvdp->btm_field_pending) {
hqvdp             816 drivers/gpu/drm/sti/sti_hqvdp.c 		btm_cmd_offset = sti_hqvdp_get_free_cmd(hqvdp);
hqvdp             817 drivers/gpu/drm/sti/sti_hqvdp.c 		top_cmd_offest = sti_hqvdp_get_curr_cmd(hqvdp);
hqvdp             823 drivers/gpu/drm/sti/sti_hqvdp.c 		btm_cmd = hqvdp->hqvdp_cmd + btm_cmd_offset;
hqvdp             824 drivers/gpu/drm/sti/sti_hqvdp.c 		top_cmd = hqvdp->hqvdp_cmd + top_cmd_offest;
hqvdp             835 drivers/gpu/drm/sti/sti_hqvdp.c 		writel(hqvdp->hqvdp_cmd_paddr + btm_cmd_offset,
hqvdp             836 drivers/gpu/drm/sti/sti_hqvdp.c 				hqvdp->regs + HQVDP_MBX_NEXT_CMD);
hqvdp             838 drivers/gpu/drm/sti/sti_hqvdp.c 		hqvdp->btm_field_pending = false;
hqvdp             840 drivers/gpu/drm/sti/sti_hqvdp.c 		dev_dbg(hqvdp->dev, "%s Posted command:0x%x\n",
hqvdp             841 drivers/gpu/drm/sti/sti_hqvdp.c 				__func__, hqvdp->hqvdp_cmd_paddr);
hqvdp             843 drivers/gpu/drm/sti/sti_hqvdp.c 		sti_plane_update_fps(&hqvdp->plane, false, true);
hqvdp             849 drivers/gpu/drm/sti/sti_hqvdp.c static void sti_hqvdp_init(struct sti_hqvdp *hqvdp)
hqvdp             854 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp->vtg_nb.notifier_call = sti_hqvdp_vtg_cb;
hqvdp             858 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp->hqvdp_cmd = dma_alloc_wc(hqvdp->dev, size,
hqvdp             861 drivers/gpu/drm/sti/sti_hqvdp.c 	if (!hqvdp->hqvdp_cmd) {
hqvdp             866 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp->hqvdp_cmd_paddr = (u32)dma_addr;
hqvdp             867 drivers/gpu/drm/sti/sti_hqvdp.c 	memset(hqvdp->hqvdp_cmd, 0, size);
hqvdp             870 drivers/gpu/drm/sti/sti_hqvdp.c static void sti_hqvdp_init_plugs(struct sti_hqvdp *hqvdp)
hqvdp             873 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_PAGE_SIZE_256, hqvdp->regs + HQVDP_RD_PLUG_PAGE_SIZE);
hqvdp             874 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MIN_OPC_8, hqvdp->regs + HQVDP_RD_PLUG_MIN_OPC);
hqvdp             875 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MAX_OPC_64, hqvdp->regs + HQVDP_RD_PLUG_MAX_OPC);
hqvdp             876 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MAX_CHK_2X, hqvdp->regs + HQVDP_RD_PLUG_MAX_CHK);
hqvdp             877 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MAX_MSG_1X, hqvdp->regs + HQVDP_RD_PLUG_MAX_MSG);
hqvdp             878 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MIN_SPACE_1, hqvdp->regs + HQVDP_RD_PLUG_MIN_SPACE);
hqvdp             879 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_CONTROL_ENABLE, hqvdp->regs + HQVDP_RD_PLUG_CONTROL);
hqvdp             881 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_PAGE_SIZE_256, hqvdp->regs + HQVDP_WR_PLUG_PAGE_SIZE);
hqvdp             882 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MIN_OPC_8, hqvdp->regs + HQVDP_WR_PLUG_MIN_OPC);
hqvdp             883 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MAX_OPC_64, hqvdp->regs + HQVDP_WR_PLUG_MAX_OPC);
hqvdp             884 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MAX_CHK_2X, hqvdp->regs + HQVDP_WR_PLUG_MAX_CHK);
hqvdp             885 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MAX_MSG_1X, hqvdp->regs + HQVDP_WR_PLUG_MAX_MSG);
hqvdp             886 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MIN_SPACE_1, hqvdp->regs + HQVDP_WR_PLUG_MIN_SPACE);
hqvdp             887 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_CONTROL_ENABLE, hqvdp->regs + HQVDP_WR_PLUG_CONTROL);
hqvdp             896 drivers/gpu/drm/sti/sti_hqvdp.c static void sti_hqvdp_start_xp70(struct sti_hqvdp *hqvdp)
hqvdp             911 drivers/gpu/drm/sti/sti_hqvdp.c 	if (hqvdp->xp70_initialized) {
hqvdp             917 drivers/gpu/drm/sti/sti_hqvdp.c 	if (request_firmware(&firmware, HQVDP_FMW_NAME, hqvdp->dev)) {
hqvdp             953 drivers/gpu/drm/sti/sti_hqvdp.c 	if (clk_prepare_enable(hqvdp->clk))
hqvdp             957 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(SW_RESET_CTRL_FULL, hqvdp->regs + HQVDP_MBX_SW_RESET_CTRL);
hqvdp             960 drivers/gpu/drm/sti/sti_hqvdp.c 		if (readl(hqvdp->regs + HQVDP_MBX_STARTUP_CTRL1)
hqvdp             967 drivers/gpu/drm/sti/sti_hqvdp.c 		clk_disable_unprepare(hqvdp->clk);
hqvdp             973 drivers/gpu/drm/sti/sti_hqvdp.c 		writel(fw_rd_plug[i], hqvdp->regs + HQVDP_RD_PLUG + i * 4);
hqvdp             975 drivers/gpu/drm/sti/sti_hqvdp.c 		writel(fw_wr_plug[i], hqvdp->regs + HQVDP_WR_PLUG + i * 4);
hqvdp             977 drivers/gpu/drm/sti/sti_hqvdp.c 	sti_hqvdp_init_plugs(hqvdp);
hqvdp             980 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(STARTUP_CTRL1_AUTH_IDLE, hqvdp->regs + HQVDP_MBX_STARTUP_CTRL1);
hqvdp             983 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(SOFT_VSYNC_SW_CTRL_IRQ, hqvdp->regs + HQVDP_MBX_SOFT_VSYNC);
hqvdp             984 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(0, hqvdp->regs + HQVDP_MBX_NEXT_CMD);
hqvdp             988 drivers/gpu/drm/sti/sti_hqvdp.c 		writel(fw_pmem[i], hqvdp->regs + HQVDP_PMEM + i * 4);
hqvdp             990 drivers/gpu/drm/sti/sti_hqvdp.c 		writel(fw_dmem[i], hqvdp->regs + HQVDP_DMEM + i * 4);
hqvdp             993 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(STARTUP_CTRL2_FETCH_EN, hqvdp->regs + HQVDP_MBX_STARTUP_CTRL2);
hqvdp             997 drivers/gpu/drm/sti/sti_hqvdp.c 		if (readl(hqvdp->regs + HQVDP_MBX_INFO_XP70)
hqvdp            1004 drivers/gpu/drm/sti/sti_hqvdp.c 		clk_disable_unprepare(hqvdp->clk);
hqvdp            1009 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(SOFT_VSYNC_HW, hqvdp->regs + HQVDP_MBX_SOFT_VSYNC);
hqvdp            1013 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp->xp70_initialized = true;
hqvdp            1023 drivers/gpu/drm/sti/sti_hqvdp.c 	struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane);
hqvdp            1047 drivers/gpu/drm/sti/sti_hqvdp.c 	if (mode->clock && !sti_hqvdp_check_hw_scaling(hqvdp, mode,
hqvdp            1076 drivers/gpu/drm/sti/sti_hqvdp.c 	if (!hqvdp->xp70_initialized)
hqvdp            1078 drivers/gpu/drm/sti/sti_hqvdp.c 		sti_hqvdp_start_xp70(hqvdp);
hqvdp            1080 drivers/gpu/drm/sti/sti_hqvdp.c 	if (!hqvdp->vtg_registered) {
hqvdp            1082 drivers/gpu/drm/sti/sti_hqvdp.c 		if (clk_prepare_enable(hqvdp->clk_pix_main)) {
hqvdp            1088 drivers/gpu/drm/sti/sti_hqvdp.c 		if (sti_vtg_register_client(hqvdp->vtg,
hqvdp            1089 drivers/gpu/drm/sti/sti_hqvdp.c 					    &hqvdp->vtg_nb,
hqvdp            1092 drivers/gpu/drm/sti/sti_hqvdp.c 			clk_disable_unprepare(hqvdp->clk_pix_main);
hqvdp            1095 drivers/gpu/drm/sti/sti_hqvdp.c 		hqvdp->vtg_registered = true;
hqvdp            1114 drivers/gpu/drm/sti/sti_hqvdp.c 	struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane);
hqvdp            1154 drivers/gpu/drm/sti/sti_hqvdp.c 	cmd_offset = sti_hqvdp_get_free_cmd(hqvdp);
hqvdp            1159 drivers/gpu/drm/sti/sti_hqvdp.c 	cmd = hqvdp->hqvdp_cmd + cmd_offset;
hqvdp            1225 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(hqvdp->hqvdp_cmd_paddr + cmd_offset,
hqvdp            1226 drivers/gpu/drm/sti/sti_hqvdp.c 	       hqvdp->regs + HQVDP_MBX_NEXT_CMD);
hqvdp            1230 drivers/gpu/drm/sti/sti_hqvdp.c 		hqvdp->btm_field_pending = true;
hqvdp            1232 drivers/gpu/drm/sti/sti_hqvdp.c 	dev_dbg(hqvdp->dev, "%s Posted command:0x%x\n",
hqvdp            1233 drivers/gpu/drm/sti/sti_hqvdp.c 		__func__, hqvdp->hqvdp_cmd_paddr + cmd_offset);
hqvdp            1275 drivers/gpu/drm/sti/sti_hqvdp.c 	struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane);
hqvdp            1277 drivers/gpu/drm/sti/sti_hqvdp.c 	return hqvdp_debugfs_init(hqvdp, drm_plane->dev->primary);
hqvdp            1293 drivers/gpu/drm/sti/sti_hqvdp.c 	struct sti_hqvdp *hqvdp = dev_get_drvdata(dev);
hqvdp            1296 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp->plane.desc = desc;
hqvdp            1297 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp->plane.status = STI_PLANE_DISABLED;
hqvdp            1299 drivers/gpu/drm/sti/sti_hqvdp.c 	sti_hqvdp_init(hqvdp);
hqvdp            1301 drivers/gpu/drm/sti/sti_hqvdp.c 	res = drm_universal_plane_init(drm_dev, &hqvdp->plane.drm_plane, 1,
hqvdp            1311 drivers/gpu/drm/sti/sti_hqvdp.c 	drm_plane_helper_add(&hqvdp->plane.drm_plane, &sti_hqvdp_helpers_funcs);
hqvdp            1313 drivers/gpu/drm/sti/sti_hqvdp.c 	sti_plane_init_property(&hqvdp->plane, DRM_PLANE_TYPE_OVERLAY);
hqvdp            1315 drivers/gpu/drm/sti/sti_hqvdp.c 	return &hqvdp->plane.drm_plane;
hqvdp            1320 drivers/gpu/drm/sti/sti_hqvdp.c 	struct sti_hqvdp *hqvdp = dev_get_drvdata(dev);
hqvdp            1326 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp->drm_dev = drm_dev;
hqvdp            1329 drivers/gpu/drm/sti/sti_hqvdp.c 	plane = sti_hqvdp_create(drm_dev, hqvdp->dev, STI_HQVDP_0);
hqvdp            1351 drivers/gpu/drm/sti/sti_hqvdp.c 	struct sti_hqvdp *hqvdp;
hqvdp            1356 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp = devm_kzalloc(dev, sizeof(*hqvdp), GFP_KERNEL);
hqvdp            1357 drivers/gpu/drm/sti/sti_hqvdp.c 	if (!hqvdp) {
hqvdp            1362 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp->dev = dev;
hqvdp            1370 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp->regs = devm_ioremap(dev, res->start, resource_size(res));
hqvdp            1371 drivers/gpu/drm/sti/sti_hqvdp.c 	if (!hqvdp->regs) {
hqvdp            1377 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp->clk = devm_clk_get(dev, "hqvdp");
hqvdp            1378 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp->clk_pix_main = devm_clk_get(dev, "pix_main");
hqvdp            1379 drivers/gpu/drm/sti/sti_hqvdp.c 	if (IS_ERR(hqvdp->clk) || IS_ERR(hqvdp->clk_pix_main)) {
hqvdp            1385 drivers/gpu/drm/sti/sti_hqvdp.c 	hqvdp->reset = devm_reset_control_get(dev, "hqvdp");
hqvdp            1386 drivers/gpu/drm/sti/sti_hqvdp.c 	if (!IS_ERR(hqvdp->reset))
hqvdp            1387 drivers/gpu/drm/sti/sti_hqvdp.c 		reset_control_deassert(hqvdp->reset);
hqvdp            1391 drivers/gpu/drm/sti/sti_hqvdp.c 		hqvdp->vtg = of_vtg_find(vtg_np);
hqvdp            1394 drivers/gpu/drm/sti/sti_hqvdp.c 	platform_set_drvdata(pdev, hqvdp);