hpd 73 arch/powerpc/include/asm/book3s/64/hash-4k.h static inline int hash__hugepd_ok(hugepd_t hpd) hpd 75 arch/powerpc/include/asm/book3s/64/hash-4k.h unsigned long hpdval = hpd_val(hpd); hpd 68 arch/powerpc/include/asm/book3s/64/hugetlb.h static inline pte_t *hugepd_page(hugepd_t hpd) hpd 70 arch/powerpc/include/asm/book3s/64/hugetlb.h BUG_ON(!hugepd_ok(hpd)); hpd 75 arch/powerpc/include/asm/book3s/64/hugetlb.h return __va(hpd_val(hpd) & HUGEPD_ADDR_MASK); hpd 78 arch/powerpc/include/asm/book3s/64/hugetlb.h static inline unsigned int hugepd_mmu_psize(hugepd_t hpd) hpd 80 arch/powerpc/include/asm/book3s/64/hugetlb.h return (hpd_val(hpd) & HUGEPD_SHIFT_MASK) >> 2; hpd 83 arch/powerpc/include/asm/book3s/64/hugetlb.h static inline unsigned int hugepd_shift(hugepd_t hpd) hpd 85 arch/powerpc/include/asm/book3s/64/hugetlb.h return mmu_psize_to_shift(hugepd_mmu_psize(hpd)); hpd 94 arch/powerpc/include/asm/book3s/64/hugetlb.h static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr, hpd 97 arch/powerpc/include/asm/book3s/64/hugetlb.h unsigned long idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(hpd); hpd 99 arch/powerpc/include/asm/book3s/64/hugetlb.h return hugepd_page(hpd) + idx; hpd 44 arch/powerpc/include/asm/book3s/64/pgtable-4k.h static inline int hugepd_ok(hugepd_t hpd) hpd 48 arch/powerpc/include/asm/book3s/64/pgtable-4k.h return hash__hugepd_ok(hpd); hpd 50 arch/powerpc/include/asm/book3s/64/pgtable-4k.h #define is_hugepd(hpd) (hugepd_ok(hpd)) hpd 47 arch/powerpc/include/asm/book3s/64/pgtable-64k.h static inline int hugepd_ok(hugepd_t hpd) hpd 76 arch/powerpc/include/asm/hugetlb.h static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr, hpd 7 arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h static inline pte_t *hugepd_page(hugepd_t hpd) hpd 9 arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h BUG_ON(!hugepd_ok(hpd)); hpd 11 arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h return (pte_t *)__va(hpd_val(hpd) & ~HUGEPD_SHIFT_MASK); hpd 14 arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h static inline unsigned int hugepd_shift(hugepd_t hpd) hpd 16 arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h return ((hpd_val(hpd) & _PMD_PAGE_MASK) >> 1) + 17; hpd 19 arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr, hpd 24 arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h return hugepd_page(hpd) + idx; hpd 5 arch/powerpc/include/asm/nohash/hugetlb-book3e.h static inline pte_t *hugepd_page(hugepd_t hpd) hpd 7 arch/powerpc/include/asm/nohash/hugetlb-book3e.h if (WARN_ON(!hugepd_ok(hpd))) hpd 10 arch/powerpc/include/asm/nohash/hugetlb-book3e.h return (pte_t *)((hpd_val(hpd) & ~HUGEPD_SHIFT_MASK) | PD_HUGE); hpd 13 arch/powerpc/include/asm/nohash/hugetlb-book3e.h static inline unsigned int hugepd_shift(hugepd_t hpd) hpd 15 arch/powerpc/include/asm/nohash/hugetlb-book3e.h return hpd_val(hpd) & HUGEPD_SHIFT_MASK; hpd 18 arch/powerpc/include/asm/nohash/hugetlb-book3e.h static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr, hpd 26 arch/powerpc/include/asm/nohash/hugetlb-book3e.h return hugepd_page(hpd); hpd 267 arch/powerpc/include/asm/nohash/pgtable.h static inline int hugepd_ok(hugepd_t hpd) hpd 270 arch/powerpc/include/asm/nohash/pgtable.h return ((hpd_val(hpd) & 0x4) != 0); hpd 273 arch/powerpc/include/asm/nohash/pgtable.h return (hpd_val(hpd) && (hpd_val(hpd) & PD_HUGE) == 0); hpd 293 arch/powerpc/include/asm/nohash/pgtable.h #define is_hugepd(hpd) (hugepd_ok(hpd)) hpd 31 arch/powerpc/mm/hugetlbpage.c #define hugepd_none(hpd) (hpd_val(hpd) == 0) hpd 497 arch/powerpc/mm/hugetlbpage.c unsigned long address, hugepd_t hpd, hpd 504 arch/powerpc/mm/hugetlbpage.c int shift = hugepd_shift(hpd); hpd 515 arch/powerpc/mm/hugetlbpage.c ptep = hugepte_offset(hpd, address, pdshift); hpd 257 drivers/extcon/extcon-usbc-cros-ec.c bool hpd = false; hpd 284 drivers/extcon/extcon-usbc-cros-ec.c hpd = pd_mux_state & USB_PD_MUX_HPD_IRQ; hpd 288 drivers/extcon/extcon-usbc-cros-ec.c role, power_type, dr, pr, polarity, mux, dp, hpd); hpd 346 drivers/extcon/extcon-usbc-cros-ec.c (union extcon_property_value)(int)hpd); hpd 352 drivers/extcon/extcon-usbc-cros-ec.c } else if (hpd) { hpd 355 drivers/extcon/extcon-usbc-cros-ec.c (union extcon_property_value)(int)hpd); hpd 202 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_hpd hpd; hpd 205 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c memset(&hpd, 0, sizeof(struct amdgpu_hpd)); hpd 209 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c hpd.gpio = *gpio; hpd 213 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c hpd.hpd = AMDGPU_HPD_1; hpd 216 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c hpd.hpd = AMDGPU_HPD_2; hpd 219 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c hpd.hpd = AMDGPU_HPD_3; hpd 222 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c hpd.hpd = AMDGPU_HPD_4; hpd 225 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c hpd.hpd = AMDGPU_HPD_5; hpd 228 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c hpd.hpd = AMDGPU_HPD_6; hpd 231 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c hpd.hpd = AMDGPU_HPD_NONE; hpd 235 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c hpd.hpd = AMDGPU_HPD_NONE; hpd 236 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c return hpd; hpd 309 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_hpd hpd; hpd 472 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c hpd.hpd = AMDGPU_HPD_NONE; hpd 512 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c hpd = amdgpu_atombios_get_hpd_info_from_gpio(adev, &gpio); hpd 513 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c hpd.plugged_state = hpd_record->ucPlugged_PinState; hpd 529 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c ddc_bus.hpd = hpd.hpd; hpd 538 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c &hpd, hpd 50 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (amdgpu_connector->hpd.hpd == AMDGPU_HPD_NONE) hpd 53 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_display_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); hpd 74 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd) && hpd 947 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (amdgpu_connector->hpd.hpd != AMDGPU_HPD_NONE) { hpd 948 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) hpd 1036 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (!amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) { hpd 1386 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) { hpd 1499 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c struct amdgpu_hpd *hpd, hpd 1562 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector->hpd = *hpd; hpd 1691 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector->hpd.hpd = AMDGPU_HPD_NONE; hpd 1716 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector->hpd.hpd = AMDGPU_HPD_NONE; hpd 1923 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (amdgpu_connector->hpd.hpd == AMDGPU_HPD_NONE) { hpd 39 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.h struct amdgpu_hpd *hpd, hpd 381 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (amdgpu_connector->hpd.hpd != AMDGPU_HPD_NONE) hpd 382 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c DRM_INFO(" %s\n", hpd_names[amdgpu_connector->hpd.hpd]); hpd 341 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c u32 *hpd; hpd 346 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c &kiq->eop_gpu_addr, (void **)&hpd); hpd 352 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c memset(hpd, 0, hpd_size); hpd 147 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h enum amdgpu_hpd_id hpd; hpd 275 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h bool (*hpd_sense)(struct amdgpu_device *adev, enum amdgpu_hpd_id hpd); hpd 277 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h enum amdgpu_hpd_id hpd); hpd 295 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h struct amdgpu_hpd *hpd, hpd 487 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h enum amdgpu_hpd_id hpd; hpd 547 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h struct amdgpu_hpd hpd; hpd 83 drivers/gpu/drm/amd/amdgpu/atombios_dp.c args.v2.ucHPD_ID = chan->rec.hpd; hpd 191 drivers/gpu/drm/amd/amdgpu/atombios_dp.c amdgpu_connector->ddc_bus->rec.hpd = amdgpu_connector->hpd.hpd; hpd 594 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c hpd_id = amdgpu_connector->hpd.hpd; hpd 795 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c hpd_id = amdgpu_connector->hpd.hpd; hpd 1207 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) hpd 88 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c uint32_t hpd; hpd 94 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c .hpd = DISP_INTERRUPT_STATUS__DC_HPD1_INTERRUPT_MASK hpd 99 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE__DC_HPD2_INTERRUPT_MASK hpd 104 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE2__DC_HPD3_INTERRUPT_MASK hpd 109 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE3__DC_HPD4_INTERRUPT_MASK hpd 114 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK hpd 119 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE5__DC_HPD6_INTERRUPT_MASK hpd 282 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c enum amdgpu_hpd_id hpd) hpd 286 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (hpd >= adev->mode_info.num_hpd) hpd 289 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (RREG32(mmDC_HPD_INT_STATUS + hpd_offsets[hpd]) & hpd 305 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c enum amdgpu_hpd_id hpd) hpd 308 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c bool connected = dce_v10_0_hpd_sense(adev, hpd); hpd 310 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (hpd >= adev->mode_info.num_hpd) hpd 313 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); hpd 318 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); hpd 338 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) hpd 348 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]); hpd 350 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp); hpd 354 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmDC_HPD_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]); hpd 356 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmDC_HPD_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp); hpd 358 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmDC_HPD_TOGGLE_FILT_CNTL + hpd_offsets[amdgpu_connector->hpd.hpd]); hpd 365 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmDC_HPD_TOGGLE_FILT_CNTL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp); hpd 367 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); hpd 369 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_connector->hpd.hpd); hpd 390 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) hpd 393 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmDC_HPD_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]); hpd 395 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmDC_HPD_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp); hpd 398 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_connector->hpd.hpd); hpd 3012 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c unsigned hpd, hpd 3017 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (hpd >= adev->mode_info.num_hpd) { hpd 3018 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c DRM_DEBUG("invalid hdp %d\n", hpd); hpd 3024 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); hpd 3026 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); hpd 3029 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); hpd 3031 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); hpd 3165 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c int hpd) hpd 3169 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (hpd >= adev->mode_info.num_hpd) { hpd 3170 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c DRM_DEBUG("invalid hdp %d\n", hpd); hpd 3174 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); hpd 3176 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); hpd 3252 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c unsigned hpd; hpd 3259 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c hpd = entry->src_data[0]; hpd 3260 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c disp_int = RREG32(interrupt_status_offsets[hpd].reg); hpd 3261 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c mask = interrupt_status_offsets[hpd].hpd; hpd 3264 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_hpd_int_ack(adev, hpd); hpd 3266 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c DRM_DEBUG("IH: HPD%d\n", hpd + 1); hpd 90 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c uint32_t hpd; hpd 96 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c .hpd = DISP_INTERRUPT_STATUS__DC_HPD1_INTERRUPT_MASK hpd 101 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE__DC_HPD2_INTERRUPT_MASK hpd 106 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE2__DC_HPD3_INTERRUPT_MASK hpd 111 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE3__DC_HPD4_INTERRUPT_MASK hpd 116 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK hpd 121 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE5__DC_HPD6_INTERRUPT_MASK hpd 300 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c enum amdgpu_hpd_id hpd) hpd 304 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (hpd >= adev->mode_info.num_hpd) hpd 307 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (RREG32(mmDC_HPD_INT_STATUS + hpd_offsets[hpd]) & hpd 323 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c enum amdgpu_hpd_id hpd) hpd 326 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c bool connected = dce_v11_0_hpd_sense(adev, hpd); hpd 328 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (hpd >= adev->mode_info.num_hpd) hpd 331 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); hpd 336 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); hpd 356 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) hpd 366 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]); hpd 368 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp); hpd 372 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmDC_HPD_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]); hpd 374 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmDC_HPD_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp); hpd 376 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmDC_HPD_TOGGLE_FILT_CNTL + hpd_offsets[amdgpu_connector->hpd.hpd]); hpd 383 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmDC_HPD_TOGGLE_FILT_CNTL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp); hpd 385 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); hpd 386 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_irq_get(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); hpd 407 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) hpd 410 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmDC_HPD_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]); hpd 412 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmDC_HPD_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp); hpd 414 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_irq_put(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); hpd 3138 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c unsigned hpd, hpd 3143 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (hpd >= adev->mode_info.num_hpd) { hpd 3144 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c DRM_DEBUG("invalid hdp %d\n", hpd); hpd 3150 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); hpd 3152 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); hpd 3155 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); hpd 3157 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); hpd 3291 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c int hpd) hpd 3295 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (hpd >= adev->mode_info.num_hpd) { hpd 3296 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c DRM_DEBUG("invalid hdp %d\n", hpd); hpd 3300 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); hpd 3302 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); hpd 3379 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c unsigned hpd; hpd 3386 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c hpd = entry->src_data[0]; hpd 3387 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c disp_int = RREG32(interrupt_status_offsets[hpd].reg); hpd 3388 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c mask = interrupt_status_offsets[hpd].hpd; hpd 3391 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_hpd_int_ack(adev, hpd); hpd 3393 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c DRM_DEBUG("IH: HPD%d\n", hpd + 1); hpd 91 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c uint32_t hpd; hpd 97 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c .hpd = DISP_INTERRUPT_STATUS__DC_HPD1_INTERRUPT_MASK hpd 102 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE__DC_HPD2_INTERRUPT_MASK hpd 107 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE2__DC_HPD3_INTERRUPT_MASK hpd 112 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE3__DC_HPD4_INTERRUPT_MASK hpd 117 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK hpd 122 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE5__DC_HPD6_INTERRUPT_MASK hpd 234 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c enum amdgpu_hpd_id hpd) hpd 238 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (hpd >= adev->mode_info.num_hpd) hpd 241 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (RREG32(mmDC_HPD1_INT_STATUS + hpd_offsets[hpd]) & DC_HPD1_INT_STATUS__DC_HPD1_SENSE_MASK) hpd 256 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c enum amdgpu_hpd_id hpd) hpd 259 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c bool connected = dce_v6_0_hpd_sense(adev, hpd); hpd 261 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (hpd >= adev->mode_info.num_hpd) hpd 264 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c tmp = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd]); hpd 269 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp); hpd 289 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) hpd 292 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c tmp = RREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]); hpd 294 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp); hpd 303 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c tmp = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]); hpd 305 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp); hpd 309 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); hpd 310 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_irq_get(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); hpd 332 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) hpd 335 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c tmp = RREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]); hpd 337 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], 0); hpd 339 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_irq_put(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); hpd 3046 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c unsigned hpd; hpd 3053 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c hpd = entry->src_data[0]; hpd 3054 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c disp_int = RREG32(interrupt_status_offsets[hpd].reg); hpd 3055 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c mask = interrupt_status_offsets[hpd].hpd; hpd 3058 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c tmp = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd]); hpd 3060 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp); hpd 3062 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c DRM_DEBUG("IH: HPD%d\n", hpd + 1); hpd 88 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c uint32_t hpd; hpd 94 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c .hpd = DISP_INTERRUPT_STATUS__DC_HPD1_INTERRUPT_MASK hpd 99 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE__DC_HPD2_INTERRUPT_MASK hpd 104 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE2__DC_HPD3_INTERRUPT_MASK hpd 109 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE3__DC_HPD4_INTERRUPT_MASK hpd 114 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK hpd 119 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c .hpd = DISP_INTERRUPT_STATUS_CONTINUE5__DC_HPD6_INTERRUPT_MASK hpd 227 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c enum amdgpu_hpd_id hpd) hpd 231 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (hpd >= adev->mode_info.num_hpd) hpd 234 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (RREG32(mmDC_HPD1_INT_STATUS + hpd_offsets[hpd]) & hpd 250 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c enum amdgpu_hpd_id hpd) hpd 253 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c bool connected = dce_v8_0_hpd_sense(adev, hpd); hpd 255 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (hpd >= adev->mode_info.num_hpd) hpd 258 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c tmp = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd]); hpd 263 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp); hpd 283 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) hpd 286 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c tmp = RREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]); hpd 288 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp); hpd 297 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c tmp = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]); hpd 299 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp); hpd 303 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); hpd 304 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_irq_get(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); hpd 325 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) hpd 328 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c tmp = RREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]); hpd 330 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], 0); hpd 332 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_irq_put(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); hpd 3138 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c unsigned hpd; hpd 3145 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c hpd = entry->src_data[0]; hpd 3146 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c disp_int = RREG32(interrupt_status_offsets[hpd].reg); hpd 3147 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c mask = interrupt_status_offsets[hpd].hpd; hpd 3150 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c tmp = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd]); hpd 3152 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp); hpd 3154 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c DRM_DEBUG("IH: HPD%d\n", hpd + 1); hpd 75 drivers/gpu/drm/amd/amdgpu/dce_virtual.c enum amdgpu_hpd_id hpd) hpd 81 drivers/gpu/drm/amd/amdgpu/dce_virtual.c enum amdgpu_hpd_id hpd) hpd 1053 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c u32 *hpd; hpd 1071 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (void **)&hpd); hpd 1078 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c memset(hpd, 0, adev->gfx.mec.hpd_eop_obj->tbo.mem.size); hpd 2803 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c u32 *hpd; hpd 2819 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (void **)&hpd); hpd 2827 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c memset(hpd, 0, mec_hpd_size); hpd 1365 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c u32 *hpd; hpd 1379 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (void **)&hpd); hpd 1385 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c memset(hpd, 0, mec_hpd_size); hpd 1720 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c u32 *hpd; hpd 1738 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (void **)&hpd); hpd 1745 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c memset(hpd, 0, adev->gfx.mec.hpd_eop_obj->tbo.mem.size); hpd 5049 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c aconnector->hpd.hpd = AMDGPU_HPD_NONE; /* not used */ hpd 254 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h struct amdgpu_hpd hpd; hpd 142 drivers/gpu/drm/amd/display/dc/core/dc_link.c struct gpio *hpd; hpd 178 drivers/gpu/drm/amd/display/dc/core/dc_link.c hpd = get_hpd_gpio(link->ctx->dc_bios, link->link_id, link->ctx->gpio_service); hpd 180 drivers/gpu/drm/amd/display/dc/core/dc_link.c if (!hpd) hpd 184 drivers/gpu/drm/amd/display/dc/core/dc_link.c if (dal_gpio_open(hpd, GPIO_MODE_INTERRUPT) == GPIO_RESULT_OK) { hpd 190 drivers/gpu/drm/amd/display/dc/core/dc_link.c dal_irq_setup_hpd_filter(hpd, &config); hpd 192 drivers/gpu/drm/amd/display/dc/core/dc_link.c dal_gpio_close(hpd); hpd 200 drivers/gpu/drm/amd/display/dc/core/dc_link.c dal_gpio_destroy_irq(&hpd); hpd 1065 drivers/gpu/drm/amd/display/dc/core/dc_link.c struct gpio *hpd; hpd 1068 drivers/gpu/drm/amd/display/dc/core/dc_link.c hpd = get_hpd_gpio(link->ctx->dc_bios, link->link_id, link->ctx->gpio_service); hpd 1070 drivers/gpu/drm/amd/display/dc/core/dc_link.c if (hpd) { hpd 1071 drivers/gpu/drm/amd/display/dc/core/dc_link.c switch (dal_irq_get_source(hpd)) { hpd 1095 drivers/gpu/drm/amd/display/dc/core/dc_link.c dal_gpio_destroy_irq(&hpd); hpd 2882 drivers/gpu/drm/amd/display/dc/core/dc_link.c struct gpio *hpd; hpd 2890 drivers/gpu/drm/amd/display/dc/core/dc_link.c hpd = get_hpd_gpio(link->ctx->dc_bios, link->link_id, link->ctx->gpio_service); hpd 2892 drivers/gpu/drm/amd/display/dc/core/dc_link.c if (!hpd) hpd 2896 drivers/gpu/drm/amd/display/dc/core/dc_link.c if (dal_gpio_open(hpd, GPIO_MODE_INTERRUPT) == GPIO_RESULT_OK) { hpd 2902 drivers/gpu/drm/amd/display/dc/core/dc_link.c dal_irq_setup_hpd_filter(hpd, &config); hpd 2904 drivers/gpu/drm/amd/display/dc/core/dc_link.c dal_gpio_close(hpd); hpd 2909 drivers/gpu/drm/amd/display/dc/core/dc_link.c dal_gpio_destroy_irq(&hpd); hpd 740 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c struct gpio *hpd; hpd 766 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c hpd = get_hpd_gpio(ctx->dc_bios, connector, ctx->gpio_service); hpd 768 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c if (!hpd) { hpd 773 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c dal_gpio_open(hpd, GPIO_MODE_INTERRUPT); hpd 780 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c dal_gpio_get_value(hpd, &detected); hpd 792 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c dal_gpio_close(hpd); hpd 794 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c dal_gpio_destroy_irq(&hpd); hpd 143 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c struct hw_hpd *hpd = HW_HPD_FROM_BASE(pin); hpd 145 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c hpd->regs = &hpd_regs[en]; hpd 146 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c hpd->shifts = &hpd_shift; hpd 147 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c hpd->masks = &hpd_mask; hpd 148 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c hpd->base.regs = &hpd_regs[en].gpio; hpd 156 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c struct hw_hpd *hpd = HW_HPD_FROM_BASE(pin); hpd 158 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c hpd->regs = &hpd_regs[en]; hpd 159 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c hpd->shifts = &hpd_shift; hpd 160 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c hpd->masks = &hpd_mask; hpd 161 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c hpd->base.regs = &hpd_regs[en].gpio; hpd 143 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c struct hw_hpd *hpd = HW_HPD_FROM_BASE(pin); hpd 145 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c hpd->regs = &hpd_regs[en]; hpd 146 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c hpd->shifts = &hpd_shift; hpd 147 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c hpd->masks = &hpd_mask; hpd 148 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c hpd->base.regs = &hpd_regs[en].gpio; hpd 188 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c struct hw_hpd *hpd = HW_HPD_FROM_BASE(pin); hpd 190 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c hpd->regs = &hpd_regs[en]; hpd 191 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c hpd->shifts = &hpd_shift; hpd 192 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c hpd->masks = &hpd_mask; hpd 193 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c hpd->base.regs = &hpd_regs[en].gpio; hpd 195 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c struct hw_hpd *hpd = HW_HPD_FROM_BASE(pin); hpd 197 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c hpd->regs = &hpd_regs[en]; hpd 198 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c hpd->shifts = &hpd_shift; hpd 199 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c hpd->masks = &hpd_mask; hpd 200 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c hpd->base.regs = &hpd_regs[en].gpio; hpd 197 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c struct hw_hpd *hpd = HW_HPD_FROM_BASE(pin); hpd 199 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c hpd->regs = &hpd_regs[en]; hpd 200 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c hpd->shifts = &hpd_shift; hpd 201 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c hpd->masks = &hpd_mask; hpd 202 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c hpd->base.regs = &hpd_regs[en].gpio; hpd 245 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c return gpio->hw_container.hpd; hpd 301 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c gpio->service->factory.funcs->init_hpd(&gpio->hw_container.hpd, service->ctx, id, en); hpd 341 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c kfree((*gpio)->hw_container.hpd); hpd 342 drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c (*gpio)->hw_container.hpd = NULL; hpd 418 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c config_data.config.hpd = *config; hpd 40 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c hpd->shifts->field_name, hpd->masks->field_name hpd 43 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c hpd->base.base.ctx hpd 45 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c (hpd->regs->reg) hpd 66 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c struct hw_hpd *hpd) hpd 68 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c dal_hw_hpd_destruct(hpd); hpd 74 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c struct hw_hpd *hpd = HW_HPD_FROM_BASE(*ptr); hpd 76 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c destruct(hpd); hpd 78 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c kfree(hpd); hpd 87 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c struct hw_hpd *hpd = HW_HPD_FROM_BASE(ptr); hpd 110 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c struct hw_hpd *hpd = HW_HPD_FROM_BASE(ptr); hpd 116 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c DC_HPD_CONNECT_INT_DELAY, config_data->config.hpd.delay_on_connect / 10, hpd 117 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c DC_HPD_DISCONNECT_INT_DELAY, config_data->config.hpd.delay_on_disconnect / 10); hpd 133 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c struct hw_hpd *hpd, hpd 138 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c dal_hw_hpd_construct(hpd, id, en, ctx); hpd 139 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c hpd->base.base.funcs = &funcs; hpd 35 drivers/gpu/drm/amd/display/dc/inc/hw/gpio.h struct hw_hpd *hpd; hpd 326 drivers/gpu/drm/amd/display/include/gpio_types.h struct gpio_hpd_config hpd; hpd 634 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c bool hpd; hpd 646 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c hpd = adv7511_hpd(adv7511); hpd 652 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c if (status == connector_status_connected && hpd && adv7511->powered) { hpd 2386 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense) hpd 2404 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c if (hpd) hpd 30 drivers/gpu/drm/bridge/ti-tfp410.c struct gpio_desc *hpd; hpd 94 drivers/gpu/drm/bridge/ti-tfp410.c if (dvi->hpd) { hpd 95 drivers/gpu/drm/bridge/ti-tfp410.c if (gpiod_get_value_cansleep(dvi->hpd)) hpd 287 drivers/gpu/drm/bridge/ti-tfp410.c dvi->hpd = fwnode_get_named_gpiod(&connector_node->fwnode, hpd 289 drivers/gpu/drm/bridge/ti-tfp410.c if (IS_ERR(dvi->hpd)) { hpd 290 drivers/gpu/drm/bridge/ti-tfp410.c ret = PTR_ERR(dvi->hpd); hpd 291 drivers/gpu/drm/bridge/ti-tfp410.c dvi->hpd = NULL; hpd 350 drivers/gpu/drm/bridge/ti-tfp410.c if (dvi->hpd) hpd 351 drivers/gpu/drm/bridge/ti-tfp410.c dvi->hpd_irq = gpiod_to_irq(dvi->hpd); hpd 373 drivers/gpu/drm/bridge/ti-tfp410.c if (dvi->hpd) hpd 374 drivers/gpu/drm/bridge/ti-tfp410.c gpiod_put(dvi->hpd); hpd 389 drivers/gpu/drm/bridge/ti-tfp410.c if (dvi->hpd) hpd 390 drivers/gpu/drm/bridge/ti-tfp410.c gpiod_put(dvi->hpd); hpd 155 drivers/gpu/drm/i915/display/intel_hotplug.c struct i915_hotplug *hpd = &dev_priv->hotplug; hpd 156 drivers/gpu/drm/i915/display/intel_hotplug.c unsigned long start = hpd->stats[pin].last_jiffies; hpd 159 drivers/gpu/drm/i915/display/intel_hotplug.c const int threshold = hpd->hpd_storm_threshold; hpd 167 drivers/gpu/drm/i915/display/intel_hotplug.c hpd->stats[pin].last_jiffies = jiffies; hpd 168 drivers/gpu/drm/i915/display/intel_hotplug.c hpd->stats[pin].count = 0; hpd 171 drivers/gpu/drm/i915/display/intel_hotplug.c hpd->stats[pin].count += increment; hpd 172 drivers/gpu/drm/i915/display/intel_hotplug.c if (hpd->stats[pin].count > threshold) { hpd 173 drivers/gpu/drm/i915/display/intel_hotplug.c hpd->stats[pin].state = HPD_MARK_DISABLED; hpd 178 drivers/gpu/drm/i915/display/intel_hotplug.c hpd->stats[pin].count); hpd 1538 drivers/gpu/drm/i915/i915_irq.c const u32 hpd[HPD_NUM_PINS], hpd 1546 drivers/gpu/drm/i915/i915_irq.c if ((hpd[pin] & hotplug_trigger) == 0) hpd 2107 drivers/gpu/drm/i915/i915_irq.c const u32 hpd[HPD_NUM_PINS]) hpd 2131 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg, hpd, hpd 2380 drivers/gpu/drm/i915/i915_irq.c const u32 hpd[HPD_NUM_PINS]) hpd 2388 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg, hpd, hpd 2558 drivers/gpu/drm/i915/i915_irq.c const u32 hpd[HPD_NUM_PINS]) hpd 2566 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg, hpd, hpd 2578 drivers/gpu/drm/i915/i915_irq.c const u32 *hpd; hpd 2582 drivers/gpu/drm/i915/i915_irq.c hpd = hpd_gen12; hpd 2585 drivers/gpu/drm/i915/i915_irq.c hpd = hpd_gen11; hpd 2595 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg, hpd, long_pulse_detect); hpd 2605 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg, hpd, long_pulse_detect); hpd 3363 drivers/gpu/drm/i915/i915_irq.c const u32 hpd[HPD_NUM_PINS]) hpd 3370 drivers/gpu/drm/i915/i915_irq.c enabled_irqs |= hpd[encoder->hpd_pin]; hpd 3494 drivers/gpu/drm/i915/i915_irq.c const u32 *hpd; hpd 3497 drivers/gpu/drm/i915/i915_irq.c hpd = INTEL_GEN(dev_priv) >= 12 ? hpd_gen12 : hpd_gen11; hpd 3498 drivers/gpu/drm/i915/i915_irq.c enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd); hpd 53 drivers/gpu/drm/mediatek/mtk_cec.c bool hpd; hpd 54 drivers/gpu/drm/mediatek/mtk_cec.c void (*hpd_event)(bool hpd, struct device *dev); hpd 91 drivers/gpu/drm/mediatek/mtk_cec.c void (*hpd_event)(bool hpd, struct device *dev), hpd 148 drivers/gpu/drm/mediatek/mtk_cec.c static void mtk_cec_hpd_event(struct mtk_cec *cec, bool hpd) hpd 150 drivers/gpu/drm/mediatek/mtk_cec.c void (*hpd_event)(bool hpd, struct device *dev); hpd 160 drivers/gpu/drm/mediatek/mtk_cec.c hpd_event(hpd, hdmi_dev); hpd 167 drivers/gpu/drm/mediatek/mtk_cec.c bool hpd; hpd 170 drivers/gpu/drm/mediatek/mtk_cec.c hpd = mtk_cec_hpd_high(dev); hpd 172 drivers/gpu/drm/mediatek/mtk_cec.c if (cec->hpd != hpd) { hpd 174 drivers/gpu/drm/mediatek/mtk_cec.c cec->hpd, hpd); hpd 175 drivers/gpu/drm/mediatek/mtk_cec.c cec->hpd = hpd; hpd 176 drivers/gpu/drm/mediatek/mtk_cec.c mtk_cec_hpd_event(cec, hpd); hpd 14 drivers/gpu/drm/mediatek/mtk_cec.h void (*hotplug_event)(bool hpd, struct device *dev), hpd 1285 drivers/gpu/drm/mediatek/mtk_hdmi.c static void mtk_hdmi_hpd_event(bool hpd, struct device *dev) hpd 17 drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h struct nvkm_event hpd; hpd 37 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/conn.h u8 hpd; hpd 413 drivers/gpu/drm/nouveau/nouveau_connector.c nvif_notify_fini(&nv_connector->hpd); hpd 1141 drivers/gpu/drm/nouveau/nouveau_connector.c container_of(notify, typeof(*nv_connector), hpd); hpd 1446 drivers/gpu/drm/nouveau/nouveau_connector.c &nv_connector->hpd); hpd 108 drivers/gpu/drm/nouveau/nouveau_connector.h struct nvif_notify hpd; hpd 423 drivers/gpu/drm/nouveau/nouveau_display.c nvif_notify_get(&conn->hpd); hpd 449 drivers/gpu/drm/nouveau/nouveau_display.c nvif_notify_put(&conn->hpd); hpd 102 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c container_of(notify->event, typeof(*disp), hpd); hpd 113 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c if (ret = -ENODEV, outp->conn->hpd.event) { hpd 140 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c *event = &disp->hpd; hpd 281 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c u8 hpd = 0, ver, hdr; hpd 330 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c hpd = max(hpd, (u8)(dcbE.connector + 1)); hpd 393 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c ret = nvkm_event_init(&nvkm_disp_hpd_func, 3, hpd, &disp->hpd); hpd 435 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c nvkm_event_fini(&disp->hpd); hpd 35 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c struct nvkm_conn *conn = container_of(notify, typeof(*conn), hpd); hpd 44 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c if (!nvkm_gpio_get(gpio, 0, DCB_GPIO_UNUSED, conn->hpd.index)) hpd 50 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c nvkm_event_send(&disp->hpd, rep.mask, index, &rep, sizeof(rep)); hpd 57 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c nvkm_notify_put(&conn->hpd); hpd 63 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c nvkm_notify_get(&conn->hpd); hpd 71 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c nvkm_notify_fini(&conn->hpd); hpd 81 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c static const u8 hpd[] = { 0x07, 0x08, 0x51, 0x52, 0x5e, 0x5f, 0x60 }; hpd 91 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c info->type, info->location, info->hpd, info->dp, hpd 94 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c if ((info->hpd = ffs(info->hpd))) { hpd 95 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c if (--info->hpd >= ARRAY_SIZE(hpd)) { hpd 96 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c CONN_ERR(conn, "hpd %02x unknown", info->hpd); hpd 99 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c info->hpd = hpd[info->hpd]; hpd 101 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c ret = nvkm_gpio_find(gpio, 0, info->hpd, DCB_GPIO_UNUSED, &func); hpd 104 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c info->hpd, ret); hpd 115 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c &conn->hpd); hpd 117 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c CONN_ERR(conn, "func %02x failed, %d", info->hpd, ret); hpd 119 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.c CONN_DBG(conn, "func %02x (HPD)", info->hpd); hpd 15 drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.h struct nvkm_notify hpd; hpd 539 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c struct nvkm_dp *dp = container_of(notify, typeof(*dp), hpd); hpd 558 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c nvkm_event_send(&disp->hpd, rep.mask, conn->index, &rep, sizeof(rep)); hpd 566 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c nvkm_notify_put(&dp->hpd); hpd 576 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c nvkm_notify_put(&dp->outp.conn->hpd); hpd 605 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c nvkm_notify_get(&dp->hpd); hpd 612 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c nvkm_notify_fini(&dp->hpd); hpd 668 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c &dp->hpd); hpd 22 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.h struct nvkm_notify hpd; hpd 89 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h void (*hpd)(struct nvkm_ior *, int head, bool present); hpd 151 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c if (!ior->func->hda.hpd) hpd 157 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c ior->func->hda.hpd(ior, hidx, true); hpd 162 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c ior->func->hda.hpd(ior, hidx, false); hpd 178 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c .hpd = gf119_hda_hpd, hpd 44 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgk104.c .hpd = gf119_hda_hpd, hpd 58 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c .hpd = gf119_hda_hpd, hpd 116 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c .hpd = gf119_hda_hpd, hpd 60 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgt215.c .hpd = gt215_hda_hpd, hpd 104 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgv100.c .hpd = gf119_hda_hpd, hpd 44 drivers/gpu/drm/nouveau/nvkm/engine/disp/sormcp89.c .hpd = gt215_hda_hpd, hpd 89 drivers/gpu/drm/nouveau/nvkm/engine/disp/sortu102.c .hpd = gf119_hda_hpd, hpd 82 drivers/gpu/drm/nouveau/nvkm/subdev/bios/conn.c info->hpd = (nvbios_rd08(bios, data + 0x01) & 0x30) >> 4; hpd 86 drivers/gpu/drm/nouveau/nvkm/subdev/bios/conn.c info->hpd |= (nvbios_rd08(bios, data + 0x02) & 0x03) << 2; hpd 89 drivers/gpu/drm/nouveau/nvkm/subdev/bios/conn.c info->hpd |= (nvbios_rd08(bios, data + 0x03) & 0x07) << 4; hpd 23 drivers/gpu/drm/omapdrm/omap_connector.c struct omap_dss_device *hpd; hpd 71 drivers/gpu/drm/omapdrm/omap_connector.c struct omap_dss_device *hpd = omap_connector->hpd; hpd 73 drivers/gpu/drm/omapdrm/omap_connector.c if (hpd) hpd 74 drivers/gpu/drm/omapdrm/omap_connector.c hpd->ops->register_hpd_cb(hpd, omap_connector_hpd_cb, hpd 81 drivers/gpu/drm/omapdrm/omap_connector.c struct omap_dss_device *hpd = omap_connector->hpd; hpd 83 drivers/gpu/drm/omapdrm/omap_connector.c if (hpd) hpd 84 drivers/gpu/drm/omapdrm/omap_connector.c hpd->ops->unregister_hpd_cb(hpd); hpd 149 drivers/gpu/drm/omapdrm/omap_connector.c if (omap_connector->hpd) { hpd 150 drivers/gpu/drm/omapdrm/omap_connector.c struct omap_dss_device *hpd = omap_connector->hpd; hpd 152 drivers/gpu/drm/omapdrm/omap_connector.c hpd->ops->unregister_hpd_cb(hpd); hpd 153 drivers/gpu/drm/omapdrm/omap_connector.c omapdss_device_put(hpd); hpd 154 drivers/gpu/drm/omapdrm/omap_connector.c omap_connector->hpd = NULL; hpd 362 drivers/gpu/drm/omapdrm/omap_connector.c omap_connector->hpd = omapdss_device_get(dssdev); hpd 113 drivers/gpu/drm/radeon/atombios_dp.c args.v2.ucHPD_ID = chan->rec.hpd; hpd 233 drivers/gpu/drm/radeon/atombios_dp.c radeon_connector->ddc_bus->rec.hpd = radeon_connector->hpd.hpd; hpd 867 drivers/gpu/drm/radeon/atombios_encoders.c hpd_id = radeon_connector->hpd.hpd; hpd 1049 drivers/gpu/drm/radeon/atombios_encoders.c hpd_id = radeon_connector->hpd.hpd; hpd 1422 drivers/gpu/drm/radeon/atombios_encoders.c if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) hpd 4393 drivers/gpu/drm/radeon/cik.c u32 *hpd; hpd 4430 drivers/gpu/drm/radeon/cik.c r = radeon_bo_kmap(rdev->mec.hpd_eop_obj, (void **)&hpd); hpd 4438 drivers/gpu/drm/radeon/cik.c memset(hpd, 0, rdev->mec.num_mec *rdev->mec.num_pipe * MEC_HPD_SIZE * 2); hpd 7207 drivers/gpu/drm/radeon/cik.c if (rdev->irq.hpd[0]) { hpd 7211 drivers/gpu/drm/radeon/cik.c if (rdev->irq.hpd[1]) { hpd 7215 drivers/gpu/drm/radeon/cik.c if (rdev->irq.hpd[2]) { hpd 7219 drivers/gpu/drm/radeon/cik.c if (rdev->irq.hpd[3]) { hpd 7223 drivers/gpu/drm/radeon/cik.c if (rdev->irq.hpd[4]) { hpd 7227 drivers/gpu/drm/radeon/cik.c if (rdev->irq.hpd[5]) { hpd 1723 drivers/gpu/drm/radeon/evergreen.c bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd) hpd 1725 drivers/gpu/drm/radeon/evergreen.c if (hpd == RADEON_HPD_NONE) hpd 1728 drivers/gpu/drm/radeon/evergreen.c return !!(RREG32(DC_HPDx_INT_STATUS_REG(hpd)) & DC_HPDx_SENSE); hpd 1740 drivers/gpu/drm/radeon/evergreen.c enum radeon_hpd_id hpd) hpd 1742 drivers/gpu/drm/radeon/evergreen.c bool connected = evergreen_hpd_sense(rdev, hpd); hpd 1744 drivers/gpu/drm/radeon/evergreen.c if (hpd == RADEON_HPD_NONE) hpd 1748 drivers/gpu/drm/radeon/evergreen.c WREG32_AND(DC_HPDx_INT_CONTROL(hpd), ~DC_HPDx_INT_POLARITY); hpd 1750 drivers/gpu/drm/radeon/evergreen.c WREG32_OR(DC_HPDx_INT_CONTROL(hpd), DC_HPDx_INT_POLARITY); hpd 1770 drivers/gpu/drm/radeon/evergreen.c enum radeon_hpd_id hpd = hpd 1771 drivers/gpu/drm/radeon/evergreen.c to_radeon_connector(connector)->hpd.hpd; hpd 1783 drivers/gpu/drm/radeon/evergreen.c if (hpd == RADEON_HPD_NONE) hpd 1786 drivers/gpu/drm/radeon/evergreen.c WREG32(DC_HPDx_CONTROL(hpd), tmp); hpd 1787 drivers/gpu/drm/radeon/evergreen.c enabled |= 1 << hpd; hpd 1789 drivers/gpu/drm/radeon/evergreen.c radeon_hpd_set_polarity(rdev, hpd); hpd 1809 drivers/gpu/drm/radeon/evergreen.c enum radeon_hpd_id hpd = hpd 1810 drivers/gpu/drm/radeon/evergreen.c to_radeon_connector(connector)->hpd.hpd; hpd 1812 drivers/gpu/drm/radeon/evergreen.c if (hpd == RADEON_HPD_NONE) hpd 1815 drivers/gpu/drm/radeon/evergreen.c WREG32(DC_HPDx_CONTROL(hpd), 0); hpd 1816 drivers/gpu/drm/radeon/evergreen.c disabled |= 1 << hpd; hpd 4590 drivers/gpu/drm/radeon/evergreen.c rdev->irq.hpd[i], "HPD", i); hpd 530 drivers/gpu/drm/radeon/r100.c bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd) hpd 534 drivers/gpu/drm/radeon/r100.c switch (hpd) { hpd 558 drivers/gpu/drm/radeon/r100.c enum radeon_hpd_id hpd) hpd 561 drivers/gpu/drm/radeon/r100.c bool connected = r100_hpd_sense(rdev, hpd); hpd 563 drivers/gpu/drm/radeon/r100.c switch (hpd) { hpd 601 drivers/gpu/drm/radeon/r100.c if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) hpd 602 drivers/gpu/drm/radeon/r100.c enable |= 1 << radeon_connector->hpd.hpd; hpd 603 drivers/gpu/drm/radeon/r100.c radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); hpd 624 drivers/gpu/drm/radeon/r100.c if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) hpd 625 drivers/gpu/drm/radeon/r100.c disable |= 1 << radeon_connector->hpd.hpd; hpd 732 drivers/gpu/drm/radeon/r100.c if (rdev->irq.hpd[0]) { hpd 735 drivers/gpu/drm/radeon/r100.c if (rdev->irq.hpd[1]) { hpd 804 drivers/gpu/drm/radeon/r600.c bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd) hpd 809 drivers/gpu/drm/radeon/r600.c switch (hpd) { hpd 839 drivers/gpu/drm/radeon/r600.c switch (hpd) { hpd 860 drivers/gpu/drm/radeon/r600.c enum radeon_hpd_id hpd) hpd 863 drivers/gpu/drm/radeon/r600.c bool connected = r600_hpd_sense(rdev, hpd); hpd 866 drivers/gpu/drm/radeon/r600.c switch (hpd) { hpd 920 drivers/gpu/drm/radeon/r600.c switch (hpd) { hpd 973 drivers/gpu/drm/radeon/r600.c switch (radeon_connector->hpd.hpd) { hpd 997 drivers/gpu/drm/radeon/r600.c switch (radeon_connector->hpd.hpd) { hpd 1011 drivers/gpu/drm/radeon/r600.c if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) hpd 1012 drivers/gpu/drm/radeon/r600.c enable |= 1 << radeon_connector->hpd.hpd; hpd 1013 drivers/gpu/drm/radeon/r600.c radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); hpd 1027 drivers/gpu/drm/radeon/r600.c switch (radeon_connector->hpd.hpd) { hpd 1051 drivers/gpu/drm/radeon/r600.c switch (radeon_connector->hpd.hpd) { hpd 1065 drivers/gpu/drm/radeon/r600.c if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) hpd 1066 drivers/gpu/drm/radeon/r600.c disable |= 1 << radeon_connector->hpd.hpd; hpd 3843 drivers/gpu/drm/radeon/r600.c if (rdev->irq.hpd[0]) { hpd 3847 drivers/gpu/drm/radeon/r600.c if (rdev->irq.hpd[1]) { hpd 3851 drivers/gpu/drm/radeon/r600.c if (rdev->irq.hpd[2]) { hpd 3855 drivers/gpu/drm/radeon/r600.c if (rdev->irq.hpd[3]) { hpd 3859 drivers/gpu/drm/radeon/r600.c if (rdev->irq.hpd[4]) { hpd 3863 drivers/gpu/drm/radeon/r600.c if (rdev->irq.hpd[5]) { hpd 799 drivers/gpu/drm/radeon/radeon.h bool hpd[RADEON_MAX_HPD_PINS]; hpd 1943 drivers/gpu/drm/radeon/radeon.h bool (*sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd); hpd 1944 drivers/gpu/drm/radeon/radeon.h void (*set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd); hpd 1945 drivers/gpu/drm/radeon/radeon.h } hpd; hpd 2753 drivers/gpu/drm/radeon/radeon.h #define radeon_hpd_init(rdev) (rdev)->asic->hpd.init((rdev)) hpd 2754 drivers/gpu/drm/radeon/radeon.h #define radeon_hpd_fini(rdev) (rdev)->asic->hpd.fini((rdev)) hpd 2755 drivers/gpu/drm/radeon/radeon.h #define radeon_hpd_sense(rdev, h) (rdev)->asic->hpd.sense((rdev), (h)) hpd 2756 drivers/gpu/drm/radeon/radeon.h #define radeon_hpd_set_polarity(rdev, h) (rdev)->asic->hpd.set_polarity((rdev), (h)) hpd 240 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 308 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 404 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 472 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 540 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 608 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 676 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 744 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 812 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 880 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 977 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 1063 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 1156 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 1262 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 1382 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 1476 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 1569 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 1717 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 1837 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 1975 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 2145 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 2258 drivers/gpu/drm/radeon/radeon_asic.c .hpd = { hpd 99 drivers/gpu/drm/radeon/radeon_asic.h bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); hpd 101 drivers/gpu/drm/radeon/radeon_asic.h enum radeon_hpd_id hpd); hpd 246 drivers/gpu/drm/radeon/radeon_asic.h bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); hpd 248 drivers/gpu/drm/radeon/radeon_asic.h enum radeon_hpd_id hpd); hpd 357 drivers/gpu/drm/radeon/radeon_asic.h bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); hpd 359 drivers/gpu/drm/radeon/radeon_asic.h enum radeon_hpd_id hpd); hpd 522 drivers/gpu/drm/radeon/radeon_asic.h bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); hpd 524 drivers/gpu/drm/radeon/radeon_asic.h enum radeon_hpd_id hpd); hpd 244 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_hpd hpd; hpd 247 drivers/gpu/drm/radeon/radeon_atombios.c memset(&hpd, 0, sizeof(struct radeon_hpd)); hpd 256 drivers/gpu/drm/radeon/radeon_atombios.c hpd.gpio = *gpio; hpd 260 drivers/gpu/drm/radeon/radeon_atombios.c hpd.hpd = RADEON_HPD_1; hpd 263 drivers/gpu/drm/radeon/radeon_atombios.c hpd.hpd = RADEON_HPD_2; hpd 266 drivers/gpu/drm/radeon/radeon_atombios.c hpd.hpd = RADEON_HPD_3; hpd 269 drivers/gpu/drm/radeon/radeon_atombios.c hpd.hpd = RADEON_HPD_4; hpd 272 drivers/gpu/drm/radeon/radeon_atombios.c hpd.hpd = RADEON_HPD_5; hpd 275 drivers/gpu/drm/radeon/radeon_atombios.c hpd.hpd = RADEON_HPD_6; hpd 278 drivers/gpu/drm/radeon/radeon_atombios.c hpd.hpd = RADEON_HPD_NONE; hpd 282 drivers/gpu/drm/radeon/radeon_atombios.c hpd.hpd = RADEON_HPD_NONE; hpd 283 drivers/gpu/drm/radeon/radeon_atombios.c return hpd; hpd 291 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_hpd *hpd) hpd 540 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_hpd hpd; hpd 765 drivers/gpu/drm/radeon/radeon_atombios.c hpd.hpd = RADEON_HPD_NONE; hpd 805 drivers/gpu/drm/radeon/radeon_atombios.c hpd = radeon_atom_get_hpd_info_from_gpio(rdev, &gpio); hpd 806 drivers/gpu/drm/radeon/radeon_atombios.c hpd.plugged_state = hpd_record->ucPlugged_PinState; hpd 822 drivers/gpu/drm/radeon/radeon_atombios.c ddc_bus.hpd = hpd.hpd; hpd 828 drivers/gpu/drm/radeon/radeon_atombios.c &ddc_bus, &conn_id, &hpd)) hpd 838 drivers/gpu/drm/radeon/radeon_atombios.c &hpd, hpd 898 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_hpd hpd; hpd 990 drivers/gpu/drm/radeon/radeon_atombios.c bios_connectors[i].hpd.hpd = RADEON_HPD_1; hpd 993 drivers/gpu/drm/radeon/radeon_atombios.c bios_connectors[i].hpd.hpd = RADEON_HPD_2; hpd 996 drivers/gpu/drm/radeon/radeon_atombios.c bios_connectors[i].hpd.hpd = RADEON_HPD_NONE; hpd 1001 drivers/gpu/drm/radeon/radeon_atombios.c bios_connectors[i].hpd.hpd = RADEON_HPD_1; hpd 1003 drivers/gpu/drm/radeon/radeon_atombios.c bios_connectors[i].hpd.hpd = RADEON_HPD_2; hpd 1005 drivers/gpu/drm/radeon/radeon_atombios.c bios_connectors[i].hpd.hpd = RADEON_HPD_NONE; hpd 1019 drivers/gpu/drm/radeon/radeon_atombios.c &bios_connectors[i].hpd)) hpd 1068 drivers/gpu/drm/radeon/radeon_atombios.c bios_connectors[i].hpd = hpd 1069 drivers/gpu/drm/radeon/radeon_atombios.c bios_connectors[j].hpd; hpd 1093 drivers/gpu/drm/radeon/radeon_atombios.c &bios_connectors[i].hpd, hpd 635 drivers/gpu/drm/radeon/radeon_combios.c i2c.hpd = RADEON_HPD_NONE; hpd 1458 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_hpd hpd; hpd 1545 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1556 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1560 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1571 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1575 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1586 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1590 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_1; hpd 1607 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1611 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1622 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1628 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1639 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1647 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1656 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1659 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1668 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1671 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1681 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1688 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1697 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1700 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_2; /* ??? */ hpd 1717 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1720 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1730 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1737 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1746 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1749 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_1; /* ??? */ hpd 1765 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1768 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1778 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1785 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1794 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1797 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1806 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1809 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1819 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1826 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_2; /* ??? */ hpd 1843 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1846 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1856 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1863 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_1; /* ??? */ hpd 1879 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1882 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1892 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1899 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_1; /* ??? */ hpd 1908 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1911 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1920 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1923 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1933 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1940 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1949 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1952 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1961 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1964 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1974 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1981 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 1990 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 1992 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 2001 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2008 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_1; /* ??? */ hpd 2024 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2027 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_2; /* ??? */ hpd 2043 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2050 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_1; /* ??? */ hpd 2066 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2069 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_2; /* ??? */ hpd 2085 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2088 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 2098 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2105 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 2114 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2117 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_1; /* ??? */ hpd 2133 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2136 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 2146 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2149 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 2159 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2166 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_1; /* ??? */ hpd 2182 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2185 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 2194 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2197 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 2207 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2225 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_hpd *hpd) hpd 2315 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_hpd hpd; hpd 2340 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_2; hpd 2342 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_1; hpd 2345 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 2350 drivers/gpu/drm/radeon/radeon_combios.c &ddc_i2c, &hpd)) hpd 2368 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2395 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2450 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2469 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2485 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2512 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_1; hpd 2520 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2532 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 2539 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2589 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 2596 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 2607 drivers/gpu/drm/radeon/radeon_combios.c hpd.hpd = RADEON_HPD_NONE; hpd 2620 drivers/gpu/drm/radeon/radeon_combios.c &hpd); hpd 70 drivers/gpu/drm/radeon/radeon_connectors.c if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) hpd 73 drivers/gpu/drm/radeon/radeon_connectors.c radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); hpd 95 drivers/gpu/drm/radeon/radeon_connectors.c radeon_hpd_sense(rdev, radeon_connector->hpd.hpd) && hpd 1217 drivers/gpu/drm/radeon/radeon_connectors.c && radeon_connector->hpd.hpd != RADEON_HPD_NONE) { hpd 1218 drivers/gpu/drm/radeon/radeon_connectors.c if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) hpd 1335 drivers/gpu/drm/radeon/radeon_connectors.c if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { hpd 1725 drivers/gpu/drm/radeon/radeon_connectors.c if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { hpd 1864 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_hpd *hpd, hpd 1933 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->hpd = *hpd; hpd 2065 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->hpd.hpd = RADEON_HPD_NONE; hpd 2090 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->hpd.hpd = RADEON_HPD_NONE; hpd 2287 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->hpd.hpd = RADEON_HPD_NONE; hpd 2314 drivers/gpu/drm/radeon/radeon_connectors.c if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { hpd 2342 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_hpd *hpd) hpd 2377 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->hpd = *hpd; hpd 2393 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->hpd.hpd = RADEON_HPD_NONE; hpd 2410 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->hpd.hpd = RADEON_HPD_NONE; hpd 2456 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->hpd.hpd = RADEON_HPD_NONE; hpd 2477 drivers/gpu/drm/radeon/radeon_connectors.c if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { hpd 782 drivers/gpu/drm/radeon/radeon_display.c if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) hpd 783 drivers/gpu/drm/radeon/radeon_display.c DRM_INFO(" %s\n", hpd_names[radeon_connector->hpd.hpd]); hpd 107 drivers/gpu/drm/radeon/radeon_dp_auxch.c tmp |= AUX_HPD_SEL(chan->rec.hpd); hpd 30 drivers/gpu/drm/radeon/radeon_dp_mst.c enum radeon_hpd_id hpd, bool enable) hpd 49 drivers/gpu/drm/radeon/radeon_dp_mst.c reg |= NI_DIG_HPD_SELECT(hpd); hpd 450 drivers/gpu/drm/radeon/radeon_dp_mst.c radeon_connector->mst_port->hpd.hpd, true); hpd 488 drivers/gpu/drm/radeon/radeon_dp_mst.c radeon_connector->mst_port->hpd.hpd, false); hpd 134 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.hpd[i] = false; hpd 188 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.hpd[i] = false; hpd 523 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i)); hpd 546 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.hpd[i] &= !(hpd_mask & (1 << i)); hpd 117 drivers/gpu/drm/radeon/radeon_mode.h enum radeon_hpd_id hpd; hpd 507 drivers/gpu/drm/radeon/radeon_mode.h enum radeon_hpd_id hpd; hpd 560 drivers/gpu/drm/radeon/radeon_mode.h struct radeon_hpd hpd; hpd 702 drivers/gpu/drm/radeon/radeon_mode.h struct radeon_hpd *hpd, hpd 711 drivers/gpu/drm/radeon/radeon_mode.h struct radeon_hpd *hpd); hpd 353 drivers/gpu/drm/radeon/rs600.c bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd) hpd 358 drivers/gpu/drm/radeon/rs600.c switch (hpd) { hpd 376 drivers/gpu/drm/radeon/rs600.c enum radeon_hpd_id hpd) hpd 379 drivers/gpu/drm/radeon/rs600.c bool connected = rs600_hpd_sense(rdev, hpd); hpd 381 drivers/gpu/drm/radeon/rs600.c switch (hpd) { hpd 411 drivers/gpu/drm/radeon/rs600.c switch (radeon_connector->hpd.hpd) { hpd 423 drivers/gpu/drm/radeon/rs600.c if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) hpd 424 drivers/gpu/drm/radeon/rs600.c enable |= 1 << radeon_connector->hpd.hpd; hpd 425 drivers/gpu/drm/radeon/rs600.c radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); hpd 438 drivers/gpu/drm/radeon/rs600.c switch (radeon_connector->hpd.hpd) { hpd 450 drivers/gpu/drm/radeon/rs600.c if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) hpd 451 drivers/gpu/drm/radeon/rs600.c disable |= 1 << radeon_connector->hpd.hpd; hpd 691 drivers/gpu/drm/radeon/rs600.c if (rdev->irq.hpd[0]) { hpd 694 drivers/gpu/drm/radeon/rs600.c if (rdev->irq.hpd[1]) { hpd 6132 drivers/gpu/drm/radeon/si.c rdev->irq.hpd[i], "HPD", i); hpd 191 drivers/gpu/drm/sti/sti_hdmi.c hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG; hpd 1040 drivers/gpu/drm/sti/sti_hdmi.c if (hdmi->hpd) { hpd 1421 drivers/gpu/drm/sti/sti_hdmi.c hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG; hpd 86 drivers/gpu/drm/sti/sti_hdmi.h bool hpd; hpd 513 drivers/media/i2c/adv7604.c static void adv76xx_set_hpd(struct adv76xx_state *state, unsigned int hpd) hpd 518 drivers/media/i2c/adv7604.c gpiod_set_value_cansleep(state->hpd_gpio[i], hpd & BIT(i)); hpd 520 drivers/media/i2c/adv7604.c v4l2_subdev_notify(&state->sd, ADV76XX_HOTPLUG, &hpd); hpd 155 include/drm/bridge/dw_hdmi.h void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense); hpd 128 include/linux/hugetlb.h unsigned long address, hugepd_t hpd, hpd 177 include/linux/hugetlb.h #define follow_huge_pd(vma, addr, hpd, flags, pdshift) NULL hpd 5063 mm/hugetlb.c unsigned long address, hugepd_t hpd, int flags, int pdshift)