hor_total          75 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	uint16_t hor_total;
hor_total         439 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	h_total = const_ptr->hor_total;
hor_total         782 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	WREG32(RADEON_TV_HTOTAL, const_ptr->hor_total - 1);
hor_total         843 drivers/gpu/drm/radeon/radeon_legacy_tv.c 		(((const_ptr->hor_total / 8) - 1) << RADEON_CRTC_H_TOTAL_SHIFT);
hor_total         888 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	*htotal_cntl = (const_ptr->hor_total & 0x7) | RADEON_HTOT_CNTL_VGA_EN;
hor_total         908 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	*htotal2_cntl = (const_ptr->hor_total & 0x7);
hor_total        1464 drivers/video/fbdev/via/hw.c 	timing.hor_total = timing.hor_sync_end + var->left_margin + dx;
hor_total        1466 drivers/video/fbdev/via/hw.c 	timing.hor_blank_end = timing.hor_total - dx;
hor_total          22 drivers/video/fbdev/via/via_modesetting.c 	raw.hor_total = timing->hor_total / 8 - 5;
hor_total          38 drivers/video/fbdev/via/via_modesetting.c 	via_write_reg(VIACR, 0x00, raw.hor_total & 0xFF);
hor_total          66 drivers/video/fbdev/via/via_modesetting.c 	via_write_reg_mask(VIACR, 0x36, raw.hor_total >> (8 - 3) & 0x08, 0x08);
hor_total          80 drivers/video/fbdev/via/via_modesetting.c 	raw.hor_total = timing->hor_total - 1;
hor_total          93 drivers/video/fbdev/via/via_modesetting.c 	via_write_reg(VIACR, 0x50, raw.hor_total & 0xFF);
hor_total         100 drivers/video/fbdev/via/via_modesetting.c 	via_write_reg_mask(VIACR, 0x55, (raw.hor_total >> 8 & 0x0F)
hor_total          22 drivers/video/fbdev/via/via_modesetting.h 	u16 hor_total;