hmargin           157 drivers/gpu/drm/drm_modes.c 	int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
hmargin           185 drivers/gpu/drm/drm_modes.c 	hmargin = 0;
hmargin           187 drivers/gpu/drm/drm_modes.c 		hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
hmargin           188 drivers/gpu/drm/drm_modes.c 		hmargin -= hmargin % CVT_H_GRANULARITY;
hmargin           191 drivers/gpu/drm/drm_modes.c 	drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
hmargin           264 drivers/gpu/drm/i2c/ch7006_drv.c 				      priv->hmargin);
hmargin           303 drivers/gpu/drm/i2c/ch7006_drv.c 		priv->hmargin = val;
hmargin           461 drivers/gpu/drm/i2c/ch7006_drv.c 	priv->hmargin = 50;
hmargin           353 drivers/gpu/drm/i2c/ch7006_mode.c 			   * priv->hmargin * mode->vtotal) / norm->vtotal / 100 / 4;
hmargin            90 drivers/gpu/drm/i2c/ch7006_priv.h 	int hmargin;
hmargin           551 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	int overscan, hmargin, vmargin, hratio, vratio;
hmargin           559 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	hmargin = (output_mode->hdisplay - crtc_mode->hdisplay) / 2;
hmargin           562 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	hmargin = interpolate(0, min(hmargin, output_mode->hdisplay/20),
hmargin           563 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 			      hmargin, overscan);
hmargin           568 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 		(output_mode->hdisplay - 2*hmargin);
hmargin           572 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	regs->fp_horiz_regs[FP_VALID_START] = hmargin;
hmargin           573 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	regs->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - hmargin - 1;