high_bit          149 arch/mips/include/asm/octeon/cvmx.h static inline uint64_t cvmx_build_bits(uint64_t high_bit,
high_bit          152 arch/mips/include/asm/octeon/cvmx.h 	return (value & cvmx_build_mask(high_bit - low_bit + 1)) << low_bit;
high_bit           66 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_MASK(high_bit, low_bit) \
high_bit           67 drivers/gpu/drm/exynos/regs-mixer.h 	(((2 << ((high_bit) - (low_bit))) - 1) << (low_bit))
high_bit           69 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_MASK_VAL(val, high_bit, low_bit) \
high_bit           70 drivers/gpu/drm/exynos/regs-mixer.h 	(((val) << (low_bit)) & MXR_MASK(high_bit, low_bit))
high_bit           52 drivers/gpu/drm/exynos/regs-vp.h #define VP_MASK(high_bit, low_bit) \
high_bit           53 drivers/gpu/drm/exynos/regs-vp.h 	(((2 << ((high_bit) - (low_bit))) - 1) << (low_bit))
high_bit           55 drivers/gpu/drm/exynos/regs-vp.h #define VP_MASK_VAL(val, high_bit, low_bit) \
high_bit           56 drivers/gpu/drm/exynos/regs-vp.h 	(((val) << (low_bit)) & VP_MASK(high_bit, low_bit))
high_bit          213 drivers/pinctrl/mediatek/pinctrl-mtk-common.c 		bits = drv_grp->high_bit - drv_grp->low_bit + 1;
high_bit           82 drivers/pinctrl/mediatek/pinctrl-mtk-common.h 	unsigned char high_bit;
high_bit           91 drivers/pinctrl/mediatek/pinctrl-mtk-common.h 		.high_bit = _high,	\