highMask          465 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t  highMask[RV770_SMC_VOLTAGEMASK_MAX];
highMask          791 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t  highMask[NISLANDS_SMC_VOLTAGEMASK_MAX];
highMask         1536 drivers/gpu/drm/radeon/cypress_dpm.c 		table->voltageMaskTable.highMask[RV770_SMC_VOLTAGEMASK_VDDC] = 0;
highMask         1554 drivers/gpu/drm/radeon/cypress_dpm.c 		table->voltageMaskTable.highMask[RV770_SMC_VOLTAGEMASK_VDDCI] = 0;
highMask         1280 drivers/gpu/drm/radeon/ni_dpm.c 		table->voltageMaskTable.highMask[NISLANDS_SMC_VOLTAGEMASK_VDDC] = 0;
highMask         1295 drivers/gpu/drm/radeon/ni_dpm.c 		table->voltageMaskTable.highMask[NISLANDS_SMC_VOLTAGEMASK_VDDCI] = 0;
highMask          153 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t  highMask[NISLANDS_SMC_VOLTAGEMASK_MAX];
highMask         1126 drivers/gpu/drm/radeon/rv770_dpm.c 	table->voltageMaskTable.highMask[RV770_SMC_VOLTAGEMASK_VDDC] = 0;
highMask         1153 drivers/gpu/drm/radeon/rv770_dpm.c 		table->voltageMaskTable.highMask[RV770_SMC_VOLTAGEMASK_MVDD] = 0;
highMask          147 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t  highMask[RV770_SMC_VOLTAGEMASK_MAX];