high1             618 drivers/gpu/drm/gma500/psb_irq.c 	uint32_t high1 = 0, high2 = 0, low = 0, count = 0;
high1             655 drivers/gpu/drm/gma500/psb_irq.c 		high1 = ((REG_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
high1             661 drivers/gpu/drm/gma500/psb_irq.c 	} while (high1 != high2);
high1             663 drivers/gpu/drm/gma500/psb_irq.c 	count = (high1 << 8) | low;
high1             767 drivers/gpu/drm/i915/i915_irq.c 	u32 high1, high2, low, pixel, vbl_start, hsync_start, htotal;
high1             807 drivers/gpu/drm/i915/i915_irq.c 		high1 = I915_READ_FW(high_frame) & PIPE_FRAME_HIGH_MASK;
high1             810 drivers/gpu/drm/i915/i915_irq.c 	} while (high1 != high2);
high1             814 drivers/gpu/drm/i915/i915_irq.c 	high1 >>= PIPE_FRAME_HIGH_SHIFT;
high1             823 drivers/gpu/drm/i915/i915_irq.c 	return (((high1 << 8) | low) + (pixel >= vbl_start)) & 0xffffff;