hid0 1452 arch/powerpc/include/asm/reg.h static inline void update_power8_hid0(unsigned long hid0) hid0 1459 arch/powerpc/include/asm/reg.h asm volatile("sync; mtspr %0,%1; isync":: "i"(SPRN_HID0), "r"(hid0)); hid0 199 arch/powerpc/include/uapi/asm/kvm.h __u32 hid0; hid0 80 arch/powerpc/kernel/pmc.c unsigned long hid0; hid0 82 arch/powerpc/kernel/pmc.c hid0 = mfspr(SPRN_HID0); hid0 83 arch/powerpc/kernel/pmc.c hid0 |= 1UL << (63 - 20); hid0 95 arch/powerpc/kernel/pmc.c "isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0): hid0 616 arch/powerpc/kernel/sysfs.c SYSFS_SPRSETUP(hid0, SPRN_HID0); hid0 686 arch/powerpc/kernel/sysfs.c __ATTR(hid0, 0600, show_hid0, store_hid0), hid0 3209 arch/powerpc/kvm/book3s_hv.c unsigned long hid0 = mfspr(SPRN_HID0); hid0 3211 arch/powerpc/kvm/book3s_hv.c hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS; hid0 3213 arch/powerpc/kvm/book3s_hv.c mtspr(SPRN_HID0, hid0); hid0 3216 arch/powerpc/kvm/book3s_hv.c hid0 = mfspr(SPRN_HID0); hid0 3217 arch/powerpc/kvm/book3s_hv.c if (hid0 & stat_bit) hid0 3325 arch/powerpc/kvm/book3s_hv.c unsigned long hid0 = mfspr(SPRN_HID0); hid0 3328 arch/powerpc/kvm/book3s_hv.c hid0 &= ~HID0_POWER8_DYNLPARDIS; hid0 3331 arch/powerpc/kvm/book3s_hv.c mtspr(SPRN_HID0, hid0); hid0 3334 arch/powerpc/kvm/book3s_hv.c hid0 = mfspr(SPRN_HID0); hid0 3335 arch/powerpc/kvm/book3s_hv.c if (!(hid0 & stat_bit)) hid0 372 arch/powerpc/kvm/e500.c sregs->u.e.impl.fsl.hid0 = vcpu_e500->hid0; hid0 394 arch/powerpc/kvm/e500.c vcpu_e500->hid0 = sregs->u.e.impl.fsl.hid0; hid0 78 arch/powerpc/kvm/e500.h u32 hid0; hid0 258 arch/powerpc/kvm/e500_emulate.c vcpu_e500->hid0 = spr_val; hid0 386 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu_e500->hid0; hid0 225 arch/powerpc/kvm/e500mc.c sregs->u.e.impl.fsl.hid0 = vcpu_e500->hid0; hid0 246 arch/powerpc/kvm/e500mc.c vcpu_e500->hid0 = sregs->u.e.impl.fsl.hid0; hid0 116 arch/powerpc/platforms/52xx/mpc52xx_pm.c u32 msr, hid0; hid0 151 arch/powerpc/platforms/52xx/mpc52xx_pm.c hid0 = mfspr(SPRN_HID0); hid0 152 arch/powerpc/platforms/52xx/mpc52xx_pm.c mtspr(SPRN_HID0, (hid0 & ~(HID0_DOZE | HID0_NAP | HID0_DPM)) | HID0_SLEEP); hid0 168 arch/powerpc/platforms/52xx/mpc52xx_pm.c mtspr(SPRN_HID0, hid0); hid0 328 arch/powerpc/platforms/cell/ras.c unsigned long hid0; hid0 334 arch/powerpc/platforms/cell/ras.c hid0 = mfspr(SPRN_HID0); hid0 335 arch/powerpc/platforms/cell/ras.c hid0 |= HID0_CBE_THERM_INT_EN | HID0_CBE_THERM_WAKEUP | hid0 337 arch/powerpc/platforms/cell/ras.c mtspr(SPRN_HID0, hid0); hid0 160 arch/powerpc/platforms/powernv/subcore.c static void update_hid_in_slw(u64 hid0) hid0 168 arch/powerpc/platforms/powernv/subcore.c opal_slw_set_reg(cpu_pir, SPRN_HID0, hid0); hid0 174 arch/powerpc/platforms/powernv/subcore.c u64 hid0, mask; hid0 188 arch/powerpc/platforms/powernv/subcore.c hid0 = mfspr(SPRN_HID0); hid0 189 arch/powerpc/platforms/powernv/subcore.c hid0 &= ~HID0_POWER8_DYNLPARDIS; hid0 190 arch/powerpc/platforms/powernv/subcore.c update_power8_hid0(hid0); hid0 191 arch/powerpc/platforms/powernv/subcore.c update_hid_in_slw(hid0); hid0 210 arch/powerpc/platforms/powernv/subcore.c u64 hid0; hid0 225 arch/powerpc/platforms/powernv/subcore.c hid0 = mfspr(SPRN_HID0); hid0 226 arch/powerpc/platforms/powernv/subcore.c hid0 |= HID0_POWER8_DYNLPARDIS | split_parms[i].value; hid0 227 arch/powerpc/platforms/powernv/subcore.c update_power8_hid0(hid0); hid0 228 arch/powerpc/platforms/powernv/subcore.c update_hid_in_slw(hid0); hid0 2054 drivers/macintosh/via-pmu.c unsigned int hid0; hid0 2084 drivers/macintosh/via-pmu.c hid0 = mfspr(SPRN_HID0); hid0 2085 drivers/macintosh/via-pmu.c hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP; hid0 2086 drivers/macintosh/via-pmu.c mtspr(SPRN_HID0, hid0); hid0 199 tools/arch/powerpc/include/uapi/asm/kvm.h __u32 hid0;