hi_cfg_timing_div 2244 drivers/media/dvb-frontends/drx39xyj/drxj.c 	hi_cmd.param2 = ext_attr->hi_cfg_timing_div;
hi_cfg_timing_div 2409 drivers/media/dvb-frontends/drx39xyj/drxj.c 	ext_attr->hi_cfg_timing_div =
hi_cfg_timing_div 2412 drivers/media/dvb-frontends/drx39xyj/drxj.c 	if ((ext_attr->hi_cfg_timing_div) > SIO_HI_RA_RAM_PAR_2_CFG_DIV__M)
hi_cfg_timing_div 2413 drivers/media/dvb-frontends/drx39xyj/drxj.c 		ext_attr->hi_cfg_timing_div = SIO_HI_RA_RAM_PAR_2_CFG_DIV__M;
hi_cfg_timing_div  444 drivers/media/dvb-frontends/drx39xyj/drxj.h 		u16 hi_cfg_timing_div;	  /*< HI Configure() parameter 2                       */
hi_cfg_timing_div  117 drivers/media/dvb-frontends/drxd_hard.c 	u16 hi_cfg_timing_div;
hi_cfg_timing_div  989 drivers/media/dvb-frontends/drxd_hard.c 	Write16(state, HI_RA_RAM_SRV_CFG_DIV__A, state->hi_cfg_timing_div, 0);
hi_cfg_timing_div 2570 drivers/media/dvb-frontends/drxd_hard.c 	state->hi_cfg_timing_div = (u16) ((state->sys_clock_freq / 1000) *