hi3798cv200_sysctrl_gate_clks  280 drivers/clk/hisilicon/crg-hi3798cv200.c static const struct hisi_gate_clock hi3798cv200_sysctrl_gate_clks[] = {
hi3798cv200_sysctrl_gate_clks  299 drivers/clk/hisilicon/crg-hi3798cv200.c 	ret = hisi_clk_register_gate(hi3798cv200_sysctrl_gate_clks,
hi3798cv200_sysctrl_gate_clks  300 drivers/clk/hisilicon/crg-hi3798cv200.c 				ARRAY_SIZE(hi3798cv200_sysctrl_gate_clks),
hi3798cv200_sysctrl_gate_clks  313 drivers/clk/hisilicon/crg-hi3798cv200.c 	hisi_clk_unregister_gate(hi3798cv200_sysctrl_gate_clks,
hi3798cv200_sysctrl_gate_clks  314 drivers/clk/hisilicon/crg-hi3798cv200.c 				ARRAY_SIZE(hi3798cv200_sysctrl_gate_clks),
hi3798cv200_sysctrl_gate_clks  325 drivers/clk/hisilicon/crg-hi3798cv200.c 	hisi_clk_unregister_gate(hi3798cv200_sysctrl_gate_clks,
hi3798cv200_sysctrl_gate_clks  326 drivers/clk/hisilicon/crg-hi3798cv200.c 				ARRAY_SIZE(hi3798cv200_sysctrl_gate_clks),