hi3516cv300_fixed_rate_clks   39 drivers/clk/hisilicon/crg-hi3516cv300.c static const struct hisi_fixed_rate_clock hi3516cv300_fixed_rate_clks[] = {
hi3516cv300_fixed_rate_clks  139 drivers/clk/hisilicon/crg-hi3516cv300.c 	ret = hisi_clk_register_fixed_rate(hi3516cv300_fixed_rate_clks,
hi3516cv300_fixed_rate_clks  140 drivers/clk/hisilicon/crg-hi3516cv300.c 			ARRAY_SIZE(hi3516cv300_fixed_rate_clks), clk_data);
hi3516cv300_fixed_rate_clks  168 drivers/clk/hisilicon/crg-hi3516cv300.c 	hisi_clk_unregister_fixed_rate(hi3516cv300_fixed_rate_clks,
hi3516cv300_fixed_rate_clks  169 drivers/clk/hisilicon/crg-hi3516cv300.c 			ARRAY_SIZE(hi3516cv300_fixed_rate_clks), clk_data);
hi3516cv300_fixed_rate_clks  183 drivers/clk/hisilicon/crg-hi3516cv300.c 	hisi_clk_unregister_fixed_rate(hi3516cv300_fixed_rate_clks,
hi3516cv300_fixed_rate_clks  184 drivers/clk/hisilicon/crg-hi3516cv300.c 			ARRAY_SIZE(hi3516cv300_fixed_rate_clks), crg->clk_data);