hha_pmu            96 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c static void hisi_ddrc_pmu_write_evtype(struct hisi_pmu *hha_pmu, int idx,
hha_pmu            50 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c static u64 hisi_hha_pmu_read_counter(struct hisi_pmu *hha_pmu,
hha_pmu            55 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	if (!hisi_uncore_pmu_counter_valid(hha_pmu, idx)) {
hha_pmu            56 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 		dev_err(hha_pmu->dev, "Unsupported event index:%d!\n", idx);
hha_pmu            61 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	return readq(hha_pmu->base + hisi_hha_pmu_get_counter_offset(idx));
hha_pmu            64 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c static void hisi_hha_pmu_write_counter(struct hisi_pmu *hha_pmu,
hha_pmu            69 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	if (!hisi_uncore_pmu_counter_valid(hha_pmu, idx)) {
hha_pmu            70 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 		dev_err(hha_pmu->dev, "Unsupported event index:%d!\n", idx);
hha_pmu            75 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writeq(val, hha_pmu->base + hisi_hha_pmu_get_counter_offset(idx));
hha_pmu            78 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c static void hisi_hha_pmu_write_evtype(struct hisi_pmu *hha_pmu, int idx,
hha_pmu            95 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	val = readl(hha_pmu->base + reg);
hha_pmu            98 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writel(val, hha_pmu->base + reg);
hha_pmu           101 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c static void hisi_hha_pmu_start_counters(struct hisi_pmu *hha_pmu)
hha_pmu           109 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	val = readl(hha_pmu->base + HHA_PERF_CTRL);
hha_pmu           111 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writel(val, hha_pmu->base + HHA_PERF_CTRL);
hha_pmu           114 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c static void hisi_hha_pmu_stop_counters(struct hisi_pmu *hha_pmu)
hha_pmu           122 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	val = readl(hha_pmu->base + HHA_PERF_CTRL);
hha_pmu           124 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writel(val, hha_pmu->base + HHA_PERF_CTRL);
hha_pmu           127 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c static void hisi_hha_pmu_enable_counter(struct hisi_pmu *hha_pmu,
hha_pmu           133 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	val = readl(hha_pmu->base + HHA_EVENT_CTRL);
hha_pmu           135 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writel(val, hha_pmu->base + HHA_EVENT_CTRL);
hha_pmu           138 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c static void hisi_hha_pmu_disable_counter(struct hisi_pmu *hha_pmu,
hha_pmu           144 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	val = readl(hha_pmu->base + HHA_EVENT_CTRL);
hha_pmu           146 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writel(val, hha_pmu->base + HHA_EVENT_CTRL);
hha_pmu           149 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c static void hisi_hha_pmu_enable_counter_int(struct hisi_pmu *hha_pmu,
hha_pmu           155 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	val = readl(hha_pmu->base + HHA_INT_MASK);
hha_pmu           157 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writel(val, hha_pmu->base + HHA_INT_MASK);
hha_pmu           160 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c static void hisi_hha_pmu_disable_counter_int(struct hisi_pmu *hha_pmu,
hha_pmu           166 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	val = readl(hha_pmu->base + HHA_INT_MASK);
hha_pmu           168 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writel(val, hha_pmu->base + HHA_INT_MASK);
hha_pmu           173 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	struct hisi_pmu *hha_pmu = dev_id;
hha_pmu           179 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	overflown = readl(hha_pmu->base + HHA_INT_STATUS);
hha_pmu           189 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 		writel((1 << idx), hha_pmu->base + HHA_INT_CLEAR);
hha_pmu           192 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 		event = hha_pmu->pmu_events.hw_events[idx];
hha_pmu           203 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c static int hisi_hha_pmu_init_irq(struct hisi_pmu *hha_pmu,
hha_pmu           215 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 			      dev_name(&pdev->dev), hha_pmu);
hha_pmu           222 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	hha_pmu->irq = irq;
hha_pmu           234 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 				  struct hisi_pmu *hha_pmu)
hha_pmu           245 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	hha_pmu->index_id = id;
hha_pmu           252 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 				     &hha_pmu->sccl_id)) {
hha_pmu           257 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	hha_pmu->ccl_id = -1;
hha_pmu           260 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	hha_pmu->base = devm_ioremap_resource(&pdev->dev, res);
hha_pmu           261 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	if (IS_ERR(hha_pmu->base)) {
hha_pmu           263 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 		return PTR_ERR(hha_pmu->base);
hha_pmu           346 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 				  struct hisi_pmu *hha_pmu)
hha_pmu           350 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	ret = hisi_hha_pmu_init_data(pdev, hha_pmu);
hha_pmu           354 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	ret = hisi_hha_pmu_init_irq(hha_pmu, pdev);
hha_pmu           358 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	hha_pmu->num_counters = HHA_NR_COUNTERS;
hha_pmu           359 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	hha_pmu->counter_bits = 48;
hha_pmu           360 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	hha_pmu->ops = &hisi_uncore_hha_ops;
hha_pmu           361 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	hha_pmu->dev = &pdev->dev;
hha_pmu           362 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	hha_pmu->on_cpu = -1;
hha_pmu           363 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	hha_pmu->check_event = 0x65;
hha_pmu           370 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	struct hisi_pmu *hha_pmu;
hha_pmu           374 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	hha_pmu = devm_kzalloc(&pdev->dev, sizeof(*hha_pmu), GFP_KERNEL);
hha_pmu           375 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	if (!hha_pmu)
hha_pmu           378 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	platform_set_drvdata(pdev, hha_pmu);
hha_pmu           380 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	ret = hisi_hha_pmu_dev_probe(pdev, hha_pmu);
hha_pmu           385 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 				       &hha_pmu->node);
hha_pmu           392 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 			      hha_pmu->sccl_id, hha_pmu->index_id);
hha_pmu           393 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	hha_pmu->pmu = (struct pmu) {
hha_pmu           408 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	ret = perf_pmu_register(&hha_pmu->pmu, name, -1);
hha_pmu           410 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 		dev_err(hha_pmu->dev, "HHA PMU register failed!\n");
hha_pmu           412 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 					    &hha_pmu->node);
hha_pmu           420 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	struct hisi_pmu *hha_pmu = platform_get_drvdata(pdev);
hha_pmu           422 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	perf_pmu_unregister(&hha_pmu->pmu);
hha_pmu           424 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 				    &hha_pmu->node);